162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Purpose:	PCI Express Port Bus Driver's Internal Data Structures
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2004 Intel
662306a36Sopenharmony_ci * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
762306a36Sopenharmony_ci */
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci#ifndef _PORTDRV_H_
1062306a36Sopenharmony_ci#define _PORTDRV_H_
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci#include <linux/compiler.h>
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci/* Service Type */
1562306a36Sopenharmony_ci#define PCIE_PORT_SERVICE_PME_SHIFT	0	/* Power Management Event */
1662306a36Sopenharmony_ci#define PCIE_PORT_SERVICE_PME		(1 << PCIE_PORT_SERVICE_PME_SHIFT)
1762306a36Sopenharmony_ci#define PCIE_PORT_SERVICE_AER_SHIFT	1	/* Advanced Error Reporting */
1862306a36Sopenharmony_ci#define PCIE_PORT_SERVICE_AER		(1 << PCIE_PORT_SERVICE_AER_SHIFT)
1962306a36Sopenharmony_ci#define PCIE_PORT_SERVICE_HP_SHIFT	2	/* Native Hotplug */
2062306a36Sopenharmony_ci#define PCIE_PORT_SERVICE_HP		(1 << PCIE_PORT_SERVICE_HP_SHIFT)
2162306a36Sopenharmony_ci#define PCIE_PORT_SERVICE_DPC_SHIFT	3	/* Downstream Port Containment */
2262306a36Sopenharmony_ci#define PCIE_PORT_SERVICE_DPC		(1 << PCIE_PORT_SERVICE_DPC_SHIFT)
2362306a36Sopenharmony_ci#define PCIE_PORT_SERVICE_BWNOTIF_SHIFT	4	/* Bandwidth notification */
2462306a36Sopenharmony_ci#define PCIE_PORT_SERVICE_BWNOTIF	(1 << PCIE_PORT_SERVICE_BWNOTIF_SHIFT)
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci#define PCIE_PORT_DEVICE_MAXSERVICES   5
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ciextern bool pcie_ports_dpc_native;
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci#ifdef CONFIG_PCIEAER
3162306a36Sopenharmony_ciint pcie_aer_init(void);
3262306a36Sopenharmony_ci#else
3362306a36Sopenharmony_cistatic inline int pcie_aer_init(void) { return 0; }
3462306a36Sopenharmony_ci#endif
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci#ifdef CONFIG_HOTPLUG_PCI_PCIE
3762306a36Sopenharmony_ciint pcie_hp_init(void);
3862306a36Sopenharmony_ci#else
3962306a36Sopenharmony_cistatic inline int pcie_hp_init(void) { return 0; }
4062306a36Sopenharmony_ci#endif
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci#ifdef CONFIG_PCIE_PME
4362306a36Sopenharmony_ciint pcie_pme_init(void);
4462306a36Sopenharmony_ci#else
4562306a36Sopenharmony_cistatic inline int pcie_pme_init(void) { return 0; }
4662306a36Sopenharmony_ci#endif
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci#ifdef CONFIG_PCIE_DPC
4962306a36Sopenharmony_ciint pcie_dpc_init(void);
5062306a36Sopenharmony_ci#else
5162306a36Sopenharmony_cistatic inline int pcie_dpc_init(void) { return 0; }
5262306a36Sopenharmony_ci#endif
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci/* Port Type */
5562306a36Sopenharmony_ci#define PCIE_ANY_PORT			(~0)
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_cistruct pcie_device {
5862306a36Sopenharmony_ci	int		irq;	    /* Service IRQ/MSI/MSI-X Vector */
5962306a36Sopenharmony_ci	struct pci_dev *port;	    /* Root/Upstream/Downstream Port */
6062306a36Sopenharmony_ci	u32		service;    /* Port service this device represents */
6162306a36Sopenharmony_ci	void		*priv_data; /* Service Private Data */
6262306a36Sopenharmony_ci	struct device	device;     /* Generic Device Interface */
6362306a36Sopenharmony_ci};
6462306a36Sopenharmony_ci#define to_pcie_device(d) container_of(d, struct pcie_device, device)
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_cistatic inline void set_service_data(struct pcie_device *dev, void *data)
6762306a36Sopenharmony_ci{
6862306a36Sopenharmony_ci	dev->priv_data = data;
6962306a36Sopenharmony_ci}
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_cistatic inline void *get_service_data(struct pcie_device *dev)
7262306a36Sopenharmony_ci{
7362306a36Sopenharmony_ci	return dev->priv_data;
7462306a36Sopenharmony_ci}
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_cistruct pcie_port_service_driver {
7762306a36Sopenharmony_ci	const char *name;
7862306a36Sopenharmony_ci	int (*probe)(struct pcie_device *dev);
7962306a36Sopenharmony_ci	void (*remove)(struct pcie_device *dev);
8062306a36Sopenharmony_ci	int (*suspend)(struct pcie_device *dev);
8162306a36Sopenharmony_ci	int (*resume_noirq)(struct pcie_device *dev);
8262306a36Sopenharmony_ci	int (*resume)(struct pcie_device *dev);
8362306a36Sopenharmony_ci	int (*runtime_suspend)(struct pcie_device *dev);
8462306a36Sopenharmony_ci	int (*runtime_resume)(struct pcie_device *dev);
8562306a36Sopenharmony_ci
8662306a36Sopenharmony_ci	int (*slot_reset)(struct pcie_device *dev);
8762306a36Sopenharmony_ci
8862306a36Sopenharmony_ci	int port_type;  /* Type of the port this driver can handle */
8962306a36Sopenharmony_ci	u32 service;    /* Port service this device represents */
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ci	struct device_driver driver;
9262306a36Sopenharmony_ci};
9362306a36Sopenharmony_ci#define to_service_driver(d) \
9462306a36Sopenharmony_ci	container_of(d, struct pcie_port_service_driver, driver)
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ciint pcie_port_service_register(struct pcie_port_service_driver *new);
9762306a36Sopenharmony_civoid pcie_port_service_unregister(struct pcie_port_service_driver *new);
9862306a36Sopenharmony_ci
9962306a36Sopenharmony_ciextern struct bus_type pcie_port_bus_type;
10062306a36Sopenharmony_ci
10162306a36Sopenharmony_cistruct pci_dev;
10262306a36Sopenharmony_ci
10362306a36Sopenharmony_ci#ifdef CONFIG_PCIE_PME
10462306a36Sopenharmony_ciextern bool pcie_pme_msi_disabled;
10562306a36Sopenharmony_ci
10662306a36Sopenharmony_cistatic inline void pcie_pme_disable_msi(void)
10762306a36Sopenharmony_ci{
10862306a36Sopenharmony_ci	pcie_pme_msi_disabled = true;
10962306a36Sopenharmony_ci}
11062306a36Sopenharmony_ci
11162306a36Sopenharmony_cistatic inline bool pcie_pme_no_msi(void)
11262306a36Sopenharmony_ci{
11362306a36Sopenharmony_ci	return pcie_pme_msi_disabled;
11462306a36Sopenharmony_ci}
11562306a36Sopenharmony_ci
11662306a36Sopenharmony_civoid pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
11762306a36Sopenharmony_ci#else /* !CONFIG_PCIE_PME */
11862306a36Sopenharmony_cistatic inline void pcie_pme_disable_msi(void) {}
11962306a36Sopenharmony_cistatic inline bool pcie_pme_no_msi(void) { return false; }
12062306a36Sopenharmony_cistatic inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {}
12162306a36Sopenharmony_ci#endif /* !CONFIG_PCIE_PME */
12262306a36Sopenharmony_ci
12362306a36Sopenharmony_cistruct device *pcie_port_find_device(struct pci_dev *dev, u32 service);
12462306a36Sopenharmony_ci#endif /* _PORTDRV_H_ */
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