162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * NXP LPC18xx/43xx OTP memory NVMEM driver 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (c) 2016 Joachim Eastwood <manabian@gmail.com> 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Based on the imx ocotp driver, 862306a36Sopenharmony_ci * Copyright (c) 2015 Pengutronix, Philipp Zabel <p.zabel@pengutronix.de> 962306a36Sopenharmony_ci * 1062306a36Sopenharmony_ci * TODO: add support for writing OTP register via API in boot ROM. 1162306a36Sopenharmony_ci */ 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#include <linux/io.h> 1462306a36Sopenharmony_ci#include <linux/module.h> 1562306a36Sopenharmony_ci#include <linux/nvmem-provider.h> 1662306a36Sopenharmony_ci#include <linux/of.h> 1762306a36Sopenharmony_ci#include <linux/platform_device.h> 1862306a36Sopenharmony_ci#include <linux/slab.h> 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci/* 2162306a36Sopenharmony_ci * LPC18xx OTP memory contains 4 banks with 4 32-bit words. Bank 0 starts 2262306a36Sopenharmony_ci * at offset 0 from the base. 2362306a36Sopenharmony_ci * 2462306a36Sopenharmony_ci * Bank 0 contains the part ID for Flashless devices and is reseverd for 2562306a36Sopenharmony_ci * devices with Flash. 2662306a36Sopenharmony_ci * Bank 1/2 is generale purpose or AES key storage for secure devices. 2762306a36Sopenharmony_ci * Bank 3 contains control data, USB ID and generale purpose words. 2862306a36Sopenharmony_ci */ 2962306a36Sopenharmony_ci#define LPC18XX_OTP_NUM_BANKS 4 3062306a36Sopenharmony_ci#define LPC18XX_OTP_WORDS_PER_BANK 4 3162306a36Sopenharmony_ci#define LPC18XX_OTP_WORD_SIZE sizeof(u32) 3262306a36Sopenharmony_ci#define LPC18XX_OTP_SIZE (LPC18XX_OTP_NUM_BANKS * \ 3362306a36Sopenharmony_ci LPC18XX_OTP_WORDS_PER_BANK * \ 3462306a36Sopenharmony_ci LPC18XX_OTP_WORD_SIZE) 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_cistruct lpc18xx_otp { 3762306a36Sopenharmony_ci void __iomem *base; 3862306a36Sopenharmony_ci}; 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_cistatic int lpc18xx_otp_read(void *context, unsigned int offset, 4162306a36Sopenharmony_ci void *val, size_t bytes) 4262306a36Sopenharmony_ci{ 4362306a36Sopenharmony_ci struct lpc18xx_otp *otp = context; 4462306a36Sopenharmony_ci unsigned int count = bytes >> 2; 4562306a36Sopenharmony_ci u32 index = offset >> 2; 4662306a36Sopenharmony_ci u32 *buf = val; 4762306a36Sopenharmony_ci int i; 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci if (count > (LPC18XX_OTP_SIZE - index)) 5062306a36Sopenharmony_ci count = LPC18XX_OTP_SIZE - index; 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci for (i = index; i < (index + count); i++) 5362306a36Sopenharmony_ci *buf++ = readl(otp->base + i * LPC18XX_OTP_WORD_SIZE); 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci return 0; 5662306a36Sopenharmony_ci} 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_cistatic struct nvmem_config lpc18xx_otp_nvmem_config = { 5962306a36Sopenharmony_ci .name = "lpc18xx-otp", 6062306a36Sopenharmony_ci .read_only = true, 6162306a36Sopenharmony_ci .word_size = LPC18XX_OTP_WORD_SIZE, 6262306a36Sopenharmony_ci .stride = LPC18XX_OTP_WORD_SIZE, 6362306a36Sopenharmony_ci .reg_read = lpc18xx_otp_read, 6462306a36Sopenharmony_ci}; 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_cistatic int lpc18xx_otp_probe(struct platform_device *pdev) 6762306a36Sopenharmony_ci{ 6862306a36Sopenharmony_ci struct nvmem_device *nvmem; 6962306a36Sopenharmony_ci struct lpc18xx_otp *otp; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci otp = devm_kzalloc(&pdev->dev, sizeof(*otp), GFP_KERNEL); 7262306a36Sopenharmony_ci if (!otp) 7362306a36Sopenharmony_ci return -ENOMEM; 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ci otp->base = devm_platform_ioremap_resource(pdev, 0); 7662306a36Sopenharmony_ci if (IS_ERR(otp->base)) 7762306a36Sopenharmony_ci return PTR_ERR(otp->base); 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci lpc18xx_otp_nvmem_config.size = LPC18XX_OTP_SIZE; 8062306a36Sopenharmony_ci lpc18xx_otp_nvmem_config.dev = &pdev->dev; 8162306a36Sopenharmony_ci lpc18xx_otp_nvmem_config.priv = otp; 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci nvmem = devm_nvmem_register(&pdev->dev, &lpc18xx_otp_nvmem_config); 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci return PTR_ERR_OR_ZERO(nvmem); 8662306a36Sopenharmony_ci} 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_cistatic const struct of_device_id lpc18xx_otp_dt_ids[] = { 8962306a36Sopenharmony_ci { .compatible = "nxp,lpc1850-otp" }, 9062306a36Sopenharmony_ci { }, 9162306a36Sopenharmony_ci}; 9262306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, lpc18xx_otp_dt_ids); 9362306a36Sopenharmony_ci 9462306a36Sopenharmony_cistatic struct platform_driver lpc18xx_otp_driver = { 9562306a36Sopenharmony_ci .probe = lpc18xx_otp_probe, 9662306a36Sopenharmony_ci .driver = { 9762306a36Sopenharmony_ci .name = "lpc18xx_otp", 9862306a36Sopenharmony_ci .of_match_table = lpc18xx_otp_dt_ids, 9962306a36Sopenharmony_ci }, 10062306a36Sopenharmony_ci}; 10162306a36Sopenharmony_cimodule_platform_driver(lpc18xx_otp_driver); 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ciMODULE_AUTHOR("Joachim Eastwoood <manabian@gmail.com>"); 10462306a36Sopenharmony_ciMODULE_DESCRIPTION("NXP LPC18xx OTP NVMEM driver"); 10562306a36Sopenharmony_ciMODULE_LICENSE("GPL v2"); 106