162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * NCI based driver for Samsung S3FWRN5 NFC chip
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2015 Samsung Electrnoics
662306a36Sopenharmony_ci * Robert Baldyga <r.baldyga@samsung.com>
762306a36Sopenharmony_ci */
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci#include <linux/completion.h>
1062306a36Sopenharmony_ci#include <linux/firmware.h>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci#include "s3fwrn5.h"
1362306a36Sopenharmony_ci#include "nci.h"
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_cistatic int s3fwrn5_nci_prop_rsp(struct nci_dev *ndev, struct sk_buff *skb)
1662306a36Sopenharmony_ci{
1762306a36Sopenharmony_ci	__u8 status = skb->data[0];
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci	nci_req_complete(ndev, status);
2062306a36Sopenharmony_ci	return 0;
2162306a36Sopenharmony_ci}
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ciconst struct nci_driver_ops s3fwrn5_nci_prop_ops[4] = {
2462306a36Sopenharmony_ci	{
2562306a36Sopenharmony_ci		.opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
2662306a36Sopenharmony_ci				NCI_PROP_SET_RFREG),
2762306a36Sopenharmony_ci		.rsp = s3fwrn5_nci_prop_rsp,
2862306a36Sopenharmony_ci	},
2962306a36Sopenharmony_ci	{
3062306a36Sopenharmony_ci		.opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
3162306a36Sopenharmony_ci				NCI_PROP_START_RFREG),
3262306a36Sopenharmony_ci		.rsp = s3fwrn5_nci_prop_rsp,
3362306a36Sopenharmony_ci	},
3462306a36Sopenharmony_ci	{
3562306a36Sopenharmony_ci		.opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
3662306a36Sopenharmony_ci				NCI_PROP_STOP_RFREG),
3762306a36Sopenharmony_ci		.rsp = s3fwrn5_nci_prop_rsp,
3862306a36Sopenharmony_ci	},
3962306a36Sopenharmony_ci	{
4062306a36Sopenharmony_ci		.opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
4162306a36Sopenharmony_ci				NCI_PROP_FW_CFG),
4262306a36Sopenharmony_ci		.rsp = s3fwrn5_nci_prop_rsp,
4362306a36Sopenharmony_ci	},
4462306a36Sopenharmony_ci};
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ci#define S3FWRN5_RFREG_SECTION_SIZE 252
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ciint s3fwrn5_nci_rf_configure(struct s3fwrn5_info *info, const char *fw_name)
4962306a36Sopenharmony_ci{
5062306a36Sopenharmony_ci	struct device *dev = &info->ndev->nfc_dev->dev;
5162306a36Sopenharmony_ci	const struct firmware *fw;
5262306a36Sopenharmony_ci	struct nci_prop_fw_cfg_cmd fw_cfg;
5362306a36Sopenharmony_ci	struct nci_prop_set_rfreg_cmd set_rfreg;
5462306a36Sopenharmony_ci	struct nci_prop_stop_rfreg_cmd stop_rfreg;
5562306a36Sopenharmony_ci	u32 checksum;
5662306a36Sopenharmony_ci	int i, len;
5762306a36Sopenharmony_ci	int ret;
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci	ret = request_firmware(&fw, fw_name, dev);
6062306a36Sopenharmony_ci	if (ret < 0)
6162306a36Sopenharmony_ci		return ret;
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci	/* Compute rfreg checksum */
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_ci	checksum = 0;
6662306a36Sopenharmony_ci	for (i = 0; i < fw->size; i += 4)
6762306a36Sopenharmony_ci		checksum += *((u32 *)(fw->data+i));
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ci	/* Set default clock configuration for external crystal */
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_ci	fw_cfg.clk_type = 0x01;
7262306a36Sopenharmony_ci	fw_cfg.clk_speed = 0xff;
7362306a36Sopenharmony_ci	fw_cfg.clk_req = 0xff;
7462306a36Sopenharmony_ci	ret = nci_prop_cmd(info->ndev, NCI_PROP_FW_CFG,
7562306a36Sopenharmony_ci		sizeof(fw_cfg), (__u8 *)&fw_cfg);
7662306a36Sopenharmony_ci	if (ret < 0)
7762306a36Sopenharmony_ci		goto out;
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_ci	/* Start rfreg configuration */
8062306a36Sopenharmony_ci
8162306a36Sopenharmony_ci	dev_info(dev, "rfreg configuration update: %s\n", fw_name);
8262306a36Sopenharmony_ci
8362306a36Sopenharmony_ci	ret = nci_prop_cmd(info->ndev, NCI_PROP_START_RFREG, 0, NULL);
8462306a36Sopenharmony_ci	if (ret < 0) {
8562306a36Sopenharmony_ci		dev_err(dev, "Unable to start rfreg update\n");
8662306a36Sopenharmony_ci		goto out;
8762306a36Sopenharmony_ci	}
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ci	/* Update rfreg */
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ci	set_rfreg.index = 0;
9262306a36Sopenharmony_ci	for (i = 0; i < fw->size; i += S3FWRN5_RFREG_SECTION_SIZE) {
9362306a36Sopenharmony_ci		len = (fw->size - i < S3FWRN5_RFREG_SECTION_SIZE) ?
9462306a36Sopenharmony_ci			(fw->size - i) : S3FWRN5_RFREG_SECTION_SIZE;
9562306a36Sopenharmony_ci		memcpy(set_rfreg.data, fw->data+i, len);
9662306a36Sopenharmony_ci		ret = nci_prop_cmd(info->ndev, NCI_PROP_SET_RFREG,
9762306a36Sopenharmony_ci			len+1, (__u8 *)&set_rfreg);
9862306a36Sopenharmony_ci		if (ret < 0) {
9962306a36Sopenharmony_ci			dev_err(dev, "rfreg update error (code=%d)\n", ret);
10062306a36Sopenharmony_ci			goto out;
10162306a36Sopenharmony_ci		}
10262306a36Sopenharmony_ci		set_rfreg.index++;
10362306a36Sopenharmony_ci	}
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_ci	/* Finish rfreg configuration */
10662306a36Sopenharmony_ci
10762306a36Sopenharmony_ci	stop_rfreg.checksum = checksum & 0xffff;
10862306a36Sopenharmony_ci	ret = nci_prop_cmd(info->ndev, NCI_PROP_STOP_RFREG,
10962306a36Sopenharmony_ci		sizeof(stop_rfreg), (__u8 *)&stop_rfreg);
11062306a36Sopenharmony_ci	if (ret < 0) {
11162306a36Sopenharmony_ci		dev_err(dev, "Unable to stop rfreg update\n");
11262306a36Sopenharmony_ci		goto out;
11362306a36Sopenharmony_ci	}
11462306a36Sopenharmony_ci
11562306a36Sopenharmony_ci	dev_info(dev, "rfreg configuration update: success\n");
11662306a36Sopenharmony_ciout:
11762306a36Sopenharmony_ci	release_firmware(fw);
11862306a36Sopenharmony_ci	return ret;
11962306a36Sopenharmony_ci}
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