1// SPDX-License-Identifier: GPL-2.0 2/* Copyright(c) 2009-2012 Realtek Corporation.*/ 3 4#include "../wifi.h" 5#include "../core.h" 6#include "../pci.h" 7#include "reg.h" 8#include "def.h" 9#include "phy.h" 10#include "dm.h" 11#include "fw.h" 12#include "../rtl8723com/fw_common.h" 13#include "hw.h" 14#include "trx.h" 15#include "led.h" 16#include "table.h" 17#include "hal_btc.h" 18#include "../btcoexist/rtl_btc.h" 19#include "../rtl8723com/phy_common.h" 20 21#include <linux/vmalloc.h> 22#include <linux/module.h> 23 24static void rtl8723e_init_aspm_vars(struct ieee80211_hw *hw) 25{ 26 struct rtl_priv *rtlpriv = rtl_priv(hw); 27 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 28 29 /*close ASPM for AMD defaultly */ 30 rtlpci->const_amdpci_aspm = 0; 31 32 /** 33 * ASPM PS mode. 34 * 0 - Disable ASPM, 35 * 1 - Enable ASPM without Clock Req, 36 * 2 - Enable ASPM with Clock Req, 37 * 3 - Alwyas Enable ASPM with Clock Req, 38 * 4 - Always Enable ASPM without Clock Req. 39 * set defult to RTL8192CE:3 RTL8192E:2 40 */ 41 rtlpci->const_pci_aspm = 3; 42 43 /*Setting for PCI-E device */ 44 rtlpci->const_devicepci_aspm_setting = 0x03; 45 46 /*Setting for PCI-E bridge */ 47 rtlpci->const_hostpci_aspm_setting = 0x02; 48 49 /** 50 * In Hw/Sw Radio Off situation. 51 * 0 - Default, 52 * 1 - From ASPM setting without low Mac Pwr, 53 * 2 - From ASPM setting with low Mac Pwr, 54 * 3 - Bus D3 55 * set default to RTL8192CE:0 RTL8192SE:2 56 */ 57 rtlpci->const_hwsw_rfoff_d3 = 0; 58 59 /** 60 * This setting works for those device with 61 * backdoor ASPM setting such as EPHY setting. 62 * 0 - Not support ASPM, 63 * 1 - Support ASPM, 64 * 2 - According to chipset. 65 */ 66 rtlpci->const_support_pciaspm = rtlpriv->cfg->mod_params->aspm_support; 67} 68 69static int rtl8723e_init_sw_vars(struct ieee80211_hw *hw) 70{ 71 struct rtl_priv *rtlpriv = rtl_priv(hw); 72 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 73 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); 74 int err = 0; 75 char *fw_name = "rtlwifi/rtl8723fw.bin"; 76 77 rtl8723e_bt_reg_init(hw); 78 79 rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer(); 80 81 rtlpriv->dm.dm_initialgain_enable = true; 82 rtlpriv->dm.dm_flag = 0; 83 rtlpriv->dm.disable_framebursting = false; 84 rtlpriv->dm.thermalvalue = 0; 85 rtlpci->transmit_config = CFENDFORM | BIT(12) | BIT(13); 86 87 /* compatible 5G band 88ce just 2.4G band & smsp */ 88 rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G; 89 rtlpriv->rtlhal.bandset = BAND_ON_2_4G; 90 rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY; 91 92 rtlpci->receive_config = (RCR_APPFCS | 93 RCR_APP_MIC | 94 RCR_APP_ICV | 95 RCR_APP_PHYST_RXFF | 96 RCR_HTC_LOC_CTRL | 97 RCR_AMF | 98 RCR_ACF | 99 RCR_ADF | 100 RCR_AICV | 101 RCR_AB | 102 RCR_AM | 103 RCR_APM | 104 0); 105 106 rtlpci->irq_mask[0] = 107 (u32) (PHIMR_ROK | 108 PHIMR_RDU | 109 PHIMR_VODOK | 110 PHIMR_VIDOK | 111 PHIMR_BEDOK | 112 PHIMR_BKDOK | 113 PHIMR_MGNTDOK | 114 PHIMR_HIGHDOK | 115 PHIMR_C2HCMD | 116 PHIMR_HISRE_IND | 117 PHIMR_TSF_BIT32_TOGGLE | 118 PHIMR_TXBCNOK | 119 PHIMR_PSTIMEOUT | 120 0); 121 122 rtlpci->irq_mask[1] = 123 (u32)(PHIMR_RXFOVW | 124 0); 125 126 /* for LPS & IPS */ 127 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; 128 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; 129 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; 130 rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; 131 if (rtlpriv->cfg->mod_params->disable_watchdog) 132 pr_info("watchdog disabled\n"); 133 rtlpriv->psc.reg_fwctrl_lps = 3; 134 rtlpriv->psc.reg_max_lps_awakeintvl = 5; 135 rtl8723e_init_aspm_vars(hw); 136 137 if (rtlpriv->psc.reg_fwctrl_lps == 1) 138 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE; 139 else if (rtlpriv->psc.reg_fwctrl_lps == 2) 140 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE; 141 else if (rtlpriv->psc.reg_fwctrl_lps == 3) 142 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE; 143 144 /* for firmware buf */ 145 rtlpriv->rtlhal.pfirmware = vzalloc(0x6000); 146 if (!rtlpriv->rtlhal.pfirmware) { 147 pr_err("Can't alloc buffer for fw.\n"); 148 return 1; 149 } 150 151 if (IS_81XXC_VENDOR_UMC_B_CUT(rtlhal->version)) 152 fw_name = "rtlwifi/rtl8723fw_B.bin"; 153 154 rtlpriv->max_fw_size = 0x6000; 155 pr_info("Using firmware %s\n", fw_name); 156 err = request_firmware_nowait(THIS_MODULE, 1, fw_name, 157 rtlpriv->io.dev, GFP_KERNEL, hw, 158 rtl_fw_cb); 159 if (err) { 160 pr_err("Failed to request firmware!\n"); 161 vfree(rtlpriv->rtlhal.pfirmware); 162 rtlpriv->rtlhal.pfirmware = NULL; 163 return 1; 164 } 165 return 0; 166} 167 168static void rtl8723e_deinit_sw_vars(struct ieee80211_hw *hw) 169{ 170 struct rtl_priv *rtlpriv = rtl_priv(hw); 171 172 if (rtlpriv->rtlhal.pfirmware) { 173 vfree(rtlpriv->rtlhal.pfirmware); 174 rtlpriv->rtlhal.pfirmware = NULL; 175 } 176} 177 178/* get bt coexist status */ 179static bool rtl8723e_get_btc_status(void) 180{ 181 return true; 182} 183 184static bool is_fw_header(struct rtlwifi_firmware_header *hdr) 185{ 186 return (le16_to_cpu(hdr->signature) & 0xfff0) == 0x2300; 187} 188 189static struct rtl_hal_ops rtl8723e_hal_ops = { 190 .init_sw_vars = rtl8723e_init_sw_vars, 191 .deinit_sw_vars = rtl8723e_deinit_sw_vars, 192 .read_eeprom_info = rtl8723e_read_eeprom_info, 193 .interrupt_recognized = rtl8723e_interrupt_recognized, 194 .hw_init = rtl8723e_hw_init, 195 .hw_disable = rtl8723e_card_disable, 196 .hw_suspend = rtl8723e_suspend, 197 .hw_resume = rtl8723e_resume, 198 .enable_interrupt = rtl8723e_enable_interrupt, 199 .disable_interrupt = rtl8723e_disable_interrupt, 200 .set_network_type = rtl8723e_set_network_type, 201 .set_chk_bssid = rtl8723e_set_check_bssid, 202 .set_qos = rtl8723e_set_qos, 203 .set_bcn_reg = rtl8723e_set_beacon_related_registers, 204 .set_bcn_intv = rtl8723e_set_beacon_interval, 205 .update_interrupt_mask = rtl8723e_update_interrupt_mask, 206 .get_hw_reg = rtl8723e_get_hw_reg, 207 .set_hw_reg = rtl8723e_set_hw_reg, 208 .update_rate_tbl = rtl8723e_update_hal_rate_tbl, 209 .fill_tx_desc = rtl8723e_tx_fill_desc, 210 .fill_tx_cmddesc = rtl8723e_tx_fill_cmddesc, 211 .query_rx_desc = rtl8723e_rx_query_desc, 212 .set_channel_access = rtl8723e_update_channel_access_setting, 213 .radio_onoff_checking = rtl8723e_gpio_radio_on_off_checking, 214 .set_bw_mode = rtl8723e_phy_set_bw_mode, 215 .switch_channel = rtl8723e_phy_sw_chnl, 216 .dm_watchdog = rtl8723e_dm_watchdog, 217 .scan_operation_backup = rtl8723e_phy_scan_operation_backup, 218 .set_rf_power_state = rtl8723e_phy_set_rf_power_state, 219 .led_control = rtl8723e_led_control, 220 .set_desc = rtl8723e_set_desc, 221 .get_desc = rtl8723e_get_desc, 222 .is_tx_desc_closed = rtl8723e_is_tx_desc_closed, 223 .tx_polling = rtl8723e_tx_polling, 224 .enable_hw_sec = rtl8723e_enable_hw_security_config, 225 .set_key = rtl8723e_set_key, 226 .get_bbreg = rtl8723_phy_query_bb_reg, 227 .set_bbreg = rtl8723_phy_set_bb_reg, 228 .get_rfreg = rtl8723e_phy_query_rf_reg, 229 .set_rfreg = rtl8723e_phy_set_rf_reg, 230 .c2h_command_handle = rtl_8723e_c2h_command_handle, 231 .bt_wifi_media_status_notify = rtl_8723e_bt_wifi_media_status_notify, 232 .bt_coex_off_before_lps = 233 rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps, 234 .get_btc_status = rtl8723e_get_btc_status, 235 .is_fw_header = is_fw_header, 236}; 237 238static struct rtl_mod_params rtl8723e_mod_params = { 239 .sw_crypto = false, 240 .inactiveps = true, 241 .swctrl_lps = true, 242 .fwctrl_lps = false, 243 .aspm_support = 1, 244 .debug_level = 0, 245 .debug_mask = 0, 246 .msi_support = false, 247 .disable_watchdog = false, 248}; 249 250static const struct rtl_hal_cfg rtl8723e_hal_cfg = { 251 .bar_id = 2, 252 .write_readback = true, 253 .name = "rtl8723e_pci", 254 .ops = &rtl8723e_hal_ops, 255 .mod_params = &rtl8723e_mod_params, 256 .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL, 257 .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN, 258 .maps[SYS_CLK] = REG_SYS_CLKR, 259 .maps[MAC_RCR_AM] = AM, 260 .maps[MAC_RCR_AB] = AB, 261 .maps[MAC_RCR_ACRC32] = ACRC32, 262 .maps[MAC_RCR_ACF] = ACF, 263 .maps[MAC_RCR_AAP] = AAP, 264 .maps[MAC_HIMR] = REG_HIMR, 265 .maps[MAC_HIMRE] = REG_HIMRE, 266 .maps[EFUSE_TEST] = REG_EFUSE_TEST, 267 .maps[EFUSE_CTRL] = REG_EFUSE_CTRL, 268 .maps[EFUSE_CLK] = 0, 269 .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL, 270 .maps[EFUSE_PWC_EV12V] = PWC_EV12V, 271 .maps[EFUSE_FEN_ELDR] = FEN_ELDR, 272 .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN, 273 .maps[EFUSE_ANA8M] = ANA8M, 274 .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE, 275 .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION, 276 .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN, 277 .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES, 278 279 .maps[RWCAM] = REG_CAMCMD, 280 .maps[WCAMI] = REG_CAMWRITE, 281 .maps[RCAMO] = REG_CAMREAD, 282 .maps[CAMDBG] = REG_CAMDBG, 283 .maps[SECR] = REG_SECCFG, 284 .maps[SEC_CAM_NONE] = CAM_NONE, 285 .maps[SEC_CAM_WEP40] = CAM_WEP40, 286 .maps[SEC_CAM_TKIP] = CAM_TKIP, 287 .maps[SEC_CAM_AES] = CAM_AES, 288 .maps[SEC_CAM_WEP104] = CAM_WEP104, 289 290 .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6, 291 .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5, 292 .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4, 293 .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3, 294 .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2, 295 .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1, 296 .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8, 297 .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7, 298 .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6, 299 .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5, 300 .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4, 301 .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3, 302 .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2, 303 .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1, 304 .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2, 305 .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1, 306 307 .maps[RTL_IMR_TXFOVW] = PHIMR_TXFOVW, 308 .maps[RTL_IMR_PSTIMEOUT] = PHIMR_PSTIMEOUT, 309 .maps[RTL_IMR_BCNINT] = PHIMR_BCNDMAINT0, 310 .maps[RTL_IMR_RXFOVW] = PHIMR_RXFOVW, 311 .maps[RTL_IMR_RDU] = PHIMR_RDU, 312 .maps[RTL_IMR_ATIMEND] = PHIMR_ATIMEND_E, 313 .maps[RTL_IMR_BDOK] = PHIMR_BCNDOK0, 314 .maps[RTL_IMR_MGNTDOK] = PHIMR_MGNTDOK, 315 .maps[RTL_IMR_TBDER] = PHIMR_TXBCNERR, 316 .maps[RTL_IMR_HIGHDOK] = PHIMR_HIGHDOK, 317 .maps[RTL_IMR_TBDOK] = PHIMR_TXBCNOK, 318 .maps[RTL_IMR_BKDOK] = PHIMR_BKDOK, 319 .maps[RTL_IMR_BEDOK] = PHIMR_BEDOK, 320 .maps[RTL_IMR_VIDOK] = PHIMR_VIDOK, 321 .maps[RTL_IMR_VODOK] = PHIMR_VODOK, 322 .maps[RTL_IMR_ROK] = PHIMR_ROK, 323 .maps[RTL_IBSS_INT_MASKS] = 324 (PHIMR_BCNDMAINT0 | PHIMR_TXBCNOK | PHIMR_TXBCNERR), 325 .maps[RTL_IMR_C2HCMD] = PHIMR_C2HCMD, 326 327 328 .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M, 329 .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M, 330 .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M, 331 .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M, 332 .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M, 333 .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M, 334 .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M, 335 .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M, 336 .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M, 337 .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M, 338 .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M, 339 .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M, 340 341 .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7, 342 .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15, 343}; 344 345static const struct pci_device_id rtl8723e_pci_ids[] = { 346 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8723, rtl8723e_hal_cfg)}, 347 {}, 348}; 349 350MODULE_DEVICE_TABLE(pci, rtl8723e_pci_ids); 351 352MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>"); 353MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>"); 354MODULE_LICENSE("GPL"); 355MODULE_DESCRIPTION("Realtek 8723E 802.11n PCI wireless"); 356MODULE_FIRMWARE("rtlwifi/rtl8723efw.bin"); 357 358module_param_named(swenc, rtl8723e_mod_params.sw_crypto, bool, 0444); 359module_param_named(debug_level, rtl8723e_mod_params.debug_level, int, 0644); 360module_param_named(debug_mask, rtl8723e_mod_params.debug_mask, ullong, 0644); 361module_param_named(ips, rtl8723e_mod_params.inactiveps, bool, 0444); 362module_param_named(swlps, rtl8723e_mod_params.swctrl_lps, bool, 0444); 363module_param_named(fwlps, rtl8723e_mod_params.fwctrl_lps, bool, 0444); 364module_param_named(msi, rtl8723e_mod_params.msi_support, bool, 0444); 365module_param_named(aspm, rtl8723e_mod_params.aspm_support, int, 0444); 366module_param_named(disable_watchdog, rtl8723e_mod_params.disable_watchdog, 367 bool, 0444); 368MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n"); 369MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n"); 370MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 1)\n"); 371MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 0)\n"); 372MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 0)\n"); 373MODULE_PARM_DESC(aspm, "Set to 1 to enable ASPM (default 1)\n"); 374MODULE_PARM_DESC(debug_level, "Set debug level (0-5) (default 0)"); 375MODULE_PARM_DESC(debug_mask, "Set debug mask (default 0)"); 376MODULE_PARM_DESC(disable_watchdog, "Set to 1 to disable the watchdog (default 0)\n"); 377 378static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume); 379 380static struct pci_driver rtl8723e_driver = { 381 .name = KBUILD_MODNAME, 382 .id_table = rtl8723e_pci_ids, 383 .probe = rtl_pci_probe, 384 .remove = rtl_pci_disconnect, 385 .driver.pm = &rtlwifi_pm_ops, 386}; 387 388module_pci_driver(rtl8723e_driver); 389