1// SPDX-License-Identifier: ISC 2/* Copyright (C) 2020 MediaTek Inc. */ 3 4#include <linux/devcoredump.h> 5#include <linux/etherdevice.h> 6#include <linux/timekeeping.h> 7#include "mt7921.h" 8#include "../dma.h" 9#include "../mt76_connac2_mac.h" 10#include "mcu.h" 11 12#define MT_WTBL_TXRX_CAP_RATE_OFFSET 7 13#define MT_WTBL_TXRX_RATE_G2_HE 24 14#define MT_WTBL_TXRX_RATE_G2 12 15 16#define MT_WTBL_AC0_CTT_OFFSET 20 17 18bool mt7921_mac_wtbl_update(struct mt792x_dev *dev, int idx, u32 mask) 19{ 20 mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX, 21 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask); 22 23 return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 24 0, 5000); 25} 26 27static u32 mt7921_mac_wtbl_lmac_addr(int idx, u8 offset) 28{ 29 return MT_WTBL_LMAC_OFFS(idx, 0) + offset * 4; 30} 31 32static void mt7921_mac_sta_poll(struct mt792x_dev *dev) 33{ 34 static const u8 ac_to_tid[] = { 35 [IEEE80211_AC_BE] = 0, 36 [IEEE80211_AC_BK] = 1, 37 [IEEE80211_AC_VI] = 4, 38 [IEEE80211_AC_VO] = 6 39 }; 40 struct ieee80211_sta *sta; 41 struct mt792x_sta *msta; 42 u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS]; 43 LIST_HEAD(sta_poll_list); 44 struct rate_info *rate; 45 s8 rssi[4]; 46 int i; 47 48 spin_lock_bh(&dev->mt76.sta_poll_lock); 49 list_splice_init(&dev->mt76.sta_poll_list, &sta_poll_list); 50 spin_unlock_bh(&dev->mt76.sta_poll_lock); 51 52 while (true) { 53 bool clear = false; 54 u32 addr, val; 55 u16 idx; 56 u8 bw; 57 58 spin_lock_bh(&dev->mt76.sta_poll_lock); 59 if (list_empty(&sta_poll_list)) { 60 spin_unlock_bh(&dev->mt76.sta_poll_lock); 61 break; 62 } 63 msta = list_first_entry(&sta_poll_list, 64 struct mt792x_sta, wcid.poll_list); 65 list_del_init(&msta->wcid.poll_list); 66 spin_unlock_bh(&dev->mt76.sta_poll_lock); 67 68 idx = msta->wcid.idx; 69 addr = mt7921_mac_wtbl_lmac_addr(idx, MT_WTBL_AC0_CTT_OFFSET); 70 71 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 72 u32 tx_last = msta->airtime_ac[i]; 73 u32 rx_last = msta->airtime_ac[i + 4]; 74 75 msta->airtime_ac[i] = mt76_rr(dev, addr); 76 msta->airtime_ac[i + 4] = mt76_rr(dev, addr + 4); 77 78 tx_time[i] = msta->airtime_ac[i] - tx_last; 79 rx_time[i] = msta->airtime_ac[i + 4] - rx_last; 80 81 if ((tx_last | rx_last) & BIT(30)) 82 clear = true; 83 84 addr += 8; 85 } 86 87 if (clear) { 88 mt7921_mac_wtbl_update(dev, idx, 89 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 90 memset(msta->airtime_ac, 0, sizeof(msta->airtime_ac)); 91 } 92 93 if (!msta->wcid.sta) 94 continue; 95 96 sta = container_of((void *)msta, struct ieee80211_sta, 97 drv_priv); 98 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 99 u8 q = mt76_connac_lmac_mapping(i); 100 u32 tx_cur = tx_time[q]; 101 u32 rx_cur = rx_time[q]; 102 u8 tid = ac_to_tid[i]; 103 104 if (!tx_cur && !rx_cur) 105 continue; 106 107 ieee80211_sta_register_airtime(sta, tid, tx_cur, 108 rx_cur); 109 } 110 111 /* We don't support reading GI info from txs packets. 112 * For accurate tx status reporting and AQL improvement, 113 * we need to make sure that flags match so polling GI 114 * from per-sta counters directly. 115 */ 116 rate = &msta->wcid.rate; 117 addr = mt7921_mac_wtbl_lmac_addr(idx, 118 MT_WTBL_TXRX_CAP_RATE_OFFSET); 119 val = mt76_rr(dev, addr); 120 121 switch (rate->bw) { 122 case RATE_INFO_BW_160: 123 bw = IEEE80211_STA_RX_BW_160; 124 break; 125 case RATE_INFO_BW_80: 126 bw = IEEE80211_STA_RX_BW_80; 127 break; 128 case RATE_INFO_BW_40: 129 bw = IEEE80211_STA_RX_BW_40; 130 break; 131 default: 132 bw = IEEE80211_STA_RX_BW_20; 133 break; 134 } 135 136 if (rate->flags & RATE_INFO_FLAGS_HE_MCS) { 137 u8 offs = MT_WTBL_TXRX_RATE_G2_HE + 2 * bw; 138 139 rate->he_gi = (val & (0x3 << offs)) >> offs; 140 } else if (rate->flags & 141 (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) { 142 if (val & BIT(MT_WTBL_TXRX_RATE_G2 + bw)) 143 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 144 else 145 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; 146 } 147 148 /* get signal strength of resp frames (CTS/BA/ACK) */ 149 addr = mt7921_mac_wtbl_lmac_addr(idx, 30); 150 val = mt76_rr(dev, addr); 151 152 rssi[0] = to_rssi(GENMASK(7, 0), val); 153 rssi[1] = to_rssi(GENMASK(15, 8), val); 154 rssi[2] = to_rssi(GENMASK(23, 16), val); 155 rssi[3] = to_rssi(GENMASK(31, 14), val); 156 157 msta->ack_signal = 158 mt76_rx_signal(msta->vif->phy->mt76->antenna_mask, rssi); 159 160 ewma_avg_signal_add(&msta->avg_ack_signal, -msta->ack_signal); 161 } 162} 163 164static int 165mt7921_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb) 166{ 167 u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM; 168 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 169 bool hdr_trans, unicast, insert_ccmp_hdr = false; 170 u8 chfreq, qos_ctl = 0, remove_pad, amsdu_info; 171 u16 hdr_gap; 172 __le32 *rxv = NULL, *rxd = (__le32 *)skb->data; 173 struct mt76_phy *mphy = &dev->mt76.phy; 174 struct mt792x_phy *phy = &dev->phy; 175 struct ieee80211_supported_band *sband; 176 u32 csum_status = *(u32 *)skb->cb; 177 u32 rxd0 = le32_to_cpu(rxd[0]); 178 u32 rxd1 = le32_to_cpu(rxd[1]); 179 u32 rxd2 = le32_to_cpu(rxd[2]); 180 u32 rxd3 = le32_to_cpu(rxd[3]); 181 u32 rxd4 = le32_to_cpu(rxd[4]); 182 struct mt792x_sta *msta = NULL; 183 u16 seq_ctrl = 0; 184 __le16 fc = 0; 185 u8 mode = 0; 186 int i, idx; 187 188 memset(status, 0, sizeof(*status)); 189 190 if (rxd1 & MT_RXD1_NORMAL_BAND_IDX) 191 return -EINVAL; 192 193 if (!test_bit(MT76_STATE_RUNNING, &mphy->state)) 194 return -EINVAL; 195 196 if (rxd2 & MT_RXD2_NORMAL_AMSDU_ERR) 197 return -EINVAL; 198 199 hdr_trans = rxd2 & MT_RXD2_NORMAL_HDR_TRANS; 200 if (hdr_trans && (rxd1 & MT_RXD1_NORMAL_CM)) 201 return -EINVAL; 202 203 /* ICV error or CCMP/BIP/WPI MIC error */ 204 if (rxd1 & MT_RXD1_NORMAL_ICV_ERR) 205 status->flag |= RX_FLAG_ONLY_MONITOR; 206 207 chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3); 208 unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M; 209 idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1); 210 status->wcid = mt792x_rx_get_wcid(dev, idx, unicast); 211 212 if (status->wcid) { 213 msta = container_of(status->wcid, struct mt792x_sta, wcid); 214 spin_lock_bh(&dev->mt76.sta_poll_lock); 215 if (list_empty(&msta->wcid.poll_list)) 216 list_add_tail(&msta->wcid.poll_list, 217 &dev->mt76.sta_poll_list); 218 spin_unlock_bh(&dev->mt76.sta_poll_lock); 219 } 220 221 mt792x_get_status_freq_info(status, chfreq); 222 223 switch (status->band) { 224 case NL80211_BAND_5GHZ: 225 sband = &mphy->sband_5g.sband; 226 break; 227 case NL80211_BAND_6GHZ: 228 sband = &mphy->sband_6g.sband; 229 break; 230 default: 231 sband = &mphy->sband_2g.sband; 232 break; 233 } 234 235 if (!sband->channels) 236 return -EINVAL; 237 238 if (mt76_is_mmio(&dev->mt76) && (rxd0 & csum_mask) == csum_mask && 239 !(csum_status & (BIT(0) | BIT(2) | BIT(3)))) 240 skb->ip_summed = CHECKSUM_UNNECESSARY; 241 242 if (rxd1 & MT_RXD1_NORMAL_FCS_ERR) 243 status->flag |= RX_FLAG_FAILED_FCS_CRC; 244 245 if (rxd1 & MT_RXD1_NORMAL_TKIP_MIC_ERR) 246 status->flag |= RX_FLAG_MMIC_ERROR; 247 248 if (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1) != 0 && 249 !(rxd1 & (MT_RXD1_NORMAL_CLM | MT_RXD1_NORMAL_CM))) { 250 status->flag |= RX_FLAG_DECRYPTED; 251 status->flag |= RX_FLAG_IV_STRIPPED; 252 status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED; 253 } 254 255 remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2); 256 257 if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR) 258 return -EINVAL; 259 260 rxd += 6; 261 if (rxd1 & MT_RXD1_NORMAL_GROUP_4) { 262 u32 v0 = le32_to_cpu(rxd[0]); 263 u32 v2 = le32_to_cpu(rxd[2]); 264 265 fc = cpu_to_le16(FIELD_GET(MT_RXD6_FRAME_CONTROL, v0)); 266 seq_ctrl = FIELD_GET(MT_RXD8_SEQ_CTRL, v2); 267 qos_ctl = FIELD_GET(MT_RXD8_QOS_CTL, v2); 268 269 rxd += 4; 270 if ((u8 *)rxd - skb->data >= skb->len) 271 return -EINVAL; 272 } 273 274 if (rxd1 & MT_RXD1_NORMAL_GROUP_1) { 275 u8 *data = (u8 *)rxd; 276 277 if (status->flag & RX_FLAG_DECRYPTED) { 278 switch (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1)) { 279 case MT_CIPHER_AES_CCMP: 280 case MT_CIPHER_CCMP_CCX: 281 case MT_CIPHER_CCMP_256: 282 insert_ccmp_hdr = 283 FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); 284 fallthrough; 285 case MT_CIPHER_TKIP: 286 case MT_CIPHER_TKIP_NO_MIC: 287 case MT_CIPHER_GCMP: 288 case MT_CIPHER_GCMP_256: 289 status->iv[0] = data[5]; 290 status->iv[1] = data[4]; 291 status->iv[2] = data[3]; 292 status->iv[3] = data[2]; 293 status->iv[4] = data[1]; 294 status->iv[5] = data[0]; 295 break; 296 default: 297 break; 298 } 299 } 300 rxd += 4; 301 if ((u8 *)rxd - skb->data >= skb->len) 302 return -EINVAL; 303 } 304 305 if (rxd1 & MT_RXD1_NORMAL_GROUP_2) { 306 status->timestamp = le32_to_cpu(rxd[0]); 307 status->flag |= RX_FLAG_MACTIME_START; 308 309 if (!(rxd2 & MT_RXD2_NORMAL_NON_AMPDU)) { 310 status->flag |= RX_FLAG_AMPDU_DETAILS; 311 312 /* all subframes of an A-MPDU have the same timestamp */ 313 if (phy->rx_ampdu_ts != status->timestamp) { 314 if (!++phy->ampdu_ref) 315 phy->ampdu_ref++; 316 } 317 phy->rx_ampdu_ts = status->timestamp; 318 319 status->ampdu_ref = phy->ampdu_ref; 320 } 321 322 rxd += 2; 323 if ((u8 *)rxd - skb->data >= skb->len) 324 return -EINVAL; 325 } 326 327 /* RXD Group 3 - P-RXV */ 328 if (rxd1 & MT_RXD1_NORMAL_GROUP_3) { 329 u32 v0, v1; 330 int ret; 331 332 rxv = rxd; 333 rxd += 2; 334 if ((u8 *)rxd - skb->data >= skb->len) 335 return -EINVAL; 336 337 v0 = le32_to_cpu(rxv[0]); 338 v1 = le32_to_cpu(rxv[1]); 339 340 if (v0 & MT_PRXV_HT_AD_CODE) 341 status->enc_flags |= RX_ENC_FLAG_LDPC; 342 343 ret = mt76_connac2_mac_fill_rx_rate(&dev->mt76, status, sband, 344 rxv, &mode); 345 if (ret < 0) 346 return ret; 347 348 if (rxd1 & MT_RXD1_NORMAL_GROUP_5) { 349 rxd += 6; 350 if ((u8 *)rxd - skb->data >= skb->len) 351 return -EINVAL; 352 353 rxv = rxd; 354 /* Monitor mode would use RCPI described in GROUP 5 355 * instead. 356 */ 357 v1 = le32_to_cpu(rxv[0]); 358 359 rxd += 12; 360 if ((u8 *)rxd - skb->data >= skb->len) 361 return -EINVAL; 362 } 363 364 status->chains = mphy->antenna_mask; 365 status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v1); 366 status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v1); 367 status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v1); 368 status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v1); 369 status->signal = -128; 370 for (i = 0; i < hweight8(mphy->antenna_mask); i++) { 371 if (!(status->chains & BIT(i)) || 372 status->chain_signal[i] >= 0) 373 continue; 374 375 status->signal = max(status->signal, 376 status->chain_signal[i]); 377 } 378 } 379 380 amsdu_info = FIELD_GET(MT_RXD4_NORMAL_PAYLOAD_FORMAT, rxd4); 381 status->amsdu = !!amsdu_info; 382 if (status->amsdu) { 383 status->first_amsdu = amsdu_info == MT_RXD4_FIRST_AMSDU_FRAME; 384 status->last_amsdu = amsdu_info == MT_RXD4_LAST_AMSDU_FRAME; 385 } 386 387 hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad; 388 if (hdr_trans && ieee80211_has_morefrags(fc)) { 389 struct ieee80211_vif *vif; 390 int err; 391 392 if (!msta || !msta->vif) 393 return -EINVAL; 394 395 vif = container_of((void *)msta->vif, struct ieee80211_vif, 396 drv_priv); 397 err = mt76_connac2_reverse_frag0_hdr_trans(vif, skb, hdr_gap); 398 if (err) 399 return err; 400 401 hdr_trans = false; 402 } else { 403 skb_pull(skb, hdr_gap); 404 if (!hdr_trans && status->amsdu) { 405 memmove(skb->data + 2, skb->data, 406 ieee80211_get_hdrlen_from_skb(skb)); 407 skb_pull(skb, 2); 408 } 409 } 410 411 if (!hdr_trans) { 412 struct ieee80211_hdr *hdr; 413 414 if (insert_ccmp_hdr) { 415 u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1); 416 417 mt76_insert_ccmp_hdr(skb, key_id); 418 } 419 420 hdr = mt76_skb_get_hdr(skb); 421 fc = hdr->frame_control; 422 if (ieee80211_is_data_qos(fc)) { 423 seq_ctrl = le16_to_cpu(hdr->seq_ctrl); 424 qos_ctl = *ieee80211_get_qos_ctl(hdr); 425 } 426 } else { 427 status->flag |= RX_FLAG_8023; 428 } 429 430 mt792x_mac_assoc_rssi(dev, skb); 431 432 if (rxv && mode >= MT_PHY_TYPE_HE_SU && !(status->flag & RX_FLAG_8023)) 433 mt76_connac2_mac_decode_he_radiotap(&dev->mt76, skb, rxv, mode); 434 435 if (!status->wcid || !ieee80211_is_data_qos(fc)) 436 return 0; 437 438 status->aggr = unicast && !ieee80211_is_qos_nullfunc(fc); 439 status->seqno = IEEE80211_SEQ_TO_SN(seq_ctrl); 440 status->qos_ctl = qos_ctl; 441 442 return 0; 443} 444 445void mt7921_mac_add_txs(struct mt792x_dev *dev, void *data) 446{ 447 struct mt792x_sta *msta = NULL; 448 struct mt76_wcid *wcid; 449 __le32 *txs_data = data; 450 u16 wcidx; 451 u8 pid; 452 453 if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1) 454 return; 455 456 wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID); 457 pid = le32_get_bits(txs_data[3], MT_TXS3_PID); 458 459 if (pid < MT_PACKET_ID_FIRST) 460 return; 461 462 if (wcidx >= MT792x_WTBL_SIZE) 463 return; 464 465 rcu_read_lock(); 466 467 wcid = rcu_dereference(dev->mt76.wcid[wcidx]); 468 if (!wcid) 469 goto out; 470 471 msta = container_of(wcid, struct mt792x_sta, wcid); 472 473 mt76_connac2_mac_add_txs_skb(&dev->mt76, wcid, pid, txs_data); 474 if (!wcid->sta) 475 goto out; 476 477 spin_lock_bh(&dev->mt76.sta_poll_lock); 478 if (list_empty(&msta->wcid.poll_list)) 479 list_add_tail(&msta->wcid.poll_list, &dev->mt76.sta_poll_list); 480 spin_unlock_bh(&dev->mt76.sta_poll_lock); 481 482out: 483 rcu_read_unlock(); 484} 485 486static void mt7921_mac_tx_free(struct mt792x_dev *dev, void *data, int len) 487{ 488 struct mt76_connac_tx_free *free = data; 489 __le32 *tx_info = (__le32 *)(data + sizeof(*free)); 490 struct mt76_dev *mdev = &dev->mt76; 491 struct mt76_txwi_cache *txwi; 492 struct ieee80211_sta *sta = NULL; 493 struct mt76_wcid *wcid = NULL; 494 struct sk_buff *skb, *tmp; 495 void *end = data + len; 496 LIST_HEAD(free_list); 497 bool wake = false; 498 u8 i, count; 499 500 /* clean DMA queues and unmap buffers first */ 501 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false); 502 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false); 503 504 count = le16_get_bits(free->ctrl, MT_TX_FREE_MSDU_CNT); 505 if (WARN_ON_ONCE((void *)&tx_info[count] > end)) 506 return; 507 508 for (i = 0; i < count; i++) { 509 u32 msdu, info = le32_to_cpu(tx_info[i]); 510 u8 stat; 511 512 /* 1'b1: new wcid pair. 513 * 1'b0: msdu_id with the same 'wcid pair' as above. 514 */ 515 if (info & MT_TX_FREE_PAIR) { 516 struct mt792x_sta *msta; 517 u16 idx; 518 519 count++; 520 idx = FIELD_GET(MT_TX_FREE_WLAN_ID, info); 521 wcid = rcu_dereference(dev->mt76.wcid[idx]); 522 sta = wcid_to_sta(wcid); 523 if (!sta) 524 continue; 525 526 msta = container_of(wcid, struct mt792x_sta, wcid); 527 spin_lock_bh(&mdev->sta_poll_lock); 528 if (list_empty(&msta->wcid.poll_list)) 529 list_add_tail(&msta->wcid.poll_list, 530 &mdev->sta_poll_list); 531 spin_unlock_bh(&mdev->sta_poll_lock); 532 continue; 533 } 534 535 msdu = FIELD_GET(MT_TX_FREE_MSDU_ID, info); 536 stat = FIELD_GET(MT_TX_FREE_STATUS, info); 537 538 if (wcid) { 539 wcid->stats.tx_retries += 540 FIELD_GET(MT_TX_FREE_COUNT, info) - 1; 541 wcid->stats.tx_failed += !!stat; 542 } 543 544 txwi = mt76_token_release(mdev, msdu, &wake); 545 if (!txwi) 546 continue; 547 548 mt76_connac2_txwi_free(mdev, txwi, sta, &free_list); 549 } 550 551 if (wake) 552 mt76_set_tx_blocked(&dev->mt76, false); 553 554 list_for_each_entry_safe(skb, tmp, &free_list, list) { 555 skb_list_del_init(skb); 556 napi_consume_skb(skb, 1); 557 } 558 559 rcu_read_lock(); 560 mt7921_mac_sta_poll(dev); 561 rcu_read_unlock(); 562 563 mt76_worker_schedule(&dev->mt76.tx_worker); 564} 565 566bool mt7921_rx_check(struct mt76_dev *mdev, void *data, int len) 567{ 568 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 569 __le32 *rxd = (__le32 *)data; 570 __le32 *end = (__le32 *)&rxd[len / 4]; 571 enum rx_pkt_type type; 572 573 type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); 574 575 switch (type) { 576 case PKT_TYPE_TXRX_NOTIFY: 577 /* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */ 578 mt7921_mac_tx_free(dev, data, len); /* mmio */ 579 return false; 580 case PKT_TYPE_TXS: 581 for (rxd += 2; rxd + 8 <= end; rxd += 8) 582 mt7921_mac_add_txs(dev, rxd); 583 return false; 584 default: 585 return true; 586 } 587} 588EXPORT_SYMBOL_GPL(mt7921_rx_check); 589 590void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 591 struct sk_buff *skb, u32 *info) 592{ 593 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 594 __le32 *rxd = (__le32 *)skb->data; 595 __le32 *end = (__le32 *)&skb->data[skb->len]; 596 enum rx_pkt_type type; 597 u16 flag; 598 599 type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); 600 flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG); 601 602 if (type == PKT_TYPE_RX_EVENT && flag == 0x1) 603 type = PKT_TYPE_NORMAL_MCU; 604 605 switch (type) { 606 case PKT_TYPE_TXRX_NOTIFY: 607 /* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */ 608 mt7921_mac_tx_free(dev, skb->data, skb->len); 609 napi_consume_skb(skb, 1); 610 break; 611 case PKT_TYPE_RX_EVENT: 612 mt7921_mcu_rx_event(dev, skb); 613 break; 614 case PKT_TYPE_TXS: 615 for (rxd += 2; rxd + 8 <= end; rxd += 8) 616 mt7921_mac_add_txs(dev, rxd); 617 dev_kfree_skb(skb); 618 break; 619 case PKT_TYPE_NORMAL_MCU: 620 case PKT_TYPE_NORMAL: 621 if (!mt7921_mac_fill_rx(dev, skb)) { 622 mt76_rx(&dev->mt76, q, skb); 623 return; 624 } 625 fallthrough; 626 default: 627 dev_kfree_skb(skb); 628 break; 629 } 630} 631EXPORT_SYMBOL_GPL(mt7921_queue_rx_skb); 632 633static void 634mt7921_vif_connect_iter(void *priv, u8 *mac, 635 struct ieee80211_vif *vif) 636{ 637 struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; 638 struct mt792x_dev *dev = mvif->phy->dev; 639 struct ieee80211_hw *hw = mt76_hw(dev); 640 641 if (vif->type == NL80211_IFTYPE_STATION) 642 ieee80211_disconnect(vif, true); 643 644 mt76_connac_mcu_uni_add_dev(&dev->mphy, vif, &mvif->sta.wcid, true); 645 mt7921_mcu_set_tx(dev, vif); 646 647 if (vif->type == NL80211_IFTYPE_AP) { 648 mt76_connac_mcu_uni_add_bss(dev->phy.mt76, vif, &mvif->sta.wcid, 649 true, NULL); 650 mt7921_mcu_sta_update(dev, NULL, vif, true, 651 MT76_STA_INFO_STATE_NONE); 652 mt7921_mcu_uni_add_beacon_offload(dev, hw, vif, true); 653 } 654} 655 656/* system error recovery */ 657void mt7921_mac_reset_work(struct work_struct *work) 658{ 659 struct mt792x_dev *dev = container_of(work, struct mt792x_dev, 660 reset_work); 661 struct ieee80211_hw *hw = mt76_hw(dev); 662 struct mt76_connac_pm *pm = &dev->pm; 663 int i, ret; 664 665 dev_dbg(dev->mt76.dev, "chip reset\n"); 666 dev->hw_full_reset = true; 667 ieee80211_stop_queues(hw); 668 669 cancel_delayed_work_sync(&dev->mphy.mac_work); 670 cancel_delayed_work_sync(&pm->ps_work); 671 cancel_work_sync(&pm->wake_work); 672 673 for (i = 0; i < 10; i++) { 674 mutex_lock(&dev->mt76.mutex); 675 ret = mt792x_dev_reset(dev); 676 mutex_unlock(&dev->mt76.mutex); 677 678 if (!ret) 679 break; 680 } 681 682 if (i == 10) 683 dev_err(dev->mt76.dev, "chip reset failed\n"); 684 685 if (test_and_clear_bit(MT76_HW_SCANNING, &dev->mphy.state)) { 686 struct cfg80211_scan_info info = { 687 .aborted = true, 688 }; 689 690 ieee80211_scan_completed(dev->mphy.hw, &info); 691 } 692 693 dev->hw_full_reset = false; 694 pm->suspended = false; 695 ieee80211_wake_queues(hw); 696 ieee80211_iterate_active_interfaces(hw, 697 IEEE80211_IFACE_ITER_RESUME_ALL, 698 mt7921_vif_connect_iter, NULL); 699 mt76_connac_power_save_sched(&dev->mt76.phy, pm); 700} 701 702void mt7921_coredump_work(struct work_struct *work) 703{ 704 struct mt792x_dev *dev; 705 char *dump, *data; 706 707 dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev, 708 coredump.work.work); 709 710 if (time_is_after_jiffies(dev->coredump.last_activity + 711 4 * MT76_CONNAC_COREDUMP_TIMEOUT)) { 712 queue_delayed_work(dev->mt76.wq, &dev->coredump.work, 713 MT76_CONNAC_COREDUMP_TIMEOUT); 714 return; 715 } 716 717 dump = vzalloc(MT76_CONNAC_COREDUMP_SZ); 718 data = dump; 719 720 while (true) { 721 struct sk_buff *skb; 722 723 spin_lock_bh(&dev->mt76.lock); 724 skb = __skb_dequeue(&dev->coredump.msg_list); 725 spin_unlock_bh(&dev->mt76.lock); 726 727 if (!skb) 728 break; 729 730 skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd)); 731 if (!dump || data + skb->len - dump > MT76_CONNAC_COREDUMP_SZ) { 732 dev_kfree_skb(skb); 733 continue; 734 } 735 736 memcpy(data, skb->data, skb->len); 737 data += skb->len; 738 739 dev_kfree_skb(skb); 740 } 741 742 if (dump) 743 dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ, 744 GFP_KERNEL); 745 746 mt792x_reset(&dev->mt76); 747} 748 749/* usb_sdio */ 750static void 751mt7921_usb_sdio_write_txwi(struct mt792x_dev *dev, struct mt76_wcid *wcid, 752 enum mt76_txq_id qid, struct ieee80211_sta *sta, 753 struct ieee80211_key_conf *key, int pid, 754 struct sk_buff *skb) 755{ 756 __le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE); 757 758 memset(txwi, 0, MT_SDIO_TXD_SIZE); 759 mt76_connac2_mac_write_txwi(&dev->mt76, txwi, skb, wcid, key, pid, qid, 0); 760 skb_push(skb, MT_SDIO_TXD_SIZE); 761} 762 763int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 764 enum mt76_txq_id qid, struct mt76_wcid *wcid, 765 struct ieee80211_sta *sta, 766 struct mt76_tx_info *tx_info) 767{ 768 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 769 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); 770 struct ieee80211_key_conf *key = info->control.hw_key; 771 struct sk_buff *skb = tx_info->skb; 772 int err, pad, pktid, type; 773 774 if (unlikely(tx_info->skb->len <= ETH_HLEN)) 775 return -EINVAL; 776 777 err = skb_cow_head(skb, MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE); 778 if (err) 779 return err; 780 781 if (!wcid) 782 wcid = &dev->mt76.global_wcid; 783 784 if (sta) { 785 struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; 786 787 if (time_after(jiffies, msta->last_txs + HZ / 4)) { 788 info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS; 789 msta->last_txs = jiffies; 790 } 791 } 792 793 pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb); 794 mt7921_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb); 795 796 type = mt76_is_sdio(mdev) ? MT7921_SDIO_DATA : 0; 797 mt7921_skb_add_usb_sdio_hdr(dev, skb, type); 798 pad = round_up(skb->len, 4) - skb->len; 799 if (mt76_is_usb(mdev)) 800 pad += 4; 801 802 err = mt76_skb_adjust_pad(skb, pad); 803 if (err) 804 /* Release pktid in case of error. */ 805 idr_remove(&wcid->pktid, pktid); 806 807 return err; 808} 809EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_prepare_skb); 810 811void mt7921_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, 812 struct mt76_queue_entry *e) 813{ 814 __le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE); 815 unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE; 816 struct ieee80211_sta *sta; 817 struct mt76_wcid *wcid; 818 u16 idx; 819 820 idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX); 821 wcid = rcu_dereference(mdev->wcid[idx]); 822 sta = wcid_to_sta(wcid); 823 824 if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE))) 825 mt76_connac2_tx_check_aggr(sta, txwi); 826 827 skb_pull(e->skb, headroom); 828 mt76_tx_complete_skb(mdev, e->wcid, e->skb); 829} 830EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_complete_skb); 831 832bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update) 833{ 834 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 835 836 mt792x_mutex_acquire(dev); 837 mt7921_mac_sta_poll(dev); 838 mt792x_mutex_release(dev); 839 840 return false; 841} 842EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_status_data); 843 844#if IS_ENABLED(CONFIG_IPV6) 845void mt7921_set_ipv6_ns_work(struct work_struct *work) 846{ 847 struct mt792x_dev *dev = container_of(work, struct mt792x_dev, 848 ipv6_ns_work); 849 struct sk_buff *skb; 850 int ret = 0; 851 852 do { 853 skb = skb_dequeue(&dev->ipv6_ns_list); 854 855 if (!skb) 856 break; 857 858 mt792x_mutex_acquire(dev); 859 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 860 MCU_UNI_CMD(OFFLOAD), true); 861 mt792x_mutex_release(dev); 862 863 } while (!ret); 864 865 if (ret) 866 skb_queue_purge(&dev->ipv6_ns_list); 867} 868#endif 869