162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * This driver is a port from stlc45xx:
662306a36Sopenharmony_ci *	Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
762306a36Sopenharmony_ci */
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci#ifndef P54SPI_H
1062306a36Sopenharmony_ci#define P54SPI_H
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci#include <linux/mutex.h>
1362306a36Sopenharmony_ci#include <linux/list.h>
1462306a36Sopenharmony_ci#include <net/mac80211.h>
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci#include "p54.h"
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci/* Bit 15 is read/write bit; ON = READ, OFF = WRITE */
1962306a36Sopenharmony_ci#define SPI_ADRS_READ_BIT_15		0x8000
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci#define SPI_ADRS_ARM_INTERRUPTS		0x00
2262306a36Sopenharmony_ci#define SPI_ADRS_ARM_INT_EN		0x04
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci#define SPI_ADRS_HOST_INTERRUPTS	0x08
2562306a36Sopenharmony_ci#define SPI_ADRS_HOST_INT_EN		0x0c
2662306a36Sopenharmony_ci#define SPI_ADRS_HOST_INT_ACK		0x10
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci#define SPI_ADRS_GEN_PURP_1		0x14
2962306a36Sopenharmony_ci#define SPI_ADRS_GEN_PURP_2		0x18
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci#define SPI_ADRS_DEV_CTRL_STAT		0x26    /* high word */
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci#define SPI_ADRS_DMA_DATA		0x28
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci#define SPI_ADRS_DMA_WRITE_CTRL		0x2c
3662306a36Sopenharmony_ci#define SPI_ADRS_DMA_WRITE_LEN		0x2e
3762306a36Sopenharmony_ci#define SPI_ADRS_DMA_WRITE_BASE		0x30
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci#define SPI_ADRS_DMA_READ_CTRL		0x34
4062306a36Sopenharmony_ci#define SPI_ADRS_DMA_READ_LEN		0x36
4162306a36Sopenharmony_ci#define SPI_ADRS_DMA_READ_BASE		0x38
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci#define SPI_CTRL_STAT_HOST_OVERRIDE	0x8000
4462306a36Sopenharmony_ci#define SPI_CTRL_STAT_START_HALTED	0x4000
4562306a36Sopenharmony_ci#define SPI_CTRL_STAT_RAM_BOOT		0x2000
4662306a36Sopenharmony_ci#define SPI_CTRL_STAT_HOST_RESET	0x1000
4762306a36Sopenharmony_ci#define SPI_CTRL_STAT_HOST_CPU_EN	0x0800
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ci#define SPI_DMA_WRITE_CTRL_ENABLE	0x0001
5062306a36Sopenharmony_ci#define SPI_DMA_READ_CTRL_ENABLE	0x0001
5162306a36Sopenharmony_ci#define HOST_ALLOWED			(1 << 7)
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ci#define SPI_TIMEOUT			100         /* msec */
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci#define SPI_MAX_TX_PACKETS		32
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci#define SPI_MAX_PACKET_SIZE		32767
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci#define SPI_TARGET_INT_WAKEUP		0x00000001
6062306a36Sopenharmony_ci#define SPI_TARGET_INT_SLEEP		0x00000002
6162306a36Sopenharmony_ci#define SPI_TARGET_INT_RDDONE		0x00000004
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci#define SPI_TARGET_INT_CTS		0x00004000
6462306a36Sopenharmony_ci#define SPI_TARGET_INT_DR		0x00008000
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_ci#define SPI_HOST_INT_READY		0x00000001
6762306a36Sopenharmony_ci#define SPI_HOST_INT_WR_READY		0x00000002
6862306a36Sopenharmony_ci#define SPI_HOST_INT_SW_UPDATE		0x00000004
6962306a36Sopenharmony_ci#define SPI_HOST_INT_UPDATE		0x10000000
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_ci/* clear to send */
7262306a36Sopenharmony_ci#define SPI_HOST_INT_CR			0x00004000
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ci/* data ready */
7562306a36Sopenharmony_ci#define SPI_HOST_INT_DR			0x00008000
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ci#define SPI_HOST_INTS_DEFAULT 						    \
7862306a36Sopenharmony_ci	(SPI_HOST_INT_READY | SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE)
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ci#define TARGET_BOOT_SLEEP 50
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_cistruct p54s_dma_regs {
8362306a36Sopenharmony_ci	__le16 cmd;
8462306a36Sopenharmony_ci	__le16 len;
8562306a36Sopenharmony_ci	__le32 addr;
8662306a36Sopenharmony_ci} __packed;
8762306a36Sopenharmony_ci
8862306a36Sopenharmony_cistruct p54s_tx_info {
8962306a36Sopenharmony_ci	struct list_head tx_list;
9062306a36Sopenharmony_ci};
9162306a36Sopenharmony_ci
9262306a36Sopenharmony_cistruct p54s_priv {
9362306a36Sopenharmony_ci	/* p54_common has to be the first entry */
9462306a36Sopenharmony_ci	struct p54_common common;
9562306a36Sopenharmony_ci	struct ieee80211_hw *hw;
9662306a36Sopenharmony_ci	struct spi_device *spi;
9762306a36Sopenharmony_ci
9862306a36Sopenharmony_ci	struct work_struct work;
9962306a36Sopenharmony_ci
10062306a36Sopenharmony_ci	struct mutex mutex;
10162306a36Sopenharmony_ci	struct completion fw_comp;
10262306a36Sopenharmony_ci
10362306a36Sopenharmony_ci	spinlock_t tx_lock;
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_ci	/* protected by tx_lock */
10662306a36Sopenharmony_ci	struct list_head tx_pending;
10762306a36Sopenharmony_ci
10862306a36Sopenharmony_ci	enum fw_state fw_state;
10962306a36Sopenharmony_ci	const struct firmware *firmware;
11062306a36Sopenharmony_ci};
11162306a36Sopenharmony_ci
11262306a36Sopenharmony_ci#endif /* P54SPI_H */
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