1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef HOSTAP_WLAN_H 3#define HOSTAP_WLAN_H 4 5#include <linux/interrupt.h> 6#include <linux/wireless.h> 7#include <linux/netdevice.h> 8#include <linux/etherdevice.h> 9#include <linux/mutex.h> 10#include <linux/refcount.h> 11#include <net/iw_handler.h> 12#include <net/ieee80211_radiotap.h> 13#include <net/lib80211.h> 14 15#include "hostap_config.h" 16#include "hostap_common.h" 17 18#define MAX_PARM_DEVICES 8 19#define PARM_MIN_MAX "1-" __MODULE_STRING(MAX_PARM_DEVICES) 20#define DEF_INTS -1, -1, -1, -1, -1, -1, -1 21#define GET_INT_PARM(var,idx) var[var[idx] < 0 ? 0 : idx] 22 23 24/* Specific skb->protocol value that indicates that the packet already contains 25 * txdesc header. 26 * FIX: This might need own value that would be allocated especially for Prism2 27 * txdesc; ETH_P_CONTROL is commented as "Card specific control frames". 28 * However, these skb's should have only minimal path in the kernel side since 29 * prism2_send_mgmt() sends these with dev_queue_xmit() to prism2_tx(). */ 30#define ETH_P_HOSTAP ETH_P_CONTROL 31 32/* ARPHRD_IEEE80211_PRISM uses a bloated version of Prism2 RX frame header 33 * (from linux-wlan-ng) */ 34struct linux_wlan_ng_val { 35 u32 did; 36 u16 status, len; 37 u32 data; 38} __packed; 39 40struct linux_wlan_ng_prism_hdr { 41 u32 msgcode, msglen; 42 char devname[16]; 43 struct linux_wlan_ng_val hosttime, mactime, channel, rssi, sq, signal, 44 noise, rate, istx, frmlen; 45} __packed; 46 47struct linux_wlan_ng_cap_hdr { 48 __be32 version; 49 __be32 length; 50 __be64 mactime; 51 __be64 hosttime; 52 __be32 phytype; 53 __be32 channel; 54 __be32 datarate; 55 __be32 antenna; 56 __be32 priority; 57 __be32 ssi_type; 58 __be32 ssi_signal; 59 __be32 ssi_noise; 60 __be32 preamble; 61 __be32 encoding; 62} __packed; 63 64struct hostap_radiotap_rx { 65 struct ieee80211_radiotap_header hdr; 66 __le64 tsft; 67 u8 rate; 68 u8 padding; 69 __le16 chan_freq; 70 __le16 chan_flags; 71 s8 dbm_antsignal; 72 s8 dbm_antnoise; 73} __packed; 74 75#define LWNG_CAP_DID_BASE (4 | (1 << 6)) /* section 4, group 1 */ 76#define LWNG_CAPHDR_VERSION 0x80211001 77 78struct hfa384x_rx_frame { 79 /* HFA384X RX frame descriptor */ 80 __le16 status; /* HFA384X_RX_STATUS_ flags */ 81 __le32 time; /* timestamp, 1 microsecond resolution */ 82 u8 silence; /* 27 .. 154; seems to be 0 */ 83 u8 signal; /* 27 .. 154 */ 84 u8 rate; /* 10, 20, 55, or 110 */ 85 u8 rxflow; 86 __le32 reserved; 87 88 /* 802.11 */ 89 __le16 frame_control; 90 __le16 duration_id; 91 u8 addr1[ETH_ALEN]; 92 u8 addr2[ETH_ALEN]; 93 u8 addr3[ETH_ALEN]; 94 __le16 seq_ctrl; 95 u8 addr4[ETH_ALEN]; 96 __le16 data_len; 97 98 /* 802.3 */ 99 u8 dst_addr[ETH_ALEN]; 100 u8 src_addr[ETH_ALEN]; 101 __be16 len; 102 103 /* followed by frame data; max 2304 bytes */ 104} __packed; 105 106 107struct hfa384x_tx_frame { 108 /* HFA384X TX frame descriptor */ 109 __le16 status; /* HFA384X_TX_STATUS_ flags */ 110 __le16 reserved1; 111 __le16 reserved2; 112 __le32 sw_support; 113 u8 retry_count; /* not yet implemented */ 114 u8 tx_rate; /* Host AP only; 0 = firmware, or 10, 20, 55, 110 */ 115 __le16 tx_control; /* HFA384X_TX_CTRL_ flags */ 116 117 /* 802.11 */ 118 struct_group(header, 119 __le16 frame_control; /* parts not used */ 120 __le16 duration_id; 121 u8 addr1[ETH_ALEN]; 122 u8 addr2[ETH_ALEN]; /* filled by firmware */ 123 u8 addr3[ETH_ALEN]; 124 __le16 seq_ctrl; /* filled by firmware */ 125 ); 126 u8 addr4[ETH_ALEN]; 127 __le16 data_len; 128 129 /* 802.3 */ 130 u8 dst_addr[ETH_ALEN]; 131 u8 src_addr[ETH_ALEN]; 132 __be16 len; 133 134 /* followed by frame data; max 2304 bytes */ 135} __packed; 136 137 138struct hfa384x_rid_hdr 139{ 140 __le16 len; 141 __le16 rid; 142} __packed; 143 144 145/* Macro for converting signal levels (range 27 .. 154) to wireless ext 146 * dBm value with some accuracy */ 147#define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100 148 149#define HFA384X_LEVEL_TO_dBm_sign(v) (v) * 100 / 255 - 100 150 151struct hfa384x_scan_request { 152 __le16 channel_list; 153 __le16 txrate; /* HFA384X_RATES_* */ 154} __packed; 155 156struct hfa384x_hostscan_request { 157 __le16 channel_list; 158 __le16 txrate; 159 __le16 target_ssid_len; 160 u8 target_ssid[32]; 161} __packed; 162 163struct hfa384x_join_request { 164 u8 bssid[ETH_ALEN]; 165 __le16 channel; 166} __packed; 167 168struct hfa384x_info_frame { 169 __le16 len; 170 __le16 type; 171} __packed; 172 173struct hfa384x_comm_tallies { 174 __le16 tx_unicast_frames; 175 __le16 tx_multicast_frames; 176 __le16 tx_fragments; 177 __le16 tx_unicast_octets; 178 __le16 tx_multicast_octets; 179 __le16 tx_deferred_transmissions; 180 __le16 tx_single_retry_frames; 181 __le16 tx_multiple_retry_frames; 182 __le16 tx_retry_limit_exceeded; 183 __le16 tx_discards; 184 __le16 rx_unicast_frames; 185 __le16 rx_multicast_frames; 186 __le16 rx_fragments; 187 __le16 rx_unicast_octets; 188 __le16 rx_multicast_octets; 189 __le16 rx_fcs_errors; 190 __le16 rx_discards_no_buffer; 191 __le16 tx_discards_wrong_sa; 192 __le16 rx_discards_wep_undecryptable; 193 __le16 rx_message_in_msg_fragments; 194 __le16 rx_message_in_bad_msg_fragments; 195} __packed; 196 197struct hfa384x_comm_tallies32 { 198 __le32 tx_unicast_frames; 199 __le32 tx_multicast_frames; 200 __le32 tx_fragments; 201 __le32 tx_unicast_octets; 202 __le32 tx_multicast_octets; 203 __le32 tx_deferred_transmissions; 204 __le32 tx_single_retry_frames; 205 __le32 tx_multiple_retry_frames; 206 __le32 tx_retry_limit_exceeded; 207 __le32 tx_discards; 208 __le32 rx_unicast_frames; 209 __le32 rx_multicast_frames; 210 __le32 rx_fragments; 211 __le32 rx_unicast_octets; 212 __le32 rx_multicast_octets; 213 __le32 rx_fcs_errors; 214 __le32 rx_discards_no_buffer; 215 __le32 tx_discards_wrong_sa; 216 __le32 rx_discards_wep_undecryptable; 217 __le32 rx_message_in_msg_fragments; 218 __le32 rx_message_in_bad_msg_fragments; 219} __packed; 220 221struct hfa384x_scan_result_hdr { 222 __le16 reserved; 223 __le16 scan_reason; 224#define HFA384X_SCAN_IN_PROGRESS 0 /* no results available yet */ 225#define HFA384X_SCAN_HOST_INITIATED 1 226#define HFA384X_SCAN_FIRMWARE_INITIATED 2 227#define HFA384X_SCAN_INQUIRY_FROM_HOST 3 228} __packed; 229 230#define HFA384X_SCAN_MAX_RESULTS 32 231 232struct hfa384x_scan_result { 233 __le16 chid; 234 __le16 anl; 235 __le16 sl; 236 u8 bssid[ETH_ALEN]; 237 __le16 beacon_interval; 238 __le16 capability; 239 __le16 ssid_len; 240 u8 ssid[32]; 241 u8 sup_rates[10]; 242 __le16 rate; 243} __packed; 244 245struct hfa384x_hostscan_result { 246 __le16 chid; 247 __le16 anl; 248 __le16 sl; 249 u8 bssid[ETH_ALEN]; 250 __le16 beacon_interval; 251 __le16 capability; 252 __le16 ssid_len; 253 u8 ssid[32]; 254 u8 sup_rates[10]; 255 __le16 rate; 256 __le16 atim; 257} __packed; 258 259struct comm_tallies_sums { 260 unsigned int tx_unicast_frames; 261 unsigned int tx_multicast_frames; 262 unsigned int tx_fragments; 263 unsigned int tx_unicast_octets; 264 unsigned int tx_multicast_octets; 265 unsigned int tx_deferred_transmissions; 266 unsigned int tx_single_retry_frames; 267 unsigned int tx_multiple_retry_frames; 268 unsigned int tx_retry_limit_exceeded; 269 unsigned int tx_discards; 270 unsigned int rx_unicast_frames; 271 unsigned int rx_multicast_frames; 272 unsigned int rx_fragments; 273 unsigned int rx_unicast_octets; 274 unsigned int rx_multicast_octets; 275 unsigned int rx_fcs_errors; 276 unsigned int rx_discards_no_buffer; 277 unsigned int tx_discards_wrong_sa; 278 unsigned int rx_discards_wep_undecryptable; 279 unsigned int rx_message_in_msg_fragments; 280 unsigned int rx_message_in_bad_msg_fragments; 281}; 282 283 284struct hfa384x_regs { 285 u16 cmd; 286 u16 evstat; 287 u16 offset0; 288 u16 offset1; 289 u16 swsupport0; 290}; 291 292 293#if defined(PRISM2_PCCARD) || defined(PRISM2_PLX) 294/* I/O ports for HFA384X Controller access */ 295#define HFA384X_CMD_OFF 0x00 296#define HFA384X_PARAM0_OFF 0x02 297#define HFA384X_PARAM1_OFF 0x04 298#define HFA384X_PARAM2_OFF 0x06 299#define HFA384X_STATUS_OFF 0x08 300#define HFA384X_RESP0_OFF 0x0A 301#define HFA384X_RESP1_OFF 0x0C 302#define HFA384X_RESP2_OFF 0x0E 303#define HFA384X_INFOFID_OFF 0x10 304#define HFA384X_CONTROL_OFF 0x14 305#define HFA384X_SELECT0_OFF 0x18 306#define HFA384X_SELECT1_OFF 0x1A 307#define HFA384X_OFFSET0_OFF 0x1C 308#define HFA384X_OFFSET1_OFF 0x1E 309#define HFA384X_RXFID_OFF 0x20 310#define HFA384X_ALLOCFID_OFF 0x22 311#define HFA384X_TXCOMPLFID_OFF 0x24 312#define HFA384X_SWSUPPORT0_OFF 0x28 313#define HFA384X_SWSUPPORT1_OFF 0x2A 314#define HFA384X_SWSUPPORT2_OFF 0x2C 315#define HFA384X_EVSTAT_OFF 0x30 316#define HFA384X_INTEN_OFF 0x32 317#define HFA384X_EVACK_OFF 0x34 318#define HFA384X_DATA0_OFF 0x36 319#define HFA384X_DATA1_OFF 0x38 320#define HFA384X_AUXPAGE_OFF 0x3A 321#define HFA384X_AUXOFFSET_OFF 0x3C 322#define HFA384X_AUXDATA_OFF 0x3E 323#endif /* PRISM2_PCCARD || PRISM2_PLX */ 324 325#ifdef PRISM2_PCI 326/* Memory addresses for ISL3874 controller access */ 327#define HFA384X_CMD_OFF 0x00 328#define HFA384X_PARAM0_OFF 0x04 329#define HFA384X_PARAM1_OFF 0x08 330#define HFA384X_PARAM2_OFF 0x0C 331#define HFA384X_STATUS_OFF 0x10 332#define HFA384X_RESP0_OFF 0x14 333#define HFA384X_RESP1_OFF 0x18 334#define HFA384X_RESP2_OFF 0x1C 335#define HFA384X_INFOFID_OFF 0x20 336#define HFA384X_CONTROL_OFF 0x28 337#define HFA384X_SELECT0_OFF 0x30 338#define HFA384X_SELECT1_OFF 0x34 339#define HFA384X_OFFSET0_OFF 0x38 340#define HFA384X_OFFSET1_OFF 0x3C 341#define HFA384X_RXFID_OFF 0x40 342#define HFA384X_ALLOCFID_OFF 0x44 343#define HFA384X_TXCOMPLFID_OFF 0x48 344#define HFA384X_PCICOR_OFF 0x4C 345#define HFA384X_SWSUPPORT0_OFF 0x50 346#define HFA384X_SWSUPPORT1_OFF 0x54 347#define HFA384X_SWSUPPORT2_OFF 0x58 348#define HFA384X_PCIHCR_OFF 0x5C 349#define HFA384X_EVSTAT_OFF 0x60 350#define HFA384X_INTEN_OFF 0x64 351#define HFA384X_EVACK_OFF 0x68 352#define HFA384X_DATA0_OFF 0x6C 353#define HFA384X_DATA1_OFF 0x70 354#define HFA384X_AUXPAGE_OFF 0x74 355#define HFA384X_AUXOFFSET_OFF 0x78 356#define HFA384X_AUXDATA_OFF 0x7C 357#define HFA384X_PCI_M0_ADDRH_OFF 0x80 358#define HFA384X_PCI_M0_ADDRL_OFF 0x84 359#define HFA384X_PCI_M0_LEN_OFF 0x88 360#define HFA384X_PCI_M0_CTL_OFF 0x8C 361#define HFA384X_PCI_STATUS_OFF 0x98 362#define HFA384X_PCI_M1_ADDRH_OFF 0xA0 363#define HFA384X_PCI_M1_ADDRL_OFF 0xA4 364#define HFA384X_PCI_M1_LEN_OFF 0xA8 365#define HFA384X_PCI_M1_CTL_OFF 0xAC 366 367/* PCI bus master control bits (these are undocumented; based on guessing and 368 * experimenting..) */ 369#define HFA384X_PCI_CTL_FROM_BAP (BIT(5) | BIT(1) | BIT(0)) 370#define HFA384X_PCI_CTL_TO_BAP (BIT(5) | BIT(0)) 371 372#endif /* PRISM2_PCI */ 373 374 375/* Command codes for CMD reg. */ 376#define HFA384X_CMDCODE_INIT 0x00 377#define HFA384X_CMDCODE_ENABLE 0x01 378#define HFA384X_CMDCODE_DISABLE 0x02 379#define HFA384X_CMDCODE_ALLOC 0x0A 380#define HFA384X_CMDCODE_TRANSMIT 0x0B 381#define HFA384X_CMDCODE_INQUIRE 0x11 382#define HFA384X_CMDCODE_ACCESS 0x21 383#define HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8)) 384#define HFA384X_CMDCODE_DOWNLOAD 0x22 385#define HFA384X_CMDCODE_READMIF 0x30 386#define HFA384X_CMDCODE_WRITEMIF 0x31 387#define HFA384X_CMDCODE_TEST 0x38 388 389#define HFA384X_CMDCODE_MASK 0x3F 390 391/* Test mode operations */ 392#define HFA384X_TEST_CHANGE_CHANNEL 0x08 393#define HFA384X_TEST_MONITOR 0x0B 394#define HFA384X_TEST_STOP 0x0F 395#define HFA384X_TEST_CFG_BITS 0x15 396#define HFA384X_TEST_CFG_BIT_ALC BIT(3) 397 398#define HFA384X_CMD_BUSY BIT(15) 399 400#define HFA384X_CMD_TX_RECLAIM BIT(8) 401 402#define HFA384X_OFFSET_ERR BIT(14) 403#define HFA384X_OFFSET_BUSY BIT(15) 404 405 406/* ProgMode for download command */ 407#define HFA384X_PROGMODE_DISABLE 0 408#define HFA384X_PROGMODE_ENABLE_VOLATILE 1 409#define HFA384X_PROGMODE_ENABLE_NON_VOLATILE 2 410#define HFA384X_PROGMODE_PROGRAM_NON_VOLATILE 3 411 412#define HFA384X_AUX_MAGIC0 0xfe01 413#define HFA384X_AUX_MAGIC1 0xdc23 414#define HFA384X_AUX_MAGIC2 0xba45 415 416#define HFA384X_AUX_PORT_DISABLED 0 417#define HFA384X_AUX_PORT_DISABLE BIT(14) 418#define HFA384X_AUX_PORT_ENABLE BIT(15) 419#define HFA384X_AUX_PORT_ENABLED (BIT(14) | BIT(15)) 420#define HFA384X_AUX_PORT_MASK (BIT(14) | BIT(15)) 421 422#define PRISM2_PDA_SIZE 1024 423 424 425/* Events; EvStat, Interrupt mask (IntEn), and acknowledge bits (EvAck) */ 426#define HFA384X_EV_TICK BIT(15) 427#define HFA384X_EV_WTERR BIT(14) 428#define HFA384X_EV_INFDROP BIT(13) 429#ifdef PRISM2_PCI 430#define HFA384X_EV_PCI_M1 BIT(9) 431#define HFA384X_EV_PCI_M0 BIT(8) 432#endif /* PRISM2_PCI */ 433#define HFA384X_EV_INFO BIT(7) 434#define HFA384X_EV_DTIM BIT(5) 435#define HFA384X_EV_CMD BIT(4) 436#define HFA384X_EV_ALLOC BIT(3) 437#define HFA384X_EV_TXEXC BIT(2) 438#define HFA384X_EV_TX BIT(1) 439#define HFA384X_EV_RX BIT(0) 440 441 442/* HFA384X Information frames */ 443#define HFA384X_INFO_HANDOVERADDR 0xF000 /* AP f/w ? */ 444#define HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 /* AP f/w 1.3.7 */ 445#define HFA384X_INFO_COMMTALLIES 0xF100 446#define HFA384X_INFO_SCANRESULTS 0xF101 447#define HFA384X_INFO_CHANNELINFORESULTS 0xF102 /* AP f/w only */ 448#define HFA384X_INFO_HOSTSCANRESULTS 0xF103 449#define HFA384X_INFO_LINKSTATUS 0xF200 450#define HFA384X_INFO_ASSOCSTATUS 0xF201 /* ? */ 451#define HFA384X_INFO_AUTHREQ 0xF202 /* ? */ 452#define HFA384X_INFO_PSUSERCNT 0xF203 /* ? */ 453#define HFA384X_INFO_KEYIDCHANGED 0xF204 /* ? */ 454 455enum { HFA384X_LINKSTATUS_CONNECTED = 1, 456 HFA384X_LINKSTATUS_DISCONNECTED = 2, 457 HFA384X_LINKSTATUS_AP_CHANGE = 3, 458 HFA384X_LINKSTATUS_AP_OUT_OF_RANGE = 4, 459 HFA384X_LINKSTATUS_AP_IN_RANGE = 5, 460 HFA384X_LINKSTATUS_ASSOC_FAILED = 6 }; 461 462enum { HFA384X_PORTTYPE_BSS = 1, HFA384X_PORTTYPE_WDS = 2, 463 HFA384X_PORTTYPE_PSEUDO_IBSS = 3, HFA384X_PORTTYPE_IBSS = 0, 464 HFA384X_PORTTYPE_HOSTAP = 6 }; 465 466#define HFA384X_RATES_1MBPS BIT(0) 467#define HFA384X_RATES_2MBPS BIT(1) 468#define HFA384X_RATES_5MBPS BIT(2) 469#define HFA384X_RATES_11MBPS BIT(3) 470 471#define HFA384X_ROAMING_FIRMWARE 1 472#define HFA384X_ROAMING_HOST 2 473#define HFA384X_ROAMING_DISABLED 3 474 475#define HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0) 476#define HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED BIT(1) 477#define HFA384X_WEPFLAGS_HOSTENCRYPT BIT(4) 478#define HFA384X_WEPFLAGS_HOSTDECRYPT BIT(7) 479 480#define HFA384X_RX_STATUS_MSGTYPE (BIT(15) | BIT(14) | BIT(13)) 481#define HFA384X_RX_STATUS_PCF BIT(12) 482#define HFA384X_RX_STATUS_MACPORT (BIT(10) | BIT(9) | BIT(8)) 483#define HFA384X_RX_STATUS_UNDECR BIT(1) 484#define HFA384X_RX_STATUS_FCSERR BIT(0) 485 486#define HFA384X_RX_STATUS_GET_MSGTYPE(s) \ 487(((s) & HFA384X_RX_STATUS_MSGTYPE) >> 13) 488#define HFA384X_RX_STATUS_GET_MACPORT(s) \ 489(((s) & HFA384X_RX_STATUS_MACPORT) >> 8) 490 491enum { HFA384X_RX_MSGTYPE_NORMAL = 0, HFA384X_RX_MSGTYPE_RFC1042 = 1, 492 HFA384X_RX_MSGTYPE_BRIDGETUNNEL = 2, HFA384X_RX_MSGTYPE_MGMT = 4 }; 493 494 495#define HFA384X_TX_CTRL_ALT_RTRY BIT(5) 496#define HFA384X_TX_CTRL_802_11 BIT(3) 497#define HFA384X_TX_CTRL_802_3 0 498#define HFA384X_TX_CTRL_TX_EX BIT(2) 499#define HFA384X_TX_CTRL_TX_OK BIT(1) 500 501#define HFA384X_TX_STATUS_RETRYERR BIT(0) 502#define HFA384X_TX_STATUS_AGEDERR BIT(1) 503#define HFA384X_TX_STATUS_DISCON BIT(2) 504#define HFA384X_TX_STATUS_FORMERR BIT(3) 505 506/* HFA3861/3863 (BBP) Control Registers */ 507#define HFA386X_CR_TX_CONFIGURE 0x12 /* CR9 */ 508#define HFA386X_CR_RX_CONFIGURE 0x14 /* CR10 */ 509#define HFA386X_CR_A_D_TEST_MODES2 0x1A /* CR13 */ 510#define HFA386X_CR_MANUAL_TX_POWER 0x3E /* CR31 */ 511#define HFA386X_CR_MEASURED_TX_POWER 0x74 /* CR58 */ 512 513 514#ifdef __KERNEL__ 515 516#define PRISM2_TXFID_COUNT 8 517#define PRISM2_DATA_MAXLEN 2304 518#define PRISM2_TXFID_LEN (PRISM2_DATA_MAXLEN + sizeof(struct hfa384x_tx_frame)) 519#define PRISM2_TXFID_EMPTY 0xffff 520#define PRISM2_TXFID_RESERVED 0xfffe 521#define PRISM2_DUMMY_FID 0xffff 522#define MAX_SSID_LEN 32 523#define MAX_NAME_LEN 32 /* this is assumed to be equal to MAX_SSID_LEN */ 524 525#define PRISM2_DUMP_RX_HDR BIT(0) 526#define PRISM2_DUMP_TX_HDR BIT(1) 527#define PRISM2_DUMP_TXEXC_HDR BIT(2) 528 529struct hostap_tx_callback_info { 530 u16 idx; 531 void (*func)(struct sk_buff *, int ok, void *); 532 void *data; 533 struct hostap_tx_callback_info *next; 534}; 535 536 537/* IEEE 802.11 requires that STA supports concurrent reception of at least 538 * three fragmented frames. This define can be increased to support more 539 * concurrent frames, but it should be noted that each entry can consume about 540 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */ 541#define PRISM2_FRAG_CACHE_LEN 4 542 543struct prism2_frag_entry { 544 unsigned long first_frag_time; 545 unsigned int seq; 546 unsigned int last_frag; 547 struct sk_buff *skb; 548 u8 src_addr[ETH_ALEN]; 549 u8 dst_addr[ETH_ALEN]; 550}; 551 552 553struct hostap_cmd_queue { 554 struct list_head list; 555 wait_queue_head_t compl; 556 volatile enum { CMD_SLEEP, CMD_CALLBACK, CMD_COMPLETED } type; 557 void (*callback)(struct net_device *dev, long context, u16 resp0, 558 u16 res); 559 long context; 560 u16 cmd, param0, param1; 561 u16 resp0, res; 562 volatile int issued, issuing; 563 564 refcount_t usecnt; 565 int del_req; 566}; 567 568/* options for hw_shutdown */ 569#define HOSTAP_HW_NO_DISABLE BIT(0) 570#define HOSTAP_HW_ENABLE_CMDCOMPL BIT(1) 571 572typedef struct local_info local_info_t; 573 574struct prism2_helper_functions { 575 /* these functions are defined in hardware model specific files 576 * (hostap_{cs,plx,pci}.c */ 577 int (*card_present)(local_info_t *local); 578 void (*cor_sreset)(local_info_t *local); 579 void (*genesis_reset)(local_info_t *local, int hcr); 580 581 /* the following functions are from hostap_hw.c, but they may have some 582 * hardware model specific code */ 583 584 /* FIX: low-level commands like cmd might disappear at some point to 585 * make it easier to change them if needed (e.g., cmd would be replaced 586 * with write_mif/read_mif/testcmd/inquire); at least get_rid and 587 * set_rid might move to hostap_{cs,plx,pci}.c */ 588 int (*cmd)(struct net_device *dev, u16 cmd, u16 param0, u16 *param1, 589 u16 *resp0); 590 void (*read_regs)(struct net_device *dev, struct hfa384x_regs *regs); 591 int (*get_rid)(struct net_device *dev, u16 rid, void *buf, int len, 592 int exact_len); 593 int (*set_rid)(struct net_device *dev, u16 rid, void *buf, int len); 594 int (*hw_enable)(struct net_device *dev, int initial); 595 int (*hw_config)(struct net_device *dev, int initial); 596 void (*hw_reset)(struct net_device *dev); 597 void (*hw_shutdown)(struct net_device *dev, int no_disable); 598 int (*reset_port)(struct net_device *dev); 599 void (*schedule_reset)(local_info_t *local); 600 int (*download)(local_info_t *local, 601 struct prism2_download_param *param); 602 int (*tx)(struct sk_buff *skb, struct net_device *dev); 603 int (*set_tim)(struct net_device *dev, int aid, int set); 604 const struct proc_ops *read_aux_proc_ops; 605 606 int need_tx_headroom; /* number of bytes of headroom needed before 607 * IEEE 802.11 header */ 608 enum { HOSTAP_HW_PCCARD, HOSTAP_HW_PLX, HOSTAP_HW_PCI } hw_type; 609}; 610 611 612struct prism2_download_data { 613 u32 dl_cmd; 614 u32 start_addr; 615 u32 num_areas; 616 struct prism2_download_data_area { 617 u32 addr; /* wlan card address */ 618 u32 len; 619 u8 *data; /* allocated data */ 620 } data[]; 621}; 622 623 624#define HOSTAP_MAX_BSS_COUNT 64 625#define MAX_WPA_IE_LEN 64 626 627struct hostap_bss_info { 628 struct list_head list; 629 unsigned long last_update; 630 unsigned int count; 631 u8 bssid[ETH_ALEN]; 632 u16 capab_info; 633 u8 ssid[32]; 634 size_t ssid_len; 635 u8 wpa_ie[MAX_WPA_IE_LEN]; 636 size_t wpa_ie_len; 637 u8 rsn_ie[MAX_WPA_IE_LEN]; 638 size_t rsn_ie_len; 639 int chan; 640 int included; 641}; 642 643 644/* Per radio private Host AP data - shared by all net devices interfaces used 645 * by each radio (wlan#, wlan#ap, wlan#sta, WDS). 646 * ((struct hostap_interface *) netdev_priv(dev))->local points to this 647 * structure. */ 648struct local_info { 649 struct module *hw_module; 650 int card_idx; 651 int dev_enabled; 652 int master_dev_auto_open; /* was master device opened automatically */ 653 int num_dev_open; /* number of open devices */ 654 struct net_device *dev; /* master radio device */ 655 struct net_device *ddev; /* main data device */ 656 struct list_head hostap_interfaces; /* Host AP interface list (contains 657 * struct hostap_interface entries) 658 */ 659 rwlock_t iface_lock; /* hostap_interfaces read lock; use write lock 660 * when removing entries from the list. 661 * TX and RX paths can use read lock. */ 662 spinlock_t cmdlock, baplock, lock, irq_init_lock; 663 struct mutex rid_bap_mtx; 664 u16 infofid; /* MAC buffer id for info frame */ 665 /* txfid, intransmitfid, next_txtid, and next_alloc are protected by 666 * txfidlock */ 667 spinlock_t txfidlock; 668 int txfid_len; /* length of allocated TX buffers */ 669 u16 txfid[PRISM2_TXFID_COUNT]; /* buffer IDs for TX frames */ 670 /* buffer IDs for intransmit frames or PRISM2_TXFID_EMPTY if 671 * corresponding txfid is free for next TX frame */ 672 u16 intransmitfid[PRISM2_TXFID_COUNT]; 673 int next_txfid; /* index to the next txfid to be checked for 674 * availability */ 675 int next_alloc; /* index to the next intransmitfid to be checked for 676 * allocation events */ 677 678 /* bitfield for atomic bitops */ 679#define HOSTAP_BITS_TRANSMIT 0 680#define HOSTAP_BITS_BAP_TASKLET 1 681#define HOSTAP_BITS_BAP_TASKLET2 2 682 unsigned long bits; 683 684 struct ap_data *ap; 685 686 char essid[MAX_SSID_LEN + 1]; 687 char name[MAX_NAME_LEN + 1]; 688 int name_set; 689 u16 channel_mask; /* mask of allowed channels */ 690 u16 scan_channel_mask; /* mask of channels to be scanned */ 691 struct comm_tallies_sums comm_tallies; 692 struct proc_dir_entry *proc; 693 int iw_mode; /* operating mode (IW_MODE_*) */ 694 int pseudo_adhoc; /* 0: IW_MODE_ADHOC is real 802.11 compliant IBSS 695 * 1: IW_MODE_ADHOC is "pseudo IBSS" */ 696 char bssid[ETH_ALEN]; 697 int channel; 698 int beacon_int; 699 int dtim_period; 700 int mtu; 701 int frame_dump; /* dump RX/TX frame headers, PRISM2_DUMP_ flags */ 702 int fw_tx_rate_control; 703 u16 tx_rate_control; 704 u16 basic_rates; 705 int hw_resetting; 706 int hw_ready; 707 int hw_reset_tries; /* how many times reset has been tried */ 708 int hw_downloading; 709 int shutdown; 710 int pri_only; 711 int no_pri; /* no PRI f/w present */ 712 int sram_type; /* 8 = x8 SRAM, 16 = x16 SRAM, -1 = unknown */ 713 714 enum { 715 PRISM2_TXPOWER_AUTO = 0, PRISM2_TXPOWER_OFF, 716 PRISM2_TXPOWER_FIXED, PRISM2_TXPOWER_UNKNOWN 717 } txpower_type; 718 int txpower; /* if txpower_type == PRISM2_TXPOWER_FIXED */ 719 720 /* command queue for hfa384x_cmd(); protected with cmdlock */ 721 struct list_head cmd_queue; 722 /* max_len for cmd_queue; in addition, cmd_callback can use two 723 * additional entries to prevent sleeping commands from stopping 724 * transmits */ 725#define HOSTAP_CMD_QUEUE_MAX_LEN 16 726 int cmd_queue_len; /* number of entries in cmd_queue */ 727 728 /* if card timeout is detected in interrupt context, reset_queue is 729 * used to schedule card reseting to be done in user context */ 730 struct work_struct reset_queue; 731 732 /* For scheduling a change of the promiscuous mode RID */ 733 int is_promisc; 734 struct work_struct set_multicast_list_queue; 735 736 struct work_struct set_tim_queue; 737 struct list_head set_tim_list; 738 spinlock_t set_tim_lock; 739 740 int wds_max_connections; 741 int wds_connections; 742#define HOSTAP_WDS_BROADCAST_RA BIT(0) 743#define HOSTAP_WDS_AP_CLIENT BIT(1) 744#define HOSTAP_WDS_STANDARD_FRAME BIT(2) 745 u32 wds_type; 746 u16 tx_control; /* flags to be used in TX description */ 747 int manual_retry_count; /* -1 = use f/w default; otherwise retry count 748 * to be used with all frames */ 749 750 struct iw_statistics wstats; 751 unsigned long scan_timestamp; /* Time started to scan */ 752 enum { 753 PRISM2_MONITOR_80211 = 0, PRISM2_MONITOR_PRISM = 1, 754 PRISM2_MONITOR_CAPHDR = 2, PRISM2_MONITOR_RADIOTAP = 3 755 } monitor_type; 756 int monitor_allow_fcserr; 757 758 int hostapd; /* whether user space daemon, hostapd, is used for AP 759 * management */ 760 int hostapd_sta; /* whether hostapd is used with an extra STA interface 761 */ 762 struct net_device *apdev; 763 struct net_device_stats apdevstats; 764 765 char assoc_ap_addr[ETH_ALEN]; 766 struct net_device *stadev; 767 struct net_device_stats stadevstats; 768 769#define WEP_KEYS 4 770#define WEP_KEY_LEN 13 771 struct lib80211_crypt_info crypt_info; 772 773 int open_wep; /* allow unencrypted frames */ 774 int host_encrypt; 775 int host_decrypt; 776 int privacy_invoked; /* force privacy invoked flag even if no keys are 777 * configured */ 778 int fw_encrypt_ok; /* whether firmware-based WEP encrypt is working 779 * in Host AP mode (STA f/w 1.4.9 or newer) */ 780 int bcrx_sta_key; /* use individual keys to override default keys even 781 * with RX of broad/multicast frames */ 782 783 struct prism2_frag_entry frag_cache[PRISM2_FRAG_CACHE_LEN]; 784 unsigned int frag_next_idx; 785 786 int ieee_802_1x; /* is IEEE 802.1X used */ 787 788 int antsel_tx, antsel_rx; 789 int rts_threshold; /* dot11RTSThreshold */ 790 int fragm_threshold; /* dot11FragmentationThreshold */ 791 int auth_algs; /* PRISM2_AUTH_ flags */ 792 793 int enh_sec; /* cnfEnhSecurity options (broadcast SSID hide/ignore) */ 794 int tallies32; /* 32-bit tallies in use */ 795 796 struct prism2_helper_functions *func; 797 798 u8 *pda; 799 int fw_ap; 800#define PRISM2_FW_VER(major, minor, variant) \ 801(((major) << 16) | ((minor) << 8) | variant) 802 u32 sta_fw_ver; 803 804 /* Tasklets for handling hardware IRQ related operations outside hw IRQ 805 * handler */ 806 struct tasklet_struct bap_tasklet; 807 808 struct tasklet_struct info_tasklet; 809 struct sk_buff_head info_list; /* info frames as skb's for 810 * info_tasklet */ 811 812 struct hostap_tx_callback_info *tx_callback; /* registered TX callbacks 813 */ 814 815 struct tasklet_struct rx_tasklet; 816 struct sk_buff_head rx_list; 817 818 struct tasklet_struct sta_tx_exc_tasklet; 819 struct sk_buff_head sta_tx_exc_list; 820 821 int host_roaming; 822 unsigned long last_join_time; /* time of last JoinRequest */ 823 struct hfa384x_hostscan_result *last_scan_results; 824 int last_scan_results_count; 825 enum { PRISM2_SCAN, PRISM2_HOSTSCAN } last_scan_type; 826 struct work_struct info_queue; 827 unsigned long pending_info; /* bit field of pending info_queue items */ 828#define PRISM2_INFO_PENDING_LINKSTATUS 0 829#define PRISM2_INFO_PENDING_SCANRESULTS 1 830 int prev_link_status; /* previous received LinkStatus info */ 831 int prev_linkstatus_connected; 832 u8 preferred_ap[ETH_ALEN]; /* use this AP if possible */ 833 834#ifdef PRISM2_CALLBACK 835 void *callback_data; /* Can be used in callbacks; e.g., allocate 836 * on enable event and free on disable event. 837 * Host AP driver code does not touch this. */ 838#endif /* PRISM2_CALLBACK */ 839 840 wait_queue_head_t hostscan_wq; 841 842 /* Passive scan in Host AP mode */ 843 struct timer_list passive_scan_timer; 844 int passive_scan_interval; /* in seconds, 0 = disabled */ 845 int passive_scan_channel; 846 enum { PASSIVE_SCAN_WAIT, PASSIVE_SCAN_LISTEN } passive_scan_state; 847 848 struct timer_list tick_timer; 849 unsigned long last_tick_timer; 850 unsigned int sw_tick_stuck; 851 852 /* commsQuality / dBmCommsQuality data from periodic polling; only 853 * valid for Managed and Ad-hoc modes */ 854 unsigned long last_comms_qual_update; 855 int comms_qual; /* in some odd unit.. */ 856 int avg_signal; /* in dB (note: negative) */ 857 int avg_noise; /* in dB (note: negative) */ 858 struct work_struct comms_qual_update; 859 860 /* RSSI to dBm adjustment (for RX descriptor fields) */ 861 int rssi_to_dBm; /* subtract from RSSI to get approximate dBm value */ 862 863 /* BSS list / protected by local->lock */ 864 struct list_head bss_list; 865 int num_bss_info; 866 int wpa; /* WPA support enabled */ 867 int tkip_countermeasures; 868 int drop_unencrypted; 869 /* Generic IEEE 802.11 info element to be added to 870 * ProbeResp/Beacon/(Re)AssocReq */ 871 u8 *generic_elem; 872 size_t generic_elem_len; 873 874#ifdef PRISM2_DOWNLOAD_SUPPORT 875 /* Persistent volatile download data */ 876 struct prism2_download_data *dl_pri; 877 struct prism2_download_data *dl_sec; 878#endif /* PRISM2_DOWNLOAD_SUPPORT */ 879 880#ifdef PRISM2_IO_DEBUG 881#define PRISM2_IO_DEBUG_SIZE 10000 882 u32 io_debug[PRISM2_IO_DEBUG_SIZE]; 883 int io_debug_head; 884 int io_debug_enabled; 885#endif /* PRISM2_IO_DEBUG */ 886 887 /* Pointer to hardware model specific (cs,pci,plx) private data. */ 888 void *hw_priv; 889}; 890 891 892/* Per interface private Host AP data 893 * Allocated for each net device that Host AP uses (wlan#, wlan#ap, wlan#sta, 894 * WDS) and netdev_priv(dev) points to this structure. */ 895struct hostap_interface { 896 struct list_head list; /* list entry in Host AP interface list */ 897 struct net_device *dev; /* pointer to this device */ 898 struct local_info *local; /* pointer to shared private data */ 899 struct net_device_stats stats; 900 struct iw_spy_data spy_data; /* iwspy support */ 901 struct iw_public_data wireless_data; 902 903 enum { 904 HOSTAP_INTERFACE_MASTER, 905 HOSTAP_INTERFACE_MAIN, 906 HOSTAP_INTERFACE_AP, 907 HOSTAP_INTERFACE_STA, 908 HOSTAP_INTERFACE_WDS, 909 } type; 910 911 union { 912 struct hostap_interface_wds { 913 u8 remote_addr[ETH_ALEN]; 914 } wds; 915 } u; 916}; 917 918 919#define HOSTAP_SKB_TX_DATA_MAGIC 0xf08a36a2 920 921/* 922 * TX meta data - stored in skb->cb buffer, so this must not be increased over 923 * the 48-byte limit. 924 * THE PADDING THIS STARTS WITH IS A HORRIBLE HACK THAT SHOULD NOT LIVE 925 * TO SEE THE DAY. 926 */ 927struct hostap_skb_tx_data { 928 unsigned int __padding_for_default_qdiscs; 929 u32 magic; /* HOSTAP_SKB_TX_DATA_MAGIC */ 930 u8 rate; /* transmit rate */ 931#define HOSTAP_TX_FLAGS_WDS BIT(0) 932#define HOSTAP_TX_FLAGS_BUFFERED_FRAME BIT(1) 933#define HOSTAP_TX_FLAGS_ADD_MOREDATA BIT(2) 934 u8 flags; /* HOSTAP_TX_FLAGS_* */ 935 u16 tx_cb_idx; 936 struct hostap_interface *iface; 937 unsigned long jiffies; /* queueing timestamp */ 938 unsigned short ethertype; 939}; 940 941 942#ifndef PRISM2_NO_DEBUG 943 944#define DEBUG_FID BIT(0) 945#define DEBUG_PS BIT(1) 946#define DEBUG_FLOW BIT(2) 947#define DEBUG_AP BIT(3) 948#define DEBUG_HW BIT(4) 949#define DEBUG_EXTRA BIT(5) 950#define DEBUG_EXTRA2 BIT(6) 951#define DEBUG_PS2 BIT(7) 952#define DEBUG_MASK (DEBUG_PS | DEBUG_AP | DEBUG_HW | DEBUG_EXTRA) 953#define PDEBUG(n, args...) \ 954do { if ((n) & DEBUG_MASK) printk(KERN_DEBUG args); } while (0) 955#define PDEBUG2(n, args...) \ 956do { if ((n) & DEBUG_MASK) printk(args); } while (0) 957 958#else /* PRISM2_NO_DEBUG */ 959 960#define PDEBUG(n, args...) 961#define PDEBUG2(n, args...) 962 963#endif /* PRISM2_NO_DEBUG */ 964 965enum { BAP0 = 0, BAP1 = 1 }; 966 967#define PRISM2_IO_DEBUG_CMD_INB 0 968#define PRISM2_IO_DEBUG_CMD_INW 1 969#define PRISM2_IO_DEBUG_CMD_INSW 2 970#define PRISM2_IO_DEBUG_CMD_OUTB 3 971#define PRISM2_IO_DEBUG_CMD_OUTW 4 972#define PRISM2_IO_DEBUG_CMD_OUTSW 5 973#define PRISM2_IO_DEBUG_CMD_ERROR 6 974#define PRISM2_IO_DEBUG_CMD_INTERRUPT 7 975 976#ifdef PRISM2_IO_DEBUG 977 978#define PRISM2_IO_DEBUG_ENTRY(cmd, reg, value) \ 979(((cmd) << 24) | ((reg) << 16) | value) 980 981static inline void prism2_io_debug_add(struct net_device *dev, int cmd, 982 int reg, int value) 983{ 984 struct hostap_interface *iface = netdev_priv(dev); 985 local_info_t *local = iface->local; 986 987 if (!local->io_debug_enabled) 988 return; 989 990 local->io_debug[local->io_debug_head] = jiffies & 0xffffffff; 991 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE) 992 local->io_debug_head = 0; 993 local->io_debug[local->io_debug_head] = 994 PRISM2_IO_DEBUG_ENTRY(cmd, reg, value); 995 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE) 996 local->io_debug_head = 0; 997} 998 999 1000static inline void prism2_io_debug_error(struct net_device *dev, int err) 1001{ 1002 struct hostap_interface *iface = netdev_priv(dev); 1003 local_info_t *local = iface->local; 1004 unsigned long flags; 1005 1006 if (!local->io_debug_enabled) 1007 return; 1008 1009 spin_lock_irqsave(&local->lock, flags); 1010 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_ERROR, 0, err); 1011 if (local->io_debug_enabled == 1) { 1012 local->io_debug_enabled = 0; 1013 printk(KERN_DEBUG "%s: I/O debug stopped\n", dev->name); 1014 } 1015 spin_unlock_irqrestore(&local->lock, flags); 1016} 1017 1018#else /* PRISM2_IO_DEBUG */ 1019 1020static inline void prism2_io_debug_add(struct net_device *dev, int cmd, 1021 int reg, int value) 1022{ 1023} 1024 1025static inline void prism2_io_debug_error(struct net_device *dev, int err) 1026{ 1027} 1028 1029#endif /* PRISM2_IO_DEBUG */ 1030 1031 1032#ifdef PRISM2_CALLBACK 1033enum { 1034 /* Called when card is enabled */ 1035 PRISM2_CALLBACK_ENABLE, 1036 1037 /* Called when card is disabled */ 1038 PRISM2_CALLBACK_DISABLE, 1039 1040 /* Called when RX/TX starts/ends */ 1041 PRISM2_CALLBACK_RX_START, PRISM2_CALLBACK_RX_END, 1042 PRISM2_CALLBACK_TX_START, PRISM2_CALLBACK_TX_END 1043}; 1044void prism2_callback(local_info_t *local, int event); 1045#else /* PRISM2_CALLBACK */ 1046#define prism2_callback(d, e) do { } while (0) 1047#endif /* PRISM2_CALLBACK */ 1048 1049#endif /* __KERNEL__ */ 1050 1051#endif /* HOSTAP_WLAN_H */ 1052