1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*
3 * Copyright (C) 2012-2014, 2018-2023 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7#include <net/mac80211.h>
8#include <linux/netdevice.h>
9#include <linux/dmi.h>
10
11#include "iwl-trans.h"
12#include "iwl-op-mode.h"
13#include "fw/img.h"
14#include "iwl-debug.h"
15#include "iwl-prph.h"
16#include "fw/acpi.h"
17#include "fw/pnvm.h"
18
19#include "mvm.h"
20#include "fw/dbg.h"
21#include "iwl-phy-db.h"
22#include "iwl-modparams.h"
23#include "iwl-nvm-parse.h"
24#include "time-sync.h"
25
26#define MVM_UCODE_ALIVE_TIMEOUT	(HZ)
27#define MVM_UCODE_CALIB_TIMEOUT	(2 * HZ)
28
29#define IWL_TAS_US_MCC 0x5553
30#define IWL_TAS_CANADA_MCC 0x4341
31
32struct iwl_mvm_alive_data {
33	bool valid;
34	u32 scd_base_addr;
35};
36
37static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
38{
39	struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
40		.valid = cpu_to_le32(valid_tx_ant),
41	};
42
43	IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
44	return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
45				    sizeof(tx_ant_cmd), &tx_ant_cmd);
46}
47
48static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
49{
50	int i;
51	struct iwl_rss_config_cmd cmd = {
52		.flags = cpu_to_le32(IWL_RSS_ENABLE),
53		.hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
54			     BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
55			     BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
56			     BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
57			     BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
58			     BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
59	};
60
61	if (mvm->trans->num_rx_queues == 1)
62		return 0;
63
64	/* Do not direct RSS traffic to Q 0 which is our fallback queue */
65	for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
66		cmd.indirection_table[i] =
67			1 + (i % (mvm->trans->num_rx_queues - 1));
68	netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
69
70	return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
71}
72
73static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
74{
75	struct iwl_dqa_enable_cmd dqa_cmd = {
76		.cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
77	};
78	u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD);
79	int ret;
80
81	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
82	if (ret)
83		IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
84	else
85		IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
86
87	return ret;
88}
89
90void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
91				   struct iwl_rx_cmd_buffer *rxb)
92{
93	struct iwl_rx_packet *pkt = rxb_addr(rxb);
94	struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
95	__le32 *dump_data = mfu_dump_notif->data;
96	int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
97	int i;
98
99	if (mfu_dump_notif->index_num == 0)
100		IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
101			 le32_to_cpu(mfu_dump_notif->assert_id));
102
103	for (i = 0; i < n_words; i++)
104		IWL_DEBUG_INFO(mvm,
105			       "MFUART assert dump, dword %u: 0x%08x\n",
106			       le16_to_cpu(mfu_dump_notif->index_num) *
107			       n_words + i,
108			       le32_to_cpu(dump_data[i]));
109}
110
111static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
112			 struct iwl_rx_packet *pkt, void *data)
113{
114	unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
115	struct iwl_mvm *mvm =
116		container_of(notif_wait, struct iwl_mvm, notif_wait);
117	struct iwl_mvm_alive_data *alive_data = data;
118	struct iwl_umac_alive *umac;
119	struct iwl_lmac_alive *lmac1;
120	struct iwl_lmac_alive *lmac2 = NULL;
121	u16 status;
122	u32 lmac_error_event_table, umac_error_table;
123	u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
124					      UCODE_ALIVE_NTFY, 0);
125	u32 i;
126
127
128	if (version == 6) {
129		struct iwl_alive_ntf_v6 *palive;
130
131		if (pkt_len < sizeof(*palive))
132			return false;
133
134		palive = (void *)pkt->data;
135		mvm->trans->dbg.imr_data.imr_enable =
136			le32_to_cpu(palive->imr.enabled);
137		mvm->trans->dbg.imr_data.imr_size =
138			le32_to_cpu(palive->imr.size);
139		mvm->trans->dbg.imr_data.imr2sram_remainbyte =
140			mvm->trans->dbg.imr_data.imr_size;
141		mvm->trans->dbg.imr_data.imr_base_addr =
142			palive->imr.base_addr;
143		mvm->trans->dbg.imr_data.imr_curr_addr =
144			le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr);
145		IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x  size 0x0%x Address 0x%016llx\n",
146			     mvm->trans->dbg.imr_data.imr_enable,
147			     mvm->trans->dbg.imr_data.imr_size,
148			     le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr));
149
150		if (!mvm->trans->dbg.imr_data.imr_enable) {
151			for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) {
152				struct iwl_ucode_tlv *reg_tlv;
153				struct iwl_fw_ini_region_tlv *reg;
154
155				reg_tlv = mvm->trans->dbg.active_regions[i];
156				if (!reg_tlv)
157					continue;
158
159				reg = (void *)reg_tlv->data;
160				/*
161				 * We have only one DRAM IMR region, so we
162				 * can break as soon as we find the first
163				 * one.
164				 */
165				if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) {
166					mvm->trans->dbg.unsupported_region_msk |= BIT(i);
167					break;
168				}
169			}
170		}
171	}
172
173	if (version >= 5) {
174		struct iwl_alive_ntf_v5 *palive;
175
176		if (pkt_len < sizeof(*palive))
177			return false;
178
179		palive = (void *)pkt->data;
180		umac = &palive->umac_data;
181		lmac1 = &palive->lmac_data[0];
182		lmac2 = &palive->lmac_data[1];
183		status = le16_to_cpu(palive->status);
184
185		mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
186		mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
187		mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
188
189		IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
190			     mvm->trans->sku_id[0],
191			     mvm->trans->sku_id[1],
192			     mvm->trans->sku_id[2]);
193	} else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
194		struct iwl_alive_ntf_v4 *palive;
195
196		if (pkt_len < sizeof(*palive))
197			return false;
198
199		palive = (void *)pkt->data;
200		umac = &palive->umac_data;
201		lmac1 = &palive->lmac_data[0];
202		lmac2 = &palive->lmac_data[1];
203		status = le16_to_cpu(palive->status);
204	} else if (iwl_rx_packet_payload_len(pkt) ==
205		   sizeof(struct iwl_alive_ntf_v3)) {
206		struct iwl_alive_ntf_v3 *palive3;
207
208		if (pkt_len < sizeof(*palive3))
209			return false;
210
211		palive3 = (void *)pkt->data;
212		umac = &palive3->umac_data;
213		lmac1 = &palive3->lmac_data;
214		status = le16_to_cpu(palive3->status);
215	} else {
216		WARN(1, "unsupported alive notification (size %d)\n",
217		     iwl_rx_packet_payload_len(pkt));
218		/* get timeout later */
219		return false;
220	}
221
222	lmac_error_event_table =
223		le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
224	iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
225
226	if (lmac2)
227		mvm->trans->dbg.lmac_error_event_table[1] =
228			le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
229
230	umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
231							~FW_ADDR_CACHE_CONTROL;
232
233	if (umac_error_table) {
234		if (umac_error_table >=
235		    mvm->trans->cfg->min_umac_error_event_table) {
236			iwl_fw_umac_set_alive_err_table(mvm->trans,
237							umac_error_table);
238		} else {
239			IWL_ERR(mvm,
240				"Not valid error log pointer 0x%08X for %s uCode\n",
241				umac_error_table,
242				(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
243				"Init" : "RT");
244		}
245	}
246
247	alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
248	alive_data->valid = status == IWL_ALIVE_STATUS_OK;
249
250	IWL_DEBUG_FW(mvm,
251		     "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
252		     status, lmac1->ver_type, lmac1->ver_subtype);
253
254	if (lmac2)
255		IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
256
257	IWL_DEBUG_FW(mvm,
258		     "UMAC version: Major - 0x%x, Minor - 0x%x\n",
259		     le32_to_cpu(umac->umac_major),
260		     le32_to_cpu(umac->umac_minor));
261
262	iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
263
264	return true;
265}
266
267static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
268				   struct iwl_rx_packet *pkt, void *data)
269{
270	WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
271
272	return true;
273}
274
275static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
276				  struct iwl_rx_packet *pkt, void *data)
277{
278	struct iwl_phy_db *phy_db = data;
279
280	if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
281		WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
282		return true;
283	}
284
285	WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
286
287	return false;
288}
289
290static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm)
291{
292#define IWL_FW_PRINT_REG_INFO(reg_name) \
293	IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name))
294
295	struct iwl_trans *trans = mvm->trans;
296	enum iwl_device_family device_family = trans->trans_cfg->device_family;
297
298	if (device_family < IWL_DEVICE_FAMILY_8000)
299		return;
300
301	if (device_family <= IWL_DEVICE_FAMILY_9000)
302		IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION);
303	else
304		IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION);
305
306	IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE);
307
308	/* print OPT info */
309	IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR);
310	IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA);
311}
312
313static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
314					 enum iwl_ucode_type ucode_type)
315{
316	struct iwl_notification_wait alive_wait;
317	struct iwl_mvm_alive_data alive_data = {};
318	const struct fw_img *fw;
319	int ret;
320	enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
321	static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
322	bool run_in_rfkill =
323		ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
324	u8 count;
325	struct iwl_pc_data *pc_data;
326
327	if (ucode_type == IWL_UCODE_REGULAR &&
328	    iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
329	    !(fw_has_capa(&mvm->fw->ucode_capa,
330			  IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
331		fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
332	else
333		fw = iwl_get_ucode_image(mvm->fw, ucode_type);
334	if (WARN_ON(!fw))
335		return -EINVAL;
336	iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
337	clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
338
339	iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
340				   alive_cmd, ARRAY_SIZE(alive_cmd),
341				   iwl_alive_fn, &alive_data);
342
343	/*
344	 * We want to load the INIT firmware even in RFKILL
345	 * For the unified firmware case, the ucode_type is not
346	 * INIT, but we still need to run it.
347	 */
348	ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
349	if (ret) {
350		iwl_fw_set_current_image(&mvm->fwrt, old_type);
351		iwl_remove_notification(&mvm->notif_wait, &alive_wait);
352		return ret;
353	}
354
355	/*
356	 * Some things may run in the background now, but we
357	 * just wait for the ALIVE notification here.
358	 */
359	ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
360				    MVM_UCODE_ALIVE_TIMEOUT);
361
362	if (mvm->trans->trans_cfg->device_family ==
363	    IWL_DEVICE_FAMILY_AX210) {
364		/* print these registers regardless of alive fail/success */
365		IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n",
366			 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION));
367		IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n",
368			 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION));
369		IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n",
370			 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG));
371		IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n",
372			 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9));
373	}
374
375	if (ret) {
376		struct iwl_trans *trans = mvm->trans;
377
378		/* SecBoot info */
379		if (trans->trans_cfg->device_family >=
380					IWL_DEVICE_FAMILY_22000) {
381			IWL_ERR(mvm,
382				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
383				iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
384				iwl_read_umac_prph(trans,
385						   UMAG_SB_CPU_2_STATUS));
386		} else if (trans->trans_cfg->device_family >=
387			   IWL_DEVICE_FAMILY_8000) {
388			IWL_ERR(mvm,
389				"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
390				iwl_read_prph(trans, SB_CPU_1_STATUS),
391				iwl_read_prph(trans, SB_CPU_2_STATUS));
392		}
393
394		iwl_mvm_print_pd_notification(mvm);
395
396		/* LMAC/UMAC PC info */
397		if (trans->trans_cfg->device_family >=
398					IWL_DEVICE_FAMILY_22000) {
399			pc_data = trans->dbg.pc_data;
400			for (count = 0; count < trans->dbg.num_pc;
401			     count++, pc_data++)
402				IWL_ERR(mvm, "%s: 0x%x\n",
403					pc_data->pc_name,
404					pc_data->pc_address);
405		} else if (trans->trans_cfg->device_family >=
406					IWL_DEVICE_FAMILY_9000) {
407			IWL_ERR(mvm, "UMAC PC: 0x%x\n",
408				iwl_read_umac_prph(trans,
409						   UREG_UMAC_CURRENT_PC));
410			IWL_ERR(mvm, "LMAC PC: 0x%x\n",
411				iwl_read_umac_prph(trans,
412						   UREG_LMAC1_CURRENT_PC));
413			if (iwl_mvm_is_cdb_supported(mvm))
414				IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
415					iwl_read_umac_prph(trans,
416						UREG_LMAC2_CURRENT_PC));
417		}
418
419		if (ret == -ETIMEDOUT && !mvm->pldr_sync)
420			iwl_fw_dbg_error_collect(&mvm->fwrt,
421						 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
422
423		iwl_fw_set_current_image(&mvm->fwrt, old_type);
424		return ret;
425	}
426
427	if (!alive_data.valid) {
428		IWL_ERR(mvm, "Loaded ucode is not valid!\n");
429		iwl_fw_set_current_image(&mvm->fwrt, old_type);
430		return -EIO;
431	}
432
433	/* if reached this point, Alive notification was received */
434	iwl_mei_alive_notif(true);
435
436	ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait,
437			    &mvm->fw->ucode_capa);
438	if (ret) {
439		IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
440		iwl_fw_set_current_image(&mvm->fwrt, old_type);
441		return ret;
442	}
443
444	iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
445
446	/*
447	 * Note: all the queues are enabled as part of the interface
448	 * initialization, but in firmware restart scenarios they
449	 * could be stopped, so wake them up. In firmware restart,
450	 * mac80211 will have the queues stopped as well until the
451	 * reconfiguration completes. During normal startup, they
452	 * will be empty.
453	 */
454
455	memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
456	/*
457	 * Set a 'fake' TID for the command queue, since we use the
458	 * hweight() of the tid_bitmap as a refcount now. Not that
459	 * we ever even consider the command queue as one we might
460	 * want to reuse, but be safe nevertheless.
461	 */
462	mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
463		BIT(IWL_MAX_TID_COUNT + 2);
464
465	set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
466#ifdef CONFIG_IWLWIFI_DEBUGFS
467	iwl_fw_set_dbg_rec_on(&mvm->fwrt);
468#endif
469
470	/*
471	 * All the BSSes in the BSS table include the GP2 in the system
472	 * at the beacon Rx time, this is of course no longer relevant
473	 * since we are resetting the firmware.
474	 * Purge all the BSS table.
475	 */
476	cfg80211_bss_flush(mvm->hw->wiphy);
477
478	return 0;
479}
480
481static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
482				    struct iwl_phy_specific_cfg *phy_filters)
483{
484#ifdef CONFIG_ACPI
485	*phy_filters = mvm->phy_filters;
486#endif /* CONFIG_ACPI */
487}
488
489#if defined(CONFIG_ACPI) && defined(CONFIG_EFI)
490static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
491{
492	u8 cmd_ver;
493	int ret;
494	struct iwl_host_cmd cmd = {
495		.id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
496			      SAR_OFFSET_MAPPING_TABLE_CMD),
497		.flags = 0,
498		.data[0] = &mvm->fwrt.sgom_table,
499		.len[0] =  sizeof(mvm->fwrt.sgom_table),
500		.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
501	};
502
503	if (!mvm->fwrt.sgom_enabled) {
504		IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
505		return 0;
506	}
507
508	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
509					IWL_FW_CMD_VER_UNKNOWN);
510
511	if (cmd_ver != 2) {
512		IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
513				cmd_ver);
514		return 0;
515	}
516
517	ret = iwl_mvm_send_cmd(mvm, &cmd);
518	if (ret < 0)
519		IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
520
521	return ret;
522}
523#else
524
525static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
526{
527	return 0;
528}
529#endif
530
531static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
532{
533	u32 cmd_id = PHY_CONFIGURATION_CMD;
534	struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
535	enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
536	u8 cmd_ver;
537	size_t cmd_size;
538
539	if (iwl_mvm_has_unified_ucode(mvm) &&
540	    !mvm->trans->cfg->tx_with_siso_diversity)
541		return 0;
542
543	if (mvm->trans->cfg->tx_with_siso_diversity) {
544		/*
545		 * TODO: currently we don't set the antenna but letting the NIC
546		 * to decide which antenna to use. This should come from BIOS.
547		 */
548		phy_cfg_cmd.phy_cfg =
549			cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
550	}
551
552	/* Set parameters */
553	phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
554
555	/* set flags extra PHY configuration flags from the device's cfg */
556	phy_cfg_cmd.phy_cfg |=
557		cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
558
559	phy_cfg_cmd.calib_control.event_trigger =
560		mvm->fw->default_calib[ucode_type].event_trigger;
561	phy_cfg_cmd.calib_control.flow_trigger =
562		mvm->fw->default_calib[ucode_type].flow_trigger;
563
564	cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
565					IWL_FW_CMD_VER_UNKNOWN);
566	if (cmd_ver >= 3)
567		iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg);
568
569	IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
570		       phy_cfg_cmd.phy_cfg);
571	cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
572				    sizeof(struct iwl_phy_cfg_cmd_v1);
573	return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd);
574}
575
576static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
577{
578	struct iwl_notification_wait init_wait;
579	struct iwl_nvm_access_complete_cmd nvm_complete = {};
580	struct iwl_init_extended_cfg_cmd init_cfg = {
581		.init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
582	};
583	static const u16 init_complete[] = {
584		INIT_COMPLETE_NOTIF,
585	};
586	int ret;
587
588	if (mvm->trans->cfg->tx_with_siso_diversity)
589		init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
590
591	lockdep_assert_held(&mvm->mutex);
592
593	mvm->rfkill_safe_init_done = false;
594
595	iwl_init_notification_wait(&mvm->notif_wait,
596				   &init_wait,
597				   init_complete,
598				   ARRAY_SIZE(init_complete),
599				   iwl_wait_init_complete,
600				   NULL);
601
602	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
603
604	/* Will also start the device */
605	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
606	if (ret) {
607		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
608		goto error;
609	}
610	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
611			       NULL);
612
613	/* Send init config command to mark that we are sending NVM access
614	 * commands
615	 */
616	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
617						INIT_EXTENDED_CFG_CMD),
618				   CMD_SEND_IN_RFKILL,
619				   sizeof(init_cfg), &init_cfg);
620	if (ret) {
621		IWL_ERR(mvm, "Failed to run init config command: %d\n",
622			ret);
623		goto error;
624	}
625
626	/* Load NVM to NIC if needed */
627	if (mvm->nvm_file_name) {
628		ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
629					    mvm->nvm_sections);
630		if (ret)
631			goto error;
632		ret = iwl_mvm_load_nvm_to_nic(mvm);
633		if (ret)
634			goto error;
635	}
636
637	if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
638		ret = iwl_nvm_init(mvm);
639		if (ret) {
640			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
641			goto error;
642		}
643	}
644
645	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
646						NVM_ACCESS_COMPLETE),
647				   CMD_SEND_IN_RFKILL,
648				   sizeof(nvm_complete), &nvm_complete);
649	if (ret) {
650		IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
651			ret);
652		goto error;
653	}
654
655	ret = iwl_send_phy_cfg_cmd(mvm);
656	if (ret) {
657		IWL_ERR(mvm, "Failed to run PHY configuration: %d\n",
658			ret);
659		goto error;
660	}
661
662	/* We wait for the INIT complete notification */
663	ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
664				    MVM_UCODE_ALIVE_TIMEOUT);
665	if (ret)
666		return ret;
667
668	/* Read the NVM only at driver load time, no need to do this twice */
669	if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
670		mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
671		if (IS_ERR(mvm->nvm_data)) {
672			ret = PTR_ERR(mvm->nvm_data);
673			mvm->nvm_data = NULL;
674			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
675			return ret;
676		}
677	}
678
679	mvm->rfkill_safe_init_done = true;
680
681	return 0;
682
683error:
684	iwl_remove_notification(&mvm->notif_wait, &init_wait);
685	return ret;
686}
687
688int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
689{
690	struct iwl_notification_wait calib_wait;
691	static const u16 init_complete[] = {
692		INIT_COMPLETE_NOTIF,
693		CALIB_RES_NOTIF_PHY_DB
694	};
695	int ret;
696
697	if (iwl_mvm_has_unified_ucode(mvm))
698		return iwl_run_unified_mvm_ucode(mvm);
699
700	lockdep_assert_held(&mvm->mutex);
701
702	mvm->rfkill_safe_init_done = false;
703
704	iwl_init_notification_wait(&mvm->notif_wait,
705				   &calib_wait,
706				   init_complete,
707				   ARRAY_SIZE(init_complete),
708				   iwl_wait_phy_db_entry,
709				   mvm->phy_db);
710
711	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
712
713	/* Will also start the device */
714	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
715	if (ret) {
716		IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
717		goto remove_notif;
718	}
719
720	if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
721		ret = iwl_mvm_send_bt_init_conf(mvm);
722		if (ret)
723			goto remove_notif;
724	}
725
726	/* Read the NVM only at driver load time, no need to do this twice */
727	if (!mvm->nvm_data) {
728		ret = iwl_nvm_init(mvm);
729		if (ret) {
730			IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
731			goto remove_notif;
732		}
733	}
734
735	/* In case we read the NVM from external file, load it to the NIC */
736	if (mvm->nvm_file_name) {
737		ret = iwl_mvm_load_nvm_to_nic(mvm);
738		if (ret)
739			goto remove_notif;
740	}
741
742	WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
743		  "Too old NVM version (0x%0x, required = 0x%0x)",
744		  mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
745
746	/*
747	 * abort after reading the nvm in case RF Kill is on, we will complete
748	 * the init seq later when RF kill will switch to off
749	 */
750	if (iwl_mvm_is_radio_hw_killed(mvm)) {
751		IWL_DEBUG_RF_KILL(mvm,
752				  "jump over all phy activities due to RF kill\n");
753		goto remove_notif;
754	}
755
756	mvm->rfkill_safe_init_done = true;
757
758	/* Send TX valid antennas before triggering calibrations */
759	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
760	if (ret)
761		goto remove_notif;
762
763	ret = iwl_send_phy_cfg_cmd(mvm);
764	if (ret) {
765		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
766			ret);
767		goto remove_notif;
768	}
769
770	/*
771	 * Some things may run in the background now, but we
772	 * just wait for the calibration complete notification.
773	 */
774	ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
775				    MVM_UCODE_CALIB_TIMEOUT);
776	if (!ret)
777		goto out;
778
779	if (iwl_mvm_is_radio_hw_killed(mvm)) {
780		IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
781		ret = 0;
782	} else {
783		IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
784			ret);
785	}
786
787	goto out;
788
789remove_notif:
790	iwl_remove_notification(&mvm->notif_wait, &calib_wait);
791out:
792	mvm->rfkill_safe_init_done = false;
793	if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
794		/* we want to debug INIT and we have no NVM - fake */
795		mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
796					sizeof(struct ieee80211_channel) +
797					sizeof(struct ieee80211_rate),
798					GFP_KERNEL);
799		if (!mvm->nvm_data)
800			return -ENOMEM;
801		mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
802		mvm->nvm_data->bands[0].n_channels = 1;
803		mvm->nvm_data->bands[0].n_bitrates = 1;
804		mvm->nvm_data->bands[0].bitrates =
805			(void *)(mvm->nvm_data->channels + 1);
806		mvm->nvm_data->bands[0].bitrates->hw_value = 10;
807	}
808
809	return ret;
810}
811
812static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
813{
814	struct iwl_ltr_config_cmd cmd = {
815		.flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
816	};
817
818	if (!mvm->trans->ltr_enabled)
819		return 0;
820
821	return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
822				    sizeof(cmd), &cmd);
823}
824
825#ifdef CONFIG_ACPI
826int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
827{
828	u32 cmd_id = REDUCE_TX_POWER_CMD;
829	struct iwl_dev_tx_power_cmd cmd = {
830		.common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
831	};
832	__le16 *per_chain;
833	int ret;
834	u16 len = 0;
835	u32 n_subbands;
836	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
837					   IWL_FW_CMD_VER_UNKNOWN);
838	if (cmd_ver == 7) {
839		len = sizeof(cmd.v7);
840		n_subbands = IWL_NUM_SUB_BANDS_V2;
841		per_chain = cmd.v7.per_chain[0][0];
842		cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags);
843	} else if (cmd_ver == 6) {
844		len = sizeof(cmd.v6);
845		n_subbands = IWL_NUM_SUB_BANDS_V2;
846		per_chain = cmd.v6.per_chain[0][0];
847	} else if (fw_has_api(&mvm->fw->ucode_capa,
848			      IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
849		len = sizeof(cmd.v5);
850		n_subbands = IWL_NUM_SUB_BANDS_V1;
851		per_chain = cmd.v5.per_chain[0][0];
852	} else if (fw_has_capa(&mvm->fw->ucode_capa,
853			       IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
854		len = sizeof(cmd.v4);
855		n_subbands = IWL_NUM_SUB_BANDS_V1;
856		per_chain = cmd.v4.per_chain[0][0];
857	} else {
858		len = sizeof(cmd.v3);
859		n_subbands = IWL_NUM_SUB_BANDS_V1;
860		per_chain = cmd.v3.per_chain[0][0];
861	}
862
863	/* all structs have the same common part, add it */
864	len += sizeof(cmd.common);
865
866	ret = iwl_sar_select_profile(&mvm->fwrt, per_chain,
867				     IWL_NUM_CHAIN_TABLES,
868				     n_subbands, prof_a, prof_b);
869
870	/* return on error or if the profile is disabled (positive number) */
871	if (ret)
872		return ret;
873
874	iwl_mei_set_power_limit(per_chain);
875
876	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
877	return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
878}
879
880int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
881{
882	union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
883	struct iwl_geo_tx_power_profiles_resp *resp;
884	u16 len;
885	int ret;
886	struct iwl_host_cmd cmd = {
887		.id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
888		.flags = CMD_WANT_SKB,
889		.data = { &geo_tx_cmd },
890	};
891	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
892					   IWL_FW_CMD_VER_UNKNOWN);
893
894	/* the ops field is at the same spot for all versions, so set in v1 */
895	geo_tx_cmd.v1.ops =
896		cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
897
898	if (cmd_ver == 5)
899		len = sizeof(geo_tx_cmd.v5);
900	else if (cmd_ver == 4)
901		len = sizeof(geo_tx_cmd.v4);
902	else if (cmd_ver == 3)
903		len = sizeof(geo_tx_cmd.v3);
904	else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
905			    IWL_UCODE_TLV_API_SAR_TABLE_VER))
906		len = sizeof(geo_tx_cmd.v2);
907	else
908		len = sizeof(geo_tx_cmd.v1);
909
910	if (!iwl_sar_geo_support(&mvm->fwrt))
911		return -EOPNOTSUPP;
912
913	cmd.len[0] = len;
914
915	ret = iwl_mvm_send_cmd(mvm, &cmd);
916	if (ret) {
917		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
918		return ret;
919	}
920
921	resp = (void *)cmd.resp_pkt->data;
922	ret = le32_to_cpu(resp->profile_idx);
923
924	if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3))
925		ret = -EIO;
926
927	iwl_free_resp(&cmd);
928	return ret;
929}
930
931static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
932{
933	u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD);
934	union iwl_geo_tx_power_profiles_cmd cmd;
935	u16 len;
936	u32 n_bands;
937	u32 n_profiles;
938	u32 sk = 0;
939	int ret;
940	u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
941					   IWL_FW_CMD_VER_UNKNOWN);
942
943	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
944		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
945		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
946		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
947		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
948		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
949		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
950		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
951
952	/* the ops field is at the same spot for all versions, so set in v1 */
953	cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
954
955	if (cmd_ver == 5) {
956		len = sizeof(cmd.v5);
957		n_bands = ARRAY_SIZE(cmd.v5.table[0]);
958		n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
959	} else if (cmd_ver == 4) {
960		len = sizeof(cmd.v4);
961		n_bands = ARRAY_SIZE(cmd.v4.table[0]);
962		n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
963	} else if (cmd_ver == 3) {
964		len = sizeof(cmd.v3);
965		n_bands = ARRAY_SIZE(cmd.v3.table[0]);
966		n_profiles = ACPI_NUM_GEO_PROFILES;
967	} else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
968			      IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
969		len = sizeof(cmd.v2);
970		n_bands = ARRAY_SIZE(cmd.v2.table[0]);
971		n_profiles = ACPI_NUM_GEO_PROFILES;
972	} else {
973		len = sizeof(cmd.v1);
974		n_bands = ARRAY_SIZE(cmd.v1.table[0]);
975		n_profiles = ACPI_NUM_GEO_PROFILES;
976	}
977
978	BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
979		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
980		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
981		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
982		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
983		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
984		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
985		     offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
986	/* the table is at the same position for all versions, so set use v1 */
987	ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0],
988			       n_bands, n_profiles);
989
990	/*
991	 * It is a valid scenario to not support SAR, or miss wgds table,
992	 * but in that case there is no need to send the command.
993	 */
994	if (ret)
995		return 0;
996
997	/* Only set to South Korea if the table revision is 1 */
998	if (mvm->fwrt.geo_rev == 1)
999		sk = 1;
1000
1001	/*
1002	 * Set the table_revision to South Korea (1) or not (0).  The
1003	 * element name is misleading, as it doesn't contain the table
1004	 * revision number, but whether the South Korea variation
1005	 * should be used.
1006	 * This must be done after calling iwl_sar_geo_init().
1007	 */
1008	if (cmd_ver == 5)
1009		cmd.v5.table_revision = cpu_to_le32(sk);
1010	else if (cmd_ver == 4)
1011		cmd.v4.table_revision = cpu_to_le32(sk);
1012	else if (cmd_ver == 3)
1013		cmd.v3.table_revision = cpu_to_le32(sk);
1014	else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
1015			    IWL_UCODE_TLV_API_SAR_TABLE_VER))
1016		cmd.v2.table_revision = cpu_to_le32(sk);
1017
1018	return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
1019}
1020
1021int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1022{
1023	union iwl_ppag_table_cmd cmd;
1024	int ret, cmd_size;
1025
1026	ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size);
1027	/* Not supporting PPAG table is a valid scenario */
1028	if (ret < 0)
1029		return 0;
1030
1031	IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
1032	ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1033						PER_PLATFORM_ANT_GAIN_CMD),
1034				   0, cmd_size, &cmd);
1035	if (ret < 0)
1036		IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1037			ret);
1038
1039	return ret;
1040}
1041
1042static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1043{
1044	/* no need to read the table, done in INIT stage */
1045	if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt)))
1046		return 0;
1047
1048	return iwl_mvm_ppag_send_cmd(mvm);
1049}
1050
1051static const struct dmi_system_id dmi_tas_approved_list[] = {
1052	{ .ident = "HP",
1053	  .matches = {
1054			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1055		},
1056	},
1057	{ .ident = "SAMSUNG",
1058	  .matches = {
1059			DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
1060		},
1061	},
1062		{ .ident = "LENOVO",
1063	  .matches = {
1064			DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1065		},
1066	},
1067	{ .ident = "DELL",
1068	  .matches = {
1069			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
1070		},
1071	},
1072	{ .ident = "MSFT",
1073	  .matches = {
1074			DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
1075		},
1076	},
1077	{ .ident = "Acer",
1078	  .matches = {
1079			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1080		},
1081	},
1082	{ .ident = "ASUS",
1083	  .matches = {
1084			DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
1085		},
1086	},
1087	{ .ident = "MSI",
1088	  .matches = {
1089			DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International Co., Ltd."),
1090		},
1091	},
1092	{ .ident = "Honor",
1093	  .matches = {
1094			DMI_MATCH(DMI_SYS_VENDOR, "HONOR"),
1095		},
1096	},
1097	/* keep last */
1098	{}
1099};
1100
1101bool iwl_mvm_is_vendor_in_approved_list(void)
1102{
1103	return dmi_check_system(dmi_tas_approved_list);
1104}
1105
1106static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc)
1107{
1108	int i;
1109	u32 size = le32_to_cpu(*le_size);
1110
1111	/* Verify that there is room for another country */
1112	if (size >= IWL_TAS_BLOCK_LIST_MAX)
1113		return false;
1114
1115	for (i = 0; i < size; i++) {
1116		if (list[i] == cpu_to_le32(mcc))
1117			return true;
1118	}
1119
1120	list[size++] = cpu_to_le32(mcc);
1121	*le_size = cpu_to_le32(size);
1122	return true;
1123}
1124
1125static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1126{
1127	u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG);
1128	int ret;
1129	union iwl_tas_config_cmd cmd = {};
1130	int cmd_size, fw_ver;
1131
1132	BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) <
1133		     APCI_WTAS_BLACK_LIST_MAX);
1134
1135	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1136		IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1137		return;
1138	}
1139
1140	fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1141				       IWL_FW_CMD_VER_UNKNOWN);
1142
1143	ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver);
1144	if (ret < 0) {
1145		IWL_DEBUG_RADIO(mvm,
1146				"TAS table invalid or unavailable. (%d)\n",
1147				ret);
1148		return;
1149	}
1150
1151	if (ret == 0)
1152		return;
1153
1154	if (!iwl_mvm_is_vendor_in_approved_list()) {
1155		IWL_DEBUG_RADIO(mvm,
1156				"System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
1157				dmi_get_system_info(DMI_SYS_VENDOR));
1158		if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
1159						    &cmd.v4.block_list_size,
1160							IWL_TAS_US_MCC)) ||
1161		    (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
1162						    &cmd.v4.block_list_size,
1163							IWL_TAS_CANADA_MCC))) {
1164			IWL_DEBUG_RADIO(mvm,
1165					"Unable to add US/Canada to TAS block list, disabling TAS\n");
1166			return;
1167		}
1168	} else {
1169		IWL_DEBUG_RADIO(mvm,
1170				"System vendor '%s' is in the approved list.\n",
1171				dmi_get_system_info(DMI_SYS_VENDOR));
1172	}
1173
1174	/* v4 is the same size as v3, so no need to differentiate here */
1175	cmd_size = fw_ver < 3 ?
1176		sizeof(struct iwl_tas_config_cmd_v2) :
1177		sizeof(struct iwl_tas_config_cmd_v3);
1178
1179	ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd);
1180	if (ret < 0)
1181		IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1182}
1183
1184static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1185{
1186	u8 value;
1187	int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE,
1188				      &iwl_rfi_guid, &value);
1189
1190	if (ret < 0) {
1191		IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret);
1192
1193	} else if (value >= DSM_VALUE_RFI_MAX) {
1194		IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n",
1195				value);
1196
1197	} else if (value == DSM_VALUE_RFI_ENABLE) {
1198		IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n");
1199		return DSM_VALUE_RFI_ENABLE;
1200	}
1201
1202	IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n");
1203
1204	/* default behaviour is disabled */
1205	return DSM_VALUE_RFI_DISABLE;
1206}
1207
1208static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1209{
1210	int ret;
1211	u32 value;
1212	struct iwl_lari_config_change_cmd_v6 cmd = {};
1213
1214	cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt);
1215
1216	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT,
1217				   &iwl_guid, &value);
1218	if (!ret)
1219		cmd.oem_11ax_allow_bitmap = cpu_to_le32(value);
1220
1221	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1222				   DSM_FUNC_ENABLE_UNII4_CHAN,
1223				   &iwl_guid, &value);
1224	if (!ret)
1225		cmd.oem_unii4_allow_bitmap = cpu_to_le32(value);
1226
1227	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1228				   DSM_FUNC_ACTIVATE_CHANNEL,
1229				   &iwl_guid, &value);
1230	if (!ret)
1231		cmd.chan_state_active_bitmap = cpu_to_le32(value);
1232
1233	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1234				   DSM_FUNC_ENABLE_6E,
1235				   &iwl_guid, &value);
1236	if (!ret)
1237		cmd.oem_uhb_allow_bitmap = cpu_to_le32(value);
1238
1239	ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1240				   DSM_FUNC_FORCE_DISABLE_CHANNELS,
1241				   &iwl_guid, &value);
1242	if (!ret)
1243		cmd.force_disable_channels_bitmap = cpu_to_le32(value);
1244
1245	if (cmd.config_bitmap ||
1246	    cmd.oem_uhb_allow_bitmap ||
1247	    cmd.oem_11ax_allow_bitmap ||
1248	    cmd.oem_unii4_allow_bitmap ||
1249	    cmd.chan_state_active_bitmap ||
1250	    cmd.force_disable_channels_bitmap) {
1251		size_t cmd_size;
1252		u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw,
1253						   WIDE_ID(REGULATORY_AND_NVM_GROUP,
1254							   LARI_CONFIG_CHANGE),
1255						   1);
1256		switch (cmd_ver) {
1257		case 6:
1258			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6);
1259			break;
1260		case 5:
1261			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5);
1262			break;
1263		case 4:
1264			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4);
1265			break;
1266		case 3:
1267			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3);
1268			break;
1269		case 2:
1270			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2);
1271			break;
1272		default:
1273			cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1);
1274			break;
1275		}
1276
1277		IWL_DEBUG_RADIO(mvm,
1278				"sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
1279				le32_to_cpu(cmd.config_bitmap),
1280				le32_to_cpu(cmd.oem_11ax_allow_bitmap));
1281		IWL_DEBUG_RADIO(mvm,
1282				"sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n",
1283				le32_to_cpu(cmd.oem_unii4_allow_bitmap),
1284				le32_to_cpu(cmd.chan_state_active_bitmap),
1285				cmd_ver);
1286		IWL_DEBUG_RADIO(mvm,
1287				"sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n",
1288				le32_to_cpu(cmd.oem_uhb_allow_bitmap),
1289				le32_to_cpu(cmd.force_disable_channels_bitmap));
1290		ret = iwl_mvm_send_cmd_pdu(mvm,
1291					   WIDE_ID(REGULATORY_AND_NVM_GROUP,
1292						   LARI_CONFIG_CHANGE),
1293					   0, cmd_size, &cmd);
1294		if (ret < 0)
1295			IWL_DEBUG_RADIO(mvm,
1296					"Failed to send LARI_CONFIG_CHANGE (%d)\n",
1297					ret);
1298	}
1299}
1300
1301void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1302{
1303	int ret;
1304
1305	/* read PPAG table */
1306	ret = iwl_acpi_get_ppag_table(&mvm->fwrt);
1307	if (ret < 0) {
1308		IWL_DEBUG_RADIO(mvm,
1309				"PPAG BIOS table invalid or unavailable. (%d)\n",
1310				ret);
1311	}
1312
1313	/* read SAR tables */
1314	ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1315	if (ret < 0) {
1316		IWL_DEBUG_RADIO(mvm,
1317				"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1318				ret);
1319		/*
1320		 * If not available, don't fail and don't bother with EWRD and
1321		 * WGDS */
1322
1323		if (!iwl_sar_get_wgds_table(&mvm->fwrt)) {
1324			/*
1325			 * If basic SAR is not available, we check for WGDS,
1326			 * which should *not* be available either.  If it is
1327			 * available, issue an error, because we can't use SAR
1328			 * Geo without basic SAR.
1329			 */
1330			IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1331		}
1332
1333	} else {
1334		ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
1335		/* if EWRD is not available, we can still use
1336		* WRDS, so don't fail */
1337		if (ret < 0)
1338			IWL_DEBUG_RADIO(mvm,
1339					"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1340					ret);
1341
1342		/* read geo SAR table */
1343		if (iwl_sar_geo_support(&mvm->fwrt)) {
1344			ret = iwl_sar_get_wgds_table(&mvm->fwrt);
1345			if (ret < 0)
1346				IWL_DEBUG_RADIO(mvm,
1347						"Geo SAR BIOS table invalid or unavailable. (%d)\n",
1348						ret);
1349				/* we don't fail if the table is not available */
1350		}
1351	}
1352
1353	iwl_acpi_get_phy_filters(&mvm->fwrt, &mvm->phy_filters);
1354}
1355#else /* CONFIG_ACPI */
1356
1357inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
1358				      int prof_a, int prof_b)
1359{
1360	return 1;
1361}
1362
1363inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
1364{
1365	return -ENOENT;
1366}
1367
1368static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1369{
1370	return 0;
1371}
1372
1373int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1374{
1375	return -ENOENT;
1376}
1377
1378static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1379{
1380	return 0;
1381}
1382
1383static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1384{
1385}
1386
1387static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1388{
1389}
1390
1391bool iwl_mvm_is_vendor_in_approved_list(void)
1392{
1393	return false;
1394}
1395
1396static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1397{
1398	return DSM_VALUE_RFI_DISABLE;
1399}
1400
1401void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1402{
1403}
1404
1405#endif /* CONFIG_ACPI */
1406
1407void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1408{
1409	u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1410	int ret;
1411	u32 resp;
1412
1413	struct iwl_fw_error_recovery_cmd recovery_cmd = {
1414		.flags = cpu_to_le32(flags),
1415		.buf_size = 0,
1416	};
1417	struct iwl_host_cmd host_cmd = {
1418		.id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1419		.flags = CMD_WANT_SKB,
1420		.data = {&recovery_cmd, },
1421		.len = {sizeof(recovery_cmd), },
1422	};
1423
1424	/* no error log was defined in TLV */
1425	if (!error_log_size)
1426		return;
1427
1428	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1429		/* no buf was allocated while HW reset */
1430		if (!mvm->error_recovery_buf)
1431			return;
1432
1433		host_cmd.data[1] = mvm->error_recovery_buf;
1434		host_cmd.len[1] =  error_log_size;
1435		host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1436		recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1437	}
1438
1439	ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1440	kfree(mvm->error_recovery_buf);
1441	mvm->error_recovery_buf = NULL;
1442
1443	if (ret) {
1444		IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1445		return;
1446	}
1447
1448	/* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1449	if (flags & ERROR_RECOVERY_UPDATE_DB) {
1450		resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1451		if (resp)
1452			IWL_ERR(mvm,
1453				"Failed to send recovery cmd blob was invalid %d\n",
1454				resp);
1455	}
1456}
1457
1458static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1459{
1460	return iwl_mvm_sar_select_profile(mvm, 1, 1);
1461}
1462
1463static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1464{
1465	int ret;
1466
1467	if (iwl_mvm_has_unified_ucode(mvm))
1468		return iwl_run_unified_mvm_ucode(mvm);
1469
1470	ret = iwl_run_init_mvm_ucode(mvm);
1471
1472	if (ret) {
1473		IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1474
1475		if (iwlmvm_mod_params.init_dbg)
1476			return 0;
1477		return ret;
1478	}
1479
1480	iwl_fw_dbg_stop_sync(&mvm->fwrt);
1481	iwl_trans_stop_device(mvm->trans);
1482	ret = iwl_trans_start_hw(mvm->trans);
1483	if (ret)
1484		return ret;
1485
1486	mvm->rfkill_safe_init_done = false;
1487	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1488	if (ret)
1489		return ret;
1490
1491	mvm->rfkill_safe_init_done = true;
1492
1493	iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1494			       NULL);
1495
1496	return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1497}
1498
1499int iwl_mvm_up(struct iwl_mvm *mvm)
1500{
1501	int ret, i;
1502	struct ieee80211_channel *chan;
1503	struct cfg80211_chan_def chandef;
1504	struct ieee80211_supported_band *sband = NULL;
1505	u32 sb_cfg;
1506
1507	lockdep_assert_held(&mvm->mutex);
1508
1509	ret = iwl_trans_start_hw(mvm->trans);
1510	if (ret)
1511		return ret;
1512
1513	sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG);
1514	mvm->pldr_sync = !(sb_cfg & SB_CFG_RESIDES_IN_OTP_MASK);
1515	if (mvm->pldr_sync && iwl_mei_pldr_req())
1516		return -EBUSY;
1517
1518	ret = iwl_mvm_load_rt_fw(mvm);
1519	if (ret) {
1520		IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1521		if (ret != -ERFKILL && !mvm->pldr_sync)
1522			iwl_fw_dbg_error_collect(&mvm->fwrt,
1523						 FW_DBG_TRIGGER_DRIVER);
1524		goto error;
1525	}
1526
1527	/* FW loaded successfully */
1528	mvm->pldr_sync = false;
1529
1530	iwl_get_shared_mem_conf(&mvm->fwrt);
1531
1532	ret = iwl_mvm_sf_update(mvm, NULL, false);
1533	if (ret)
1534		IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1535
1536	if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1537		mvm->fwrt.dump.conf = FW_DBG_INVALID;
1538		/* if we have a destination, assume EARLY START */
1539		if (mvm->fw->dbg.dest_tlv)
1540			mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1541		iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1542	}
1543
1544	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1545	if (ret)
1546		goto error;
1547
1548	if (!iwl_mvm_has_unified_ucode(mvm)) {
1549		/* Send phy db control command and then phy db calibration */
1550		ret = iwl_send_phy_db_data(mvm->phy_db);
1551		if (ret)
1552			goto error;
1553		ret = iwl_send_phy_cfg_cmd(mvm);
1554		if (ret)
1555			goto error;
1556	}
1557
1558	ret = iwl_mvm_send_bt_init_conf(mvm);
1559	if (ret)
1560		goto error;
1561
1562	if (fw_has_capa(&mvm->fw->ucode_capa,
1563			IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1564		ret = iwl_set_soc_latency(&mvm->fwrt);
1565		if (ret)
1566			goto error;
1567	}
1568
1569	iwl_mvm_lari_cfg(mvm);
1570
1571	/* Init RSS configuration */
1572	ret = iwl_configure_rxq(&mvm->fwrt);
1573	if (ret)
1574		goto error;
1575
1576	if (iwl_mvm_has_new_rx_api(mvm)) {
1577		ret = iwl_send_rss_cfg_cmd(mvm);
1578		if (ret) {
1579			IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1580				ret);
1581			goto error;
1582		}
1583	}
1584
1585	/* init the fw <-> mac80211 STA mapping */
1586	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1587		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1588		RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1589	}
1590
1591	for (i = 0; i < IWL_MVM_FW_MAX_LINK_ID + 1; i++)
1592		RCU_INIT_POINTER(mvm->link_id_to_link_conf[i], NULL);
1593
1594	memset(&mvm->fw_link_ids_map, 0, sizeof(mvm->fw_link_ids_map));
1595
1596	mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1597
1598	/* reset quota debouncing buffer - 0xff will yield invalid data */
1599	memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1600
1601	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1602		ret = iwl_mvm_send_dqa_cmd(mvm);
1603		if (ret)
1604			goto error;
1605	}
1606
1607	/*
1608	 * Add auxiliary station for scanning.
1609	 * Newer versions of this command implies that the fw uses
1610	 * internal aux station for all aux activities that don't
1611	 * requires a dedicated data queue.
1612	 */
1613	if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1614		 /*
1615		  * In old version the aux station uses mac id like other
1616		  * station and not lmac id
1617		  */
1618		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1619		if (ret)
1620			goto error;
1621	}
1622
1623	/* Add all the PHY contexts */
1624	i = 0;
1625	while (!sband && i < NUM_NL80211_BANDS)
1626		sband = mvm->hw->wiphy->bands[i++];
1627
1628	if (WARN_ON_ONCE(!sband)) {
1629		ret = -ENODEV;
1630		goto error;
1631	}
1632
1633	chan = &sband->channels[0];
1634
1635	cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1636	for (i = 0; i < NUM_PHY_CTX; i++) {
1637		/*
1638		 * The channel used here isn't relevant as it's
1639		 * going to be overwritten in the other flows.
1640		 * For now use the first channel we have.
1641		 */
1642		ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1643					   &chandef, 1, 1);
1644		if (ret)
1645			goto error;
1646	}
1647
1648	if (iwl_mvm_is_tt_in_fw(mvm)) {
1649		/* in order to give the responsibility of ct-kill and
1650		 * TX backoff to FW we need to send empty temperature reporting
1651		 * cmd during init time
1652		 */
1653		iwl_mvm_send_temp_report_ths_cmd(mvm);
1654	} else {
1655		/* Initialize tx backoffs to the minimal possible */
1656		iwl_mvm_tt_tx_backoff(mvm, 0);
1657	}
1658
1659#ifdef CONFIG_THERMAL
1660	/* TODO: read the budget from BIOS / Platform NVM */
1661
1662	/*
1663	 * In case there is no budget from BIOS / Platform NVM the default
1664	 * budget should be 2000mW (cooling state 0).
1665	 */
1666	if (iwl_mvm_is_ctdp_supported(mvm)) {
1667		ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1668					   mvm->cooling_dev.cur_state);
1669		if (ret)
1670			goto error;
1671	}
1672#endif
1673
1674	if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1675		WARN_ON(iwl_mvm_config_ltr(mvm));
1676
1677	ret = iwl_mvm_power_update_device(mvm);
1678	if (ret)
1679		goto error;
1680
1681	/*
1682	 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1683	 * anyway, so don't init MCC.
1684	 */
1685	if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1686		ret = iwl_mvm_init_mcc(mvm);
1687		if (ret)
1688			goto error;
1689	}
1690
1691	if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1692		mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1693		mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1694		ret = iwl_mvm_config_scan(mvm);
1695		if (ret)
1696			goto error;
1697	}
1698
1699	if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
1700		iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1701
1702		if (mvm->time_sync.active)
1703			iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr,
1704						 IWL_TIME_SYNC_PROTOCOL_TM |
1705						 IWL_TIME_SYNC_PROTOCOL_FTM);
1706	}
1707
1708	if (!mvm->ptp_data.ptp_clock)
1709		iwl_mvm_ptp_init(mvm);
1710
1711	if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
1712		IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
1713
1714	ret = iwl_mvm_ppag_init(mvm);
1715	if (ret)
1716		goto error;
1717
1718	ret = iwl_mvm_sar_init(mvm);
1719	if (ret == 0)
1720		ret = iwl_mvm_sar_geo_init(mvm);
1721	if (ret < 0)
1722		goto error;
1723
1724	ret = iwl_mvm_sgom_init(mvm);
1725	if (ret)
1726		goto error;
1727
1728	iwl_mvm_tas_init(mvm);
1729	iwl_mvm_leds_sync(mvm);
1730
1731	if (iwl_rfi_supported(mvm)) {
1732		if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE)
1733			iwl_rfi_send_config_cmd(mvm, NULL);
1734	}
1735
1736	iwl_mvm_mei_device_state(mvm, true);
1737
1738	IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1739	return 0;
1740 error:
1741	if (!iwlmvm_mod_params.init_dbg || !ret)
1742		iwl_mvm_stop_device(mvm);
1743	return ret;
1744}
1745
1746int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1747{
1748	int ret, i;
1749
1750	lockdep_assert_held(&mvm->mutex);
1751
1752	ret = iwl_trans_start_hw(mvm->trans);
1753	if (ret)
1754		return ret;
1755
1756	ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1757	if (ret) {
1758		IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1759		goto error;
1760	}
1761
1762	ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1763	if (ret)
1764		goto error;
1765
1766	/* Send phy db control command and then phy db calibration*/
1767	ret = iwl_send_phy_db_data(mvm->phy_db);
1768	if (ret)
1769		goto error;
1770
1771	ret = iwl_send_phy_cfg_cmd(mvm);
1772	if (ret)
1773		goto error;
1774
1775	/* init the fw <-> mac80211 STA mapping */
1776	for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1777		RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1778		RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1779	}
1780
1781	if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1782		/*
1783		 * Add auxiliary station for scanning.
1784		 * Newer versions of this command implies that the fw uses
1785		 * internal aux station for all aux activities that don't
1786		 * requires a dedicated data queue.
1787		 * In old version the aux station uses mac id like other
1788		 * station and not lmac id
1789		 */
1790		ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1791		if (ret)
1792			goto error;
1793	}
1794
1795	return 0;
1796 error:
1797	iwl_mvm_stop_device(mvm);
1798	return ret;
1799}
1800
1801void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1802			     struct iwl_rx_cmd_buffer *rxb)
1803{
1804	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1805	struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1806
1807	IWL_DEBUG_INFO(mvm,
1808		       "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1809		       le32_to_cpu(mfuart_notif->installed_ver),
1810		       le32_to_cpu(mfuart_notif->external_ver),
1811		       le32_to_cpu(mfuart_notif->status),
1812		       le32_to_cpu(mfuart_notif->duration));
1813
1814	if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1815		IWL_DEBUG_INFO(mvm,
1816			       "MFUART: image size: 0x%08x\n",
1817			       le32_to_cpu(mfuart_notif->image_size));
1818}
1819