162306a36Sopenharmony_ci/*
262306a36Sopenharmony_ci * Copyright (c) 2015 Qualcomm Atheros Inc.
362306a36Sopenharmony_ci *
462306a36Sopenharmony_ci * Permission to use, copy, modify, and/or distribute this software for any
562306a36Sopenharmony_ci * purpose with or without fee is hereby granted, provided that the above
662306a36Sopenharmony_ci * copyright notice and this permission notice appear in all copies.
762306a36Sopenharmony_ci *
862306a36Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
962306a36Sopenharmony_ci * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
1062306a36Sopenharmony_ci * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
1162306a36Sopenharmony_ci * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
1262306a36Sopenharmony_ci * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
1362306a36Sopenharmony_ci * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
1462306a36Sopenharmony_ci * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
1562306a36Sopenharmony_ci */
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci#ifndef AR9003_AIC_H
1862306a36Sopenharmony_ci#define AR9003_AIC_H
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci#define ATH_AIC_MAX_COM_ATT_DB_TABLE    6
2162306a36Sopenharmony_ci#define ATH_AIC_MAX_AIC_LIN_TABLE       69
2262306a36Sopenharmony_ci#define ATH_AIC_MIN_ROT_DIR_ATT_DB      0
2362306a36Sopenharmony_ci#define ATH_AIC_MIN_ROT_QUAD_ATT_DB     0
2462306a36Sopenharmony_ci#define ATH_AIC_MAX_ROT_DIR_ATT_DB      37
2562306a36Sopenharmony_ci#define ATH_AIC_MAX_ROT_QUAD_ATT_DB     37
2662306a36Sopenharmony_ci#define ATH_AIC_SRAM_AUTO_INCREMENT     0x80000000
2762306a36Sopenharmony_ci#define ATH_AIC_SRAM_GAIN_TABLE_OFFSET  0x280
2862306a36Sopenharmony_ci#define ATH_AIC_SRAM_CAL_OFFSET         0x140
2962306a36Sopenharmony_ci#define ATH_AIC_SRAM_OFFSET             0x00
3062306a36Sopenharmony_ci#define ATH_AIC_MEAS_MAG_THRESH         20
3162306a36Sopenharmony_ci#define ATH_AIC_BT_JUPITER_CTRL         0x66820
3262306a36Sopenharmony_ci#define ATH_AIC_BT_AIC_ENABLE           0x02
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_cienum aic_cal_state {
3562306a36Sopenharmony_ci	AIC_CAL_STATE_IDLE = 0,
3662306a36Sopenharmony_ci	AIC_CAL_STATE_STARTED,
3762306a36Sopenharmony_ci	AIC_CAL_STATE_DONE,
3862306a36Sopenharmony_ci	AIC_CAL_STATE_ERROR
3962306a36Sopenharmony_ci};
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_cistruct ath_aic_sram_info {
4262306a36Sopenharmony_ci	bool valid:1;
4362306a36Sopenharmony_ci	bool vga_quad_sign:1;
4462306a36Sopenharmony_ci	bool vga_dir_sign:1;
4562306a36Sopenharmony_ci	u8 rot_quad_att_db;
4662306a36Sopenharmony_ci	u8 rot_dir_att_db;
4762306a36Sopenharmony_ci	u8 com_att_6db;
4862306a36Sopenharmony_ci};
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_cistruct ath_aic_out_info {
5162306a36Sopenharmony_ci	int16_t dir_path_gain_lin;
5262306a36Sopenharmony_ci	int16_t quad_path_gain_lin;
5362306a36Sopenharmony_ci};
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ciu8 ar9003_aic_calibration(struct ath_hw *ah);
5662306a36Sopenharmony_ciu8 ar9003_aic_start_normal(struct ath_hw *ah);
5762306a36Sopenharmony_ciu8 ar9003_aic_cal_reset(struct ath_hw *ah);
5862306a36Sopenharmony_ciu8 ar9003_aic_calibration_single(struct ath_hw *ah);
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci#endif /* AR9003_AIC_H */
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