162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/* Qualcomm IPQ8064 MDIO interface driver 362306a36Sopenharmony_ci * 462306a36Sopenharmony_ci * Copyright (C) 2019 Christian Lamparter <chunkeey@gmail.com> 562306a36Sopenharmony_ci * Copyright (C) 2020 Ansuel Smith <ansuelsmth@gmail.com> 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include <linux/delay.h> 962306a36Sopenharmony_ci#include <linux/kernel.h> 1062306a36Sopenharmony_ci#include <linux/module.h> 1162306a36Sopenharmony_ci#include <linux/of_mdio.h> 1262306a36Sopenharmony_ci#include <linux/of_address.h> 1362306a36Sopenharmony_ci#include <linux/platform_device.h> 1462306a36Sopenharmony_ci#include <linux/regmap.h> 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci/* MII address register definitions */ 1762306a36Sopenharmony_ci#define MII_ADDR_REG_ADDR 0x10 1862306a36Sopenharmony_ci#define MII_BUSY BIT(0) 1962306a36Sopenharmony_ci#define MII_WRITE BIT(1) 2062306a36Sopenharmony_ci#define MII_CLKRANGE(x) ((x) << 2) 2162306a36Sopenharmony_ci#define MII_CLKRANGE_60_100M MII_CLKRANGE(0) 2262306a36Sopenharmony_ci#define MII_CLKRANGE_100_150M MII_CLKRANGE(1) 2362306a36Sopenharmony_ci#define MII_CLKRANGE_20_35M MII_CLKRANGE(2) 2462306a36Sopenharmony_ci#define MII_CLKRANGE_35_60M MII_CLKRANGE(3) 2562306a36Sopenharmony_ci#define MII_CLKRANGE_150_250M MII_CLKRANGE(4) 2662306a36Sopenharmony_ci#define MII_CLKRANGE_250_300M MII_CLKRANGE(5) 2762306a36Sopenharmony_ci#define MII_CLKRANGE_MASK GENMASK(4, 2) 2862306a36Sopenharmony_ci#define MII_REG_SHIFT 6 2962306a36Sopenharmony_ci#define MII_REG_MASK GENMASK(10, 6) 3062306a36Sopenharmony_ci#define MII_ADDR_SHIFT 11 3162306a36Sopenharmony_ci#define MII_ADDR_MASK GENMASK(15, 11) 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci#define MII_DATA_REG_ADDR 0x14 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci#define MII_MDIO_DELAY_USEC (1000) 3662306a36Sopenharmony_ci#define MII_MDIO_RETRY_MSEC (10) 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_cistruct ipq8064_mdio { 3962306a36Sopenharmony_ci struct regmap *base; /* NSS_GMAC0_BASE */ 4062306a36Sopenharmony_ci}; 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_cistatic int 4362306a36Sopenharmony_ciipq8064_mdio_wait_busy(struct ipq8064_mdio *priv) 4462306a36Sopenharmony_ci{ 4562306a36Sopenharmony_ci u32 busy; 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci return regmap_read_poll_timeout(priv->base, MII_ADDR_REG_ADDR, busy, 4862306a36Sopenharmony_ci !(busy & MII_BUSY), MII_MDIO_DELAY_USEC, 4962306a36Sopenharmony_ci MII_MDIO_RETRY_MSEC * USEC_PER_MSEC); 5062306a36Sopenharmony_ci} 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_cistatic int 5362306a36Sopenharmony_ciipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset) 5462306a36Sopenharmony_ci{ 5562306a36Sopenharmony_ci u32 miiaddr = MII_BUSY | MII_CLKRANGE_250_300M; 5662306a36Sopenharmony_ci struct ipq8064_mdio *priv = bus->priv; 5762306a36Sopenharmony_ci u32 ret_val; 5862306a36Sopenharmony_ci int err; 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) | 6162306a36Sopenharmony_ci ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK); 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr); 6462306a36Sopenharmony_ci usleep_range(10, 13); 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci err = ipq8064_mdio_wait_busy(priv); 6762306a36Sopenharmony_ci if (err) 6862306a36Sopenharmony_ci return err; 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci regmap_read(priv->base, MII_DATA_REG_ADDR, &ret_val); 7162306a36Sopenharmony_ci return (int)ret_val; 7262306a36Sopenharmony_ci} 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_cistatic int 7562306a36Sopenharmony_ciipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data) 7662306a36Sopenharmony_ci{ 7762306a36Sopenharmony_ci u32 miiaddr = MII_WRITE | MII_BUSY | MII_CLKRANGE_250_300M; 7862306a36Sopenharmony_ci struct ipq8064_mdio *priv = bus->priv; 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci regmap_write(priv->base, MII_DATA_REG_ADDR, data); 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_ci miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) | 8362306a36Sopenharmony_ci ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK); 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr); 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_ci /* For the specific reg 31 extra time is needed or the next 8862306a36Sopenharmony_ci * read will produce garbage data. 8962306a36Sopenharmony_ci */ 9062306a36Sopenharmony_ci if (reg_offset == 31) 9162306a36Sopenharmony_ci usleep_range(30, 43); 9262306a36Sopenharmony_ci else 9362306a36Sopenharmony_ci usleep_range(10, 13); 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_ci return ipq8064_mdio_wait_busy(priv); 9662306a36Sopenharmony_ci} 9762306a36Sopenharmony_ci 9862306a36Sopenharmony_cistatic const struct regmap_config ipq8064_mdio_regmap_config = { 9962306a36Sopenharmony_ci .reg_bits = 32, 10062306a36Sopenharmony_ci .reg_stride = 4, 10162306a36Sopenharmony_ci .val_bits = 32, 10262306a36Sopenharmony_ci .can_multi_write = false, 10362306a36Sopenharmony_ci /* the mdio lock is used by any user of this mdio driver */ 10462306a36Sopenharmony_ci .disable_locking = true, 10562306a36Sopenharmony_ci 10662306a36Sopenharmony_ci .cache_type = REGCACHE_NONE, 10762306a36Sopenharmony_ci}; 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_cistatic int 11062306a36Sopenharmony_ciipq8064_mdio_probe(struct platform_device *pdev) 11162306a36Sopenharmony_ci{ 11262306a36Sopenharmony_ci struct device_node *np = pdev->dev.of_node; 11362306a36Sopenharmony_ci struct ipq8064_mdio *priv; 11462306a36Sopenharmony_ci struct resource res; 11562306a36Sopenharmony_ci struct mii_bus *bus; 11662306a36Sopenharmony_ci void __iomem *base; 11762306a36Sopenharmony_ci int ret; 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_ci if (of_address_to_resource(np, 0, &res)) 12062306a36Sopenharmony_ci return -ENOMEM; 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_ci base = devm_ioremap(&pdev->dev, res.start, resource_size(&res)); 12362306a36Sopenharmony_ci if (!base) 12462306a36Sopenharmony_ci return -ENOMEM; 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_ci bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*priv)); 12762306a36Sopenharmony_ci if (!bus) 12862306a36Sopenharmony_ci return -ENOMEM; 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_ci bus->name = "ipq8064_mdio_bus"; 13162306a36Sopenharmony_ci bus->read = ipq8064_mdio_read; 13262306a36Sopenharmony_ci bus->write = ipq8064_mdio_write; 13362306a36Sopenharmony_ci snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev)); 13462306a36Sopenharmony_ci bus->parent = &pdev->dev; 13562306a36Sopenharmony_ci 13662306a36Sopenharmony_ci priv = bus->priv; 13762306a36Sopenharmony_ci priv->base = devm_regmap_init_mmio(&pdev->dev, base, 13862306a36Sopenharmony_ci &ipq8064_mdio_regmap_config); 13962306a36Sopenharmony_ci if (IS_ERR(priv->base)) 14062306a36Sopenharmony_ci return PTR_ERR(priv->base); 14162306a36Sopenharmony_ci 14262306a36Sopenharmony_ci ret = of_mdiobus_register(bus, np); 14362306a36Sopenharmony_ci if (ret) 14462306a36Sopenharmony_ci return ret; 14562306a36Sopenharmony_ci 14662306a36Sopenharmony_ci platform_set_drvdata(pdev, bus); 14762306a36Sopenharmony_ci return 0; 14862306a36Sopenharmony_ci} 14962306a36Sopenharmony_ci 15062306a36Sopenharmony_cistatic int 15162306a36Sopenharmony_ciipq8064_mdio_remove(struct platform_device *pdev) 15262306a36Sopenharmony_ci{ 15362306a36Sopenharmony_ci struct mii_bus *bus = platform_get_drvdata(pdev); 15462306a36Sopenharmony_ci 15562306a36Sopenharmony_ci mdiobus_unregister(bus); 15662306a36Sopenharmony_ci 15762306a36Sopenharmony_ci return 0; 15862306a36Sopenharmony_ci} 15962306a36Sopenharmony_ci 16062306a36Sopenharmony_cistatic const struct of_device_id ipq8064_mdio_dt_ids[] = { 16162306a36Sopenharmony_ci { .compatible = "qcom,ipq8064-mdio" }, 16262306a36Sopenharmony_ci { } 16362306a36Sopenharmony_ci}; 16462306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, ipq8064_mdio_dt_ids); 16562306a36Sopenharmony_ci 16662306a36Sopenharmony_cistatic struct platform_driver ipq8064_mdio_driver = { 16762306a36Sopenharmony_ci .probe = ipq8064_mdio_probe, 16862306a36Sopenharmony_ci .remove = ipq8064_mdio_remove, 16962306a36Sopenharmony_ci .driver = { 17062306a36Sopenharmony_ci .name = "ipq8064-mdio", 17162306a36Sopenharmony_ci .of_match_table = ipq8064_mdio_dt_ids, 17262306a36Sopenharmony_ci }, 17362306a36Sopenharmony_ci}; 17462306a36Sopenharmony_ci 17562306a36Sopenharmony_cimodule_platform_driver(ipq8064_mdio_driver); 17662306a36Sopenharmony_ci 17762306a36Sopenharmony_ciMODULE_DESCRIPTION("Qualcomm IPQ8064 MDIO interface driver"); 17862306a36Sopenharmony_ciMODULE_AUTHOR("Christian Lamparter <chunkeey@gmail.com>"); 17962306a36Sopenharmony_ciMODULE_AUTHOR("Ansuel Smith <ansuelsmth@gmail.com>"); 18062306a36Sopenharmony_ciMODULE_LICENSE("GPL"); 181