162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
262306a36Sopenharmony_ci/* 10G controller driver for Samsung SoCs
362306a36Sopenharmony_ci *
462306a36Sopenharmony_ci * Copyright (C) 2013 Samsung Electronics Co., Ltd.
562306a36Sopenharmony_ci *		http://www.samsung.com
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci * Author: Siva Reddy Kallam <siva.kallam@samsung.com>
862306a36Sopenharmony_ci */
962306a36Sopenharmony_ci#ifndef __SXGBE_DMA_H__
1062306a36Sopenharmony_ci#define __SXGBE_DMA_H__
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci/* forward declaration */
1362306a36Sopenharmony_cistruct sxgbe_extra_stats;
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci#define SXGBE_DMA_BLENMAP_LSHIFT	1
1662306a36Sopenharmony_ci#define SXGBE_DMA_TXPBL_LSHIFT		16
1762306a36Sopenharmony_ci#define SXGBE_DMA_RXPBL_LSHIFT		16
1862306a36Sopenharmony_ci#define DEFAULT_DMA_PBL			8
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_cistruct sxgbe_dma_ops {
2162306a36Sopenharmony_ci	/* DMA core initialization */
2262306a36Sopenharmony_ci	int (*init)(void __iomem *ioaddr, int fix_burst, int burst_map);
2362306a36Sopenharmony_ci	void (*cha_init)(void __iomem *ioaddr, int cha_num, int fix_burst,
2462306a36Sopenharmony_ci			 int pbl, dma_addr_t dma_tx, dma_addr_t dma_rx,
2562306a36Sopenharmony_ci			 int t_rzie, int r_rsize);
2662306a36Sopenharmony_ci	void (*enable_dma_transmission)(void __iomem *ioaddr, int dma_cnum);
2762306a36Sopenharmony_ci	void (*enable_dma_irq)(void __iomem *ioaddr, int dma_cnum);
2862306a36Sopenharmony_ci	void (*disable_dma_irq)(void __iomem *ioaddr, int dma_cnum);
2962306a36Sopenharmony_ci	void (*start_tx)(void __iomem *ioaddr, int tchannels);
3062306a36Sopenharmony_ci	void (*start_tx_queue)(void __iomem *ioaddr, int dma_cnum);
3162306a36Sopenharmony_ci	void (*stop_tx)(void __iomem *ioaddr, int tchannels);
3262306a36Sopenharmony_ci	void (*stop_tx_queue)(void __iomem *ioaddr, int dma_cnum);
3362306a36Sopenharmony_ci	void (*start_rx)(void __iomem *ioaddr, int rchannels);
3462306a36Sopenharmony_ci	void (*stop_rx)(void __iomem *ioaddr, int rchannels);
3562306a36Sopenharmony_ci	int (*tx_dma_int_status)(void __iomem *ioaddr, int channel_no,
3662306a36Sopenharmony_ci				 struct sxgbe_extra_stats *x);
3762306a36Sopenharmony_ci	int (*rx_dma_int_status)(void __iomem *ioaddr, int channel_no,
3862306a36Sopenharmony_ci				 struct sxgbe_extra_stats *x);
3962306a36Sopenharmony_ci	/* Program the HW RX Watchdog */
4062306a36Sopenharmony_ci	void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt);
4162306a36Sopenharmony_ci	/* Enable TSO for each DMA channel */
4262306a36Sopenharmony_ci	void (*enable_tso)(void __iomem *ioaddr, u8 chan_num);
4362306a36Sopenharmony_ci};
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ciconst struct sxgbe_dma_ops *sxgbe_get_dma_ops(void);
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci#endif /* __SXGBE_CORE_H__ */
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