162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* Renesas R-Car Gen4 gPTP device driver 362306a36Sopenharmony_ci * 462306a36Sopenharmony_ci * Copyright (C) 2022 Renesas Electronics Corporation 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#ifndef __RCAR_GEN4_PTP_H__ 862306a36Sopenharmony_ci#define __RCAR_GEN4_PTP_H__ 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci#include <linux/ptp_clock_kernel.h> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#define PTPTIVC_INIT 0x19000000 /* 320MHz */ 1362306a36Sopenharmony_ci#define RCAR_GEN4_PTP_CLOCK_S4 PTPTIVC_INIT 1462306a36Sopenharmony_ci#define RCAR_GEN4_GPTP_OFFSET_S4 0x00018000 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci/* for rcar_gen4_ptp_init */ 1762306a36Sopenharmony_cienum rcar_gen4_ptp_reg_layout { 1862306a36Sopenharmony_ci RCAR_GEN4_PTP_REG_LAYOUT_S4 1962306a36Sopenharmony_ci}; 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci/* driver's definitions */ 2262306a36Sopenharmony_ci#define RCAR_GEN4_RXTSTAMP_ENABLED BIT(0) 2362306a36Sopenharmony_ci#define RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT BIT(1) 2462306a36Sopenharmony_ci#define RCAR_GEN4_RXTSTAMP_TYPE_ALL (RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT | BIT(2)) 2562306a36Sopenharmony_ci#define RCAR_GEN4_RXTSTAMP_TYPE RCAR_GEN4_RXTSTAMP_TYPE_ALL 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci#define RCAR_GEN4_TXTSTAMP_ENABLED BIT(0) 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci#define PTPRO 0 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_cienum rcar_gen4_ptp_reg_s4 { 3262306a36Sopenharmony_ci PTPTMEC = PTPRO + 0x0010, 3362306a36Sopenharmony_ci PTPTMDC = PTPRO + 0x0014, 3462306a36Sopenharmony_ci PTPTIVC0 = PTPRO + 0x0020, 3562306a36Sopenharmony_ci PTPTOVC00 = PTPRO + 0x0030, 3662306a36Sopenharmony_ci PTPTOVC10 = PTPRO + 0x0034, 3762306a36Sopenharmony_ci PTPTOVC20 = PTPRO + 0x0038, 3862306a36Sopenharmony_ci PTPGPTPTM00 = PTPRO + 0x0050, 3962306a36Sopenharmony_ci PTPGPTPTM10 = PTPRO + 0x0054, 4062306a36Sopenharmony_ci PTPGPTPTM20 = PTPRO + 0x0058, 4162306a36Sopenharmony_ci}; 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_cistruct rcar_gen4_ptp_reg_offset { 4462306a36Sopenharmony_ci u16 enable; 4562306a36Sopenharmony_ci u16 disable; 4662306a36Sopenharmony_ci u16 increment; 4762306a36Sopenharmony_ci u16 config_t0; 4862306a36Sopenharmony_ci u16 config_t1; 4962306a36Sopenharmony_ci u16 config_t2; 5062306a36Sopenharmony_ci u16 monitor_t0; 5162306a36Sopenharmony_ci u16 monitor_t1; 5262306a36Sopenharmony_ci u16 monitor_t2; 5362306a36Sopenharmony_ci}; 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_cistruct rcar_gen4_ptp_private { 5662306a36Sopenharmony_ci void __iomem *addr; 5762306a36Sopenharmony_ci struct ptp_clock *clock; 5862306a36Sopenharmony_ci struct ptp_clock_info info; 5962306a36Sopenharmony_ci const struct rcar_gen4_ptp_reg_offset *offs; 6062306a36Sopenharmony_ci spinlock_t lock; /* For multiple registers access */ 6162306a36Sopenharmony_ci u32 tstamp_tx_ctrl; 6262306a36Sopenharmony_ci u32 tstamp_rx_ctrl; 6362306a36Sopenharmony_ci s64 default_addend; 6462306a36Sopenharmony_ci bool initialized; 6562306a36Sopenharmony_ci}; 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ciint rcar_gen4_ptp_register(struct rcar_gen4_ptp_private *ptp_priv, 6862306a36Sopenharmony_ci enum rcar_gen4_ptp_reg_layout layout, u32 clock); 6962306a36Sopenharmony_ciint rcar_gen4_ptp_unregister(struct rcar_gen4_ptp_private *ptp_priv); 7062306a36Sopenharmony_cistruct rcar_gen4_ptp_private *rcar_gen4_ptp_alloc(struct platform_device *pdev); 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci#endif /* #ifndef __RCAR_GEN4_PTP_H__ */ 73