1/* 2 * Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc. 3 * Copyright (c) 2014, I2SE GmbH 4 * 5 * Permission to use, copy, modify, and/or distribute this software 6 * for any purpose with or without fee is hereby granted, provided 7 * that the above copyright notice and this permission notice appear 8 * in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL 13 * THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR 14 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 15 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, 16 * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 17 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20/* This module implements the Qualcomm Atheros SPI protocol for 21 * kernel-based SPI device; it is essentially an Ethernet-to-SPI 22 * serial converter; 23 */ 24 25#include <linux/errno.h> 26#include <linux/etherdevice.h> 27#include <linux/if_arp.h> 28#include <linux/if_ether.h> 29#include <linux/init.h> 30#include <linux/interrupt.h> 31#include <linux/jiffies.h> 32#include <linux/kernel.h> 33#include <linux/kthread.h> 34#include <linux/module.h> 35#include <linux/moduleparam.h> 36#include <linux/netdevice.h> 37#include <linux/of.h> 38#include <linux/of_net.h> 39#include <linux/sched.h> 40#include <linux/skbuff.h> 41#include <linux/spi/spi.h> 42#include <linux/types.h> 43 44#include "qca_7k.h" 45#include "qca_7k_common.h" 46#include "qca_debug.h" 47#include "qca_spi.h" 48 49#define MAX_DMA_BURST_LEN 5000 50 51/* Modules parameters */ 52#define QCASPI_CLK_SPEED_MIN 1000000 53#define QCASPI_CLK_SPEED_MAX 16000000 54#define QCASPI_CLK_SPEED 8000000 55static int qcaspi_clkspeed; 56module_param(qcaspi_clkspeed, int, 0); 57MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000."); 58 59#define QCASPI_BURST_LEN_MIN 1 60#define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN 61static int qcaspi_burst_len = MAX_DMA_BURST_LEN; 62module_param(qcaspi_burst_len, int, 0); 63MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000."); 64 65#define QCASPI_PLUGGABLE_MIN 0 66#define QCASPI_PLUGGABLE_MAX 1 67static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN; 68module_param(qcaspi_pluggable, int, 0); 69MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no)."); 70 71#define QCASPI_WRITE_VERIFY_MIN 0 72#define QCASPI_WRITE_VERIFY_MAX 3 73static int wr_verify = QCASPI_WRITE_VERIFY_MIN; 74module_param(wr_verify, int, 0); 75MODULE_PARM_DESC(wr_verify, "SPI register write verify trails. Use 0-3."); 76 77#define QCASPI_TX_TIMEOUT (1 * HZ) 78#define QCASPI_QCA7K_REBOOT_TIME_MS 1000 79 80static void 81start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause) 82{ 83 *intr_cause = 0; 84 85 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify); 86 qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause); 87 netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause); 88} 89 90static void 91end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause) 92{ 93 u16 intr_enable = (SPI_INT_CPU_ON | 94 SPI_INT_PKT_AVLBL | 95 SPI_INT_RDBUF_ERR | 96 SPI_INT_WRBUF_ERR); 97 98 qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause, 0); 99 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable, wr_verify); 100 netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause); 101} 102 103static u32 104qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len) 105{ 106 __be16 cmd; 107 struct spi_message msg; 108 struct spi_transfer transfer[2]; 109 int ret; 110 111 memset(&transfer, 0, sizeof(transfer)); 112 spi_message_init(&msg); 113 114 cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 115 transfer[0].tx_buf = &cmd; 116 transfer[0].len = QCASPI_CMD_LEN; 117 transfer[1].tx_buf = src; 118 transfer[1].len = len; 119 120 spi_message_add_tail(&transfer[0], &msg); 121 spi_message_add_tail(&transfer[1], &msg); 122 ret = spi_sync(qca->spi_dev, &msg); 123 124 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 125 qcaspi_spi_error(qca); 126 return 0; 127 } 128 129 return len; 130} 131 132static u32 133qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len) 134{ 135 struct spi_message msg; 136 struct spi_transfer transfer; 137 int ret; 138 139 memset(&transfer, 0, sizeof(transfer)); 140 spi_message_init(&msg); 141 142 transfer.tx_buf = src; 143 transfer.len = len; 144 145 spi_message_add_tail(&transfer, &msg); 146 ret = spi_sync(qca->spi_dev, &msg); 147 148 if (ret || (msg.actual_length != len)) { 149 qcaspi_spi_error(qca); 150 return 0; 151 } 152 153 return len; 154} 155 156static u32 157qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len) 158{ 159 struct spi_message msg; 160 __be16 cmd; 161 struct spi_transfer transfer[2]; 162 int ret; 163 164 memset(&transfer, 0, sizeof(transfer)); 165 spi_message_init(&msg); 166 167 cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 168 transfer[0].tx_buf = &cmd; 169 transfer[0].len = QCASPI_CMD_LEN; 170 transfer[1].rx_buf = dst; 171 transfer[1].len = len; 172 173 spi_message_add_tail(&transfer[0], &msg); 174 spi_message_add_tail(&transfer[1], &msg); 175 ret = spi_sync(qca->spi_dev, &msg); 176 177 if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { 178 qcaspi_spi_error(qca); 179 return 0; 180 } 181 182 return len; 183} 184 185static u32 186qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len) 187{ 188 struct spi_message msg; 189 struct spi_transfer transfer; 190 int ret; 191 192 memset(&transfer, 0, sizeof(transfer)); 193 spi_message_init(&msg); 194 195 transfer.rx_buf = dst; 196 transfer.len = len; 197 198 spi_message_add_tail(&transfer, &msg); 199 ret = spi_sync(qca->spi_dev, &msg); 200 201 if (ret || (msg.actual_length != len)) { 202 qcaspi_spi_error(qca); 203 return 0; 204 } 205 206 return len; 207} 208 209static int 210qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd) 211{ 212 __be16 tx_data; 213 struct spi_message msg; 214 struct spi_transfer transfer; 215 int ret; 216 217 memset(&transfer, 0, sizeof(transfer)); 218 219 spi_message_init(&msg); 220 221 tx_data = cpu_to_be16(cmd); 222 transfer.len = sizeof(cmd); 223 transfer.tx_buf = &tx_data; 224 spi_message_add_tail(&transfer, &msg); 225 226 ret = spi_sync(qca->spi_dev, &msg); 227 228 if (!ret) 229 ret = msg.status; 230 231 if (ret) 232 qcaspi_spi_error(qca); 233 234 return ret; 235} 236 237static int 238qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb) 239{ 240 u32 count; 241 u32 written; 242 u32 offset; 243 u32 len; 244 245 len = skb->len; 246 247 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len, wr_verify); 248 if (qca->legacy_mode) 249 qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); 250 251 offset = 0; 252 while (len) { 253 count = len; 254 if (count > qca->burst_len) 255 count = qca->burst_len; 256 257 if (qca->legacy_mode) { 258 written = qcaspi_write_legacy(qca, 259 skb->data + offset, 260 count); 261 } else { 262 written = qcaspi_write_burst(qca, 263 skb->data + offset, 264 count); 265 } 266 267 if (written != count) 268 return -1; 269 270 offset += count; 271 len -= count; 272 } 273 274 return 0; 275} 276 277static int 278qcaspi_transmit(struct qcaspi *qca) 279{ 280 struct net_device_stats *n_stats = &qca->net_dev->stats; 281 u16 available = 0; 282 u32 pkt_len; 283 u16 new_head; 284 u16 packets = 0; 285 286 if (qca->txr.skb[qca->txr.head] == NULL) 287 return 0; 288 289 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available); 290 291 if (available > QCASPI_HW_BUF_LEN) { 292 /* This could only happen by interferences on the SPI line. 293 * So retry later ... 294 */ 295 qca->stats.buf_avail_err++; 296 return -1; 297 } 298 299 while (qca->txr.skb[qca->txr.head]) { 300 pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN; 301 302 if (available < pkt_len) { 303 if (packets == 0) 304 qca->stats.write_buf_miss++; 305 break; 306 } 307 308 if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) { 309 qca->stats.write_err++; 310 return -1; 311 } 312 313 packets++; 314 n_stats->tx_packets++; 315 n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len; 316 available -= pkt_len; 317 318 /* remove the skb from the queue */ 319 /* XXX After inconsistent lock states netif_tx_lock() 320 * has been replaced by netif_tx_lock_bh() and so on. 321 */ 322 netif_tx_lock_bh(qca->net_dev); 323 dev_kfree_skb(qca->txr.skb[qca->txr.head]); 324 qca->txr.skb[qca->txr.head] = NULL; 325 qca->txr.size -= pkt_len; 326 new_head = qca->txr.head + 1; 327 if (new_head >= qca->txr.count) 328 new_head = 0; 329 qca->txr.head = new_head; 330 if (netif_queue_stopped(qca->net_dev)) 331 netif_wake_queue(qca->net_dev); 332 netif_tx_unlock_bh(qca->net_dev); 333 } 334 335 return 0; 336} 337 338static int 339qcaspi_receive(struct qcaspi *qca) 340{ 341 struct net_device *net_dev = qca->net_dev; 342 struct net_device_stats *n_stats = &net_dev->stats; 343 u16 available = 0; 344 u32 bytes_read; 345 u8 *cp; 346 347 /* Allocate rx SKB if we don't have one available. */ 348 if (!qca->rx_skb) { 349 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 350 net_dev->mtu + 351 VLAN_ETH_HLEN); 352 if (!qca->rx_skb) { 353 netdev_dbg(net_dev, "out of RX resources\n"); 354 qca->stats.out_of_mem++; 355 return -1; 356 } 357 } 358 359 /* Read the packet size. */ 360 qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available); 361 362 netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %08x\n", 363 available); 364 365 if (available > QCASPI_HW_BUF_LEN + QCASPI_HW_PKT_LEN) { 366 /* This could only happen by interferences on the SPI line. 367 * So retry later ... 368 */ 369 qca->stats.buf_avail_err++; 370 return -1; 371 } else if (available == 0) { 372 netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n"); 373 return -1; 374 } 375 376 qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available, wr_verify); 377 378 if (qca->legacy_mode) 379 qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); 380 381 while (available) { 382 u32 count = available; 383 384 if (count > qca->burst_len) 385 count = qca->burst_len; 386 387 if (qca->legacy_mode) { 388 bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer, 389 count); 390 } else { 391 bytes_read = qcaspi_read_burst(qca, qca->rx_buffer, 392 count); 393 } 394 395 netdev_dbg(net_dev, "available: %d, byte read: %d\n", 396 available, bytes_read); 397 398 if (bytes_read) { 399 available -= bytes_read; 400 } else { 401 qca->stats.read_err++; 402 return -1; 403 } 404 405 cp = qca->rx_buffer; 406 407 while ((bytes_read--) && (qca->rx_skb)) { 408 s32 retcode; 409 410 retcode = qcafrm_fsm_decode(&qca->frm_handle, 411 qca->rx_skb->data, 412 skb_tailroom(qca->rx_skb), 413 *cp); 414 cp++; 415 switch (retcode) { 416 case QCAFRM_GATHER: 417 case QCAFRM_NOHEAD: 418 break; 419 case QCAFRM_NOTAIL: 420 netdev_dbg(net_dev, "no RX tail\n"); 421 n_stats->rx_errors++; 422 n_stats->rx_dropped++; 423 break; 424 case QCAFRM_INVLEN: 425 netdev_dbg(net_dev, "invalid RX length\n"); 426 n_stats->rx_errors++; 427 n_stats->rx_dropped++; 428 break; 429 default: 430 qca->rx_skb->dev = qca->net_dev; 431 n_stats->rx_packets++; 432 n_stats->rx_bytes += retcode; 433 skb_put(qca->rx_skb, retcode); 434 qca->rx_skb->protocol = eth_type_trans( 435 qca->rx_skb, qca->rx_skb->dev); 436 skb_checksum_none_assert(qca->rx_skb); 437 netif_rx(qca->rx_skb); 438 qca->rx_skb = netdev_alloc_skb_ip_align(net_dev, 439 net_dev->mtu + VLAN_ETH_HLEN); 440 if (!qca->rx_skb) { 441 netdev_dbg(net_dev, "out of RX resources\n"); 442 n_stats->rx_errors++; 443 qca->stats.out_of_mem++; 444 break; 445 } 446 } 447 } 448 } 449 450 return 0; 451} 452 453/* Check that tx ring stores only so much bytes 454 * that fit into the internal QCA buffer. 455 */ 456 457static int 458qcaspi_tx_ring_has_space(struct tx_ring *txr) 459{ 460 if (txr->skb[txr->tail]) 461 return 0; 462 463 return (txr->size + QCAFRM_MAX_LEN < QCASPI_HW_BUF_LEN) ? 1 : 0; 464} 465 466/* Flush the tx ring. This function is only safe to 467 * call from the qcaspi_spi_thread. 468 */ 469 470static void 471qcaspi_flush_tx_ring(struct qcaspi *qca) 472{ 473 int i; 474 475 /* XXX After inconsistent lock states netif_tx_lock() 476 * has been replaced by netif_tx_lock_bh() and so on. 477 */ 478 netif_tx_lock_bh(qca->net_dev); 479 for (i = 0; i < TX_RING_MAX_LEN; i++) { 480 if (qca->txr.skb[i]) { 481 dev_kfree_skb(qca->txr.skb[i]); 482 qca->txr.skb[i] = NULL; 483 qca->net_dev->stats.tx_dropped++; 484 } 485 } 486 qca->txr.tail = 0; 487 qca->txr.head = 0; 488 qca->txr.size = 0; 489 netif_tx_unlock_bh(qca->net_dev); 490} 491 492static void 493qcaspi_qca7k_sync(struct qcaspi *qca, int event) 494{ 495 u16 signature = 0; 496 u16 spi_config; 497 u16 wrbuf_space = 0; 498 499 if (event == QCASPI_EVENT_CPUON) { 500 /* Read signature twice, if not valid 501 * go back to unknown state. 502 */ 503 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 504 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 505 if (signature != QCASPI_GOOD_SIGNATURE) { 506 if (qca->sync == QCASPI_SYNC_READY) 507 qca->stats.bad_signature++; 508 509 qca->sync = QCASPI_SYNC_UNKNOWN; 510 netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n"); 511 return; 512 } else { 513 /* ensure that the WRBUF is empty */ 514 qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, 515 &wrbuf_space); 516 if (wrbuf_space != QCASPI_HW_BUF_LEN) { 517 netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n"); 518 qca->sync = QCASPI_SYNC_UNKNOWN; 519 } else { 520 netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n"); 521 qca->sync = QCASPI_SYNC_READY; 522 return; 523 } 524 } 525 } 526 527 switch (qca->sync) { 528 case QCASPI_SYNC_READY: 529 /* Check signature twice, if not valid go to unknown state. */ 530 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 531 if (signature != QCASPI_GOOD_SIGNATURE) 532 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 533 534 if (signature != QCASPI_GOOD_SIGNATURE) { 535 qca->sync = QCASPI_SYNC_UNKNOWN; 536 qca->stats.bad_signature++; 537 netdev_dbg(qca->net_dev, "sync: bad signature, restart\n"); 538 /* don't reset right away */ 539 return; 540 } 541 break; 542 case QCASPI_SYNC_UNKNOWN: 543 /* Read signature, if not valid stay in unknown state */ 544 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 545 if (signature != QCASPI_GOOD_SIGNATURE) { 546 netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n"); 547 return; 548 } 549 550 /* TODO: use GPIO to reset QCA7000 in legacy mode*/ 551 netdev_dbg(qca->net_dev, "sync: resetting device.\n"); 552 qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config); 553 spi_config |= QCASPI_SLAVE_RESET_BIT; 554 qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config, 0); 555 556 qca->sync = QCASPI_SYNC_RESET; 557 qca->stats.trig_reset++; 558 qca->reset_count = 0; 559 break; 560 case QCASPI_SYNC_RESET: 561 qca->reset_count++; 562 netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n", 563 qca->reset_count); 564 if (qca->reset_count >= QCASPI_RESET_TIMEOUT) { 565 /* reset did not seem to take place, try again */ 566 qca->sync = QCASPI_SYNC_UNKNOWN; 567 qca->stats.reset_timeout++; 568 netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n"); 569 } 570 break; 571 } 572} 573 574static int 575qcaspi_spi_thread(void *data) 576{ 577 struct qcaspi *qca = data; 578 u16 intr_cause = 0; 579 580 netdev_info(qca->net_dev, "SPI thread created\n"); 581 while (!kthread_should_stop()) { 582 set_current_state(TASK_INTERRUPTIBLE); 583 if (kthread_should_park()) { 584 netif_tx_disable(qca->net_dev); 585 netif_carrier_off(qca->net_dev); 586 qcaspi_flush_tx_ring(qca); 587 kthread_parkme(); 588 if (qca->sync == QCASPI_SYNC_READY) { 589 netif_carrier_on(qca->net_dev); 590 netif_wake_queue(qca->net_dev); 591 } 592 continue; 593 } 594 595 if ((qca->intr_req == qca->intr_svc) && 596 !qca->txr.skb[qca->txr.head]) 597 schedule(); 598 599 set_current_state(TASK_RUNNING); 600 601 netdev_dbg(qca->net_dev, "have work to do. int: %d, tx_skb: %p\n", 602 qca->intr_req - qca->intr_svc, 603 qca->txr.skb[qca->txr.head]); 604 605 qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE); 606 607 if (qca->sync != QCASPI_SYNC_READY) { 608 netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n", 609 (unsigned int)qca->sync); 610 netif_stop_queue(qca->net_dev); 611 netif_carrier_off(qca->net_dev); 612 qcaspi_flush_tx_ring(qca); 613 msleep(QCASPI_QCA7K_REBOOT_TIME_MS); 614 } 615 616 if (qca->intr_svc != qca->intr_req) { 617 qca->intr_svc = qca->intr_req; 618 start_spi_intr_handling(qca, &intr_cause); 619 620 if (intr_cause & SPI_INT_CPU_ON) { 621 qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON); 622 623 /* Frame decoding in progress */ 624 if (qca->frm_handle.state != qca->frm_handle.init) 625 qca->net_dev->stats.rx_dropped++; 626 627 qcafrm_fsm_init_spi(&qca->frm_handle); 628 qca->stats.device_reset++; 629 630 /* not synced. */ 631 if (qca->sync != QCASPI_SYNC_READY) 632 continue; 633 634 netif_wake_queue(qca->net_dev); 635 netif_carrier_on(qca->net_dev); 636 } 637 638 if (intr_cause & SPI_INT_RDBUF_ERR) { 639 /* restart sync */ 640 netdev_dbg(qca->net_dev, "===> rdbuf error!\n"); 641 qca->stats.read_buf_err++; 642 qca->sync = QCASPI_SYNC_UNKNOWN; 643 continue; 644 } 645 646 if (intr_cause & SPI_INT_WRBUF_ERR) { 647 /* restart sync */ 648 netdev_dbg(qca->net_dev, "===> wrbuf error!\n"); 649 qca->stats.write_buf_err++; 650 qca->sync = QCASPI_SYNC_UNKNOWN; 651 continue; 652 } 653 654 /* can only handle other interrupts 655 * if sync has occurred 656 */ 657 if (qca->sync == QCASPI_SYNC_READY) { 658 if (intr_cause & SPI_INT_PKT_AVLBL) 659 qcaspi_receive(qca); 660 } 661 662 end_spi_intr_handling(qca, intr_cause); 663 } 664 665 if (qca->sync == QCASPI_SYNC_READY) 666 qcaspi_transmit(qca); 667 } 668 set_current_state(TASK_RUNNING); 669 netdev_info(qca->net_dev, "SPI thread exit\n"); 670 671 return 0; 672} 673 674static irqreturn_t 675qcaspi_intr_handler(int irq, void *data) 676{ 677 struct qcaspi *qca = data; 678 679 qca->intr_req++; 680 if (qca->spi_thread) 681 wake_up_process(qca->spi_thread); 682 683 return IRQ_HANDLED; 684} 685 686static int 687qcaspi_netdev_open(struct net_device *dev) 688{ 689 struct qcaspi *qca = netdev_priv(dev); 690 int ret = 0; 691 692 if (!qca) 693 return -EINVAL; 694 695 qca->intr_req = 1; 696 qca->intr_svc = 0; 697 qca->sync = QCASPI_SYNC_UNKNOWN; 698 qcafrm_fsm_init_spi(&qca->frm_handle); 699 700 qca->spi_thread = kthread_run((void *)qcaspi_spi_thread, 701 qca, "%s", dev->name); 702 703 if (IS_ERR(qca->spi_thread)) { 704 netdev_err(dev, "%s: unable to start kernel thread.\n", 705 QCASPI_DRV_NAME); 706 return PTR_ERR(qca->spi_thread); 707 } 708 709 ret = request_irq(qca->spi_dev->irq, qcaspi_intr_handler, 0, 710 dev->name, qca); 711 if (ret) { 712 netdev_err(dev, "%s: unable to get IRQ %d (irqval=%d).\n", 713 QCASPI_DRV_NAME, qca->spi_dev->irq, ret); 714 kthread_stop(qca->spi_thread); 715 return ret; 716 } 717 718 /* SPI thread takes care of TX queue */ 719 720 return 0; 721} 722 723static int 724qcaspi_netdev_close(struct net_device *dev) 725{ 726 struct qcaspi *qca = netdev_priv(dev); 727 728 netif_stop_queue(dev); 729 730 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify); 731 free_irq(qca->spi_dev->irq, qca); 732 733 kthread_stop(qca->spi_thread); 734 qca->spi_thread = NULL; 735 qcaspi_flush_tx_ring(qca); 736 737 return 0; 738} 739 740static netdev_tx_t 741qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev) 742{ 743 u32 frame_len; 744 u8 *ptmp; 745 struct qcaspi *qca = netdev_priv(dev); 746 u16 new_tail; 747 struct sk_buff *tskb; 748 u8 pad_len = 0; 749 750 if (skb->len < QCAFRM_MIN_LEN) 751 pad_len = QCAFRM_MIN_LEN - skb->len; 752 753 if (qca->txr.skb[qca->txr.tail]) { 754 netdev_warn(qca->net_dev, "queue was unexpectedly full!\n"); 755 netif_stop_queue(qca->net_dev); 756 qca->stats.ring_full++; 757 return NETDEV_TX_BUSY; 758 } 759 760 if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) || 761 (skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) { 762 tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN, 763 QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC); 764 if (!tskb) { 765 qca->stats.out_of_mem++; 766 return NETDEV_TX_BUSY; 767 } 768 dev_kfree_skb(skb); 769 skb = tskb; 770 } 771 772 frame_len = skb->len + pad_len; 773 774 ptmp = skb_push(skb, QCAFRM_HEADER_LEN); 775 qcafrm_create_header(ptmp, frame_len); 776 777 if (pad_len) { 778 ptmp = skb_put_zero(skb, pad_len); 779 } 780 781 ptmp = skb_put(skb, QCAFRM_FOOTER_LEN); 782 qcafrm_create_footer(ptmp); 783 784 netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n", 785 skb->len); 786 787 qca->txr.size += skb->len + QCASPI_HW_PKT_LEN; 788 789 new_tail = qca->txr.tail + 1; 790 if (new_tail >= qca->txr.count) 791 new_tail = 0; 792 793 qca->txr.skb[qca->txr.tail] = skb; 794 qca->txr.tail = new_tail; 795 796 if (!qcaspi_tx_ring_has_space(&qca->txr)) { 797 netif_stop_queue(qca->net_dev); 798 qca->stats.ring_full++; 799 } 800 801 netif_trans_update(dev); 802 803 if (qca->spi_thread) 804 wake_up_process(qca->spi_thread); 805 806 return NETDEV_TX_OK; 807} 808 809static void 810qcaspi_netdev_tx_timeout(struct net_device *dev, unsigned int txqueue) 811{ 812 struct qcaspi *qca = netdev_priv(dev); 813 814 netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n", 815 jiffies, jiffies - dev_trans_start(dev)); 816 qca->net_dev->stats.tx_errors++; 817 /* Trigger tx queue flush and QCA7000 reset */ 818 qca->sync = QCASPI_SYNC_UNKNOWN; 819 820 if (qca->spi_thread) 821 wake_up_process(qca->spi_thread); 822} 823 824static int 825qcaspi_netdev_init(struct net_device *dev) 826{ 827 struct qcaspi *qca = netdev_priv(dev); 828 829 dev->mtu = QCAFRM_MAX_MTU; 830 dev->type = ARPHRD_ETHER; 831 qca->clkspeed = qcaspi_clkspeed; 832 qca->burst_len = qcaspi_burst_len; 833 qca->spi_thread = NULL; 834 qca->buffer_size = (dev->mtu + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN + 835 QCAFRM_FOOTER_LEN + 4) * 4; 836 837 memset(&qca->stats, 0, sizeof(struct qcaspi_stats)); 838 839 qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL); 840 if (!qca->rx_buffer) 841 return -ENOBUFS; 842 843 qca->rx_skb = netdev_alloc_skb_ip_align(dev, qca->net_dev->mtu + 844 VLAN_ETH_HLEN); 845 if (!qca->rx_skb) { 846 kfree(qca->rx_buffer); 847 netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n"); 848 return -ENOBUFS; 849 } 850 851 return 0; 852} 853 854static void 855qcaspi_netdev_uninit(struct net_device *dev) 856{ 857 struct qcaspi *qca = netdev_priv(dev); 858 859 kfree(qca->rx_buffer); 860 qca->buffer_size = 0; 861 dev_kfree_skb(qca->rx_skb); 862} 863 864static const struct net_device_ops qcaspi_netdev_ops = { 865 .ndo_init = qcaspi_netdev_init, 866 .ndo_uninit = qcaspi_netdev_uninit, 867 .ndo_open = qcaspi_netdev_open, 868 .ndo_stop = qcaspi_netdev_close, 869 .ndo_start_xmit = qcaspi_netdev_xmit, 870 .ndo_set_mac_address = eth_mac_addr, 871 .ndo_tx_timeout = qcaspi_netdev_tx_timeout, 872 .ndo_validate_addr = eth_validate_addr, 873}; 874 875static void 876qcaspi_netdev_setup(struct net_device *dev) 877{ 878 struct qcaspi *qca = NULL; 879 880 dev->netdev_ops = &qcaspi_netdev_ops; 881 qcaspi_set_ethtool_ops(dev); 882 dev->watchdog_timeo = QCASPI_TX_TIMEOUT; 883 dev->priv_flags &= ~IFF_TX_SKB_SHARING; 884 dev->tx_queue_len = 100; 885 886 /* MTU range: 46 - 1500 */ 887 dev->min_mtu = QCAFRM_MIN_MTU; 888 dev->max_mtu = QCAFRM_MAX_MTU; 889 890 qca = netdev_priv(dev); 891 memset(qca, 0, sizeof(struct qcaspi)); 892 893 memset(&qca->txr, 0, sizeof(qca->txr)); 894 qca->txr.count = TX_RING_MAX_LEN; 895} 896 897static const struct of_device_id qca_spi_of_match[] = { 898 { .compatible = "qca,qca7000" }, 899 { /* sentinel */ } 900}; 901MODULE_DEVICE_TABLE(of, qca_spi_of_match); 902 903static int 904qca_spi_probe(struct spi_device *spi) 905{ 906 struct qcaspi *qca = NULL; 907 struct net_device *qcaspi_devs = NULL; 908 u8 legacy_mode = 0; 909 u16 signature; 910 int ret; 911 912 if (!spi->dev.of_node) { 913 dev_err(&spi->dev, "Missing device tree\n"); 914 return -EINVAL; 915 } 916 917 legacy_mode = of_property_read_bool(spi->dev.of_node, 918 "qca,legacy-mode"); 919 920 if (qcaspi_clkspeed == 0) { 921 if (spi->max_speed_hz) 922 qcaspi_clkspeed = spi->max_speed_hz; 923 else 924 qcaspi_clkspeed = QCASPI_CLK_SPEED; 925 } 926 927 if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) || 928 (qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) { 929 dev_err(&spi->dev, "Invalid clkspeed: %d\n", 930 qcaspi_clkspeed); 931 return -EINVAL; 932 } 933 934 if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) || 935 (qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) { 936 dev_err(&spi->dev, "Invalid burst len: %d\n", 937 qcaspi_burst_len); 938 return -EINVAL; 939 } 940 941 if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) || 942 (qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) { 943 dev_err(&spi->dev, "Invalid pluggable: %d\n", 944 qcaspi_pluggable); 945 return -EINVAL; 946 } 947 948 if (wr_verify < QCASPI_WRITE_VERIFY_MIN || 949 wr_verify > QCASPI_WRITE_VERIFY_MAX) { 950 dev_err(&spi->dev, "Invalid write verify: %d\n", 951 wr_verify); 952 return -EINVAL; 953 } 954 955 dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n", 956 QCASPI_DRV_VERSION, 957 qcaspi_clkspeed, 958 qcaspi_burst_len, 959 qcaspi_pluggable); 960 961 spi->mode = SPI_MODE_3; 962 spi->max_speed_hz = qcaspi_clkspeed; 963 if (spi_setup(spi) < 0) { 964 dev_err(&spi->dev, "Unable to setup SPI device\n"); 965 return -EFAULT; 966 } 967 968 qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi)); 969 if (!qcaspi_devs) 970 return -ENOMEM; 971 972 qcaspi_netdev_setup(qcaspi_devs); 973 SET_NETDEV_DEV(qcaspi_devs, &spi->dev); 974 975 qca = netdev_priv(qcaspi_devs); 976 if (!qca) { 977 free_netdev(qcaspi_devs); 978 dev_err(&spi->dev, "Fail to retrieve private structure\n"); 979 return -ENOMEM; 980 } 981 qca->net_dev = qcaspi_devs; 982 qca->spi_dev = spi; 983 qca->legacy_mode = legacy_mode; 984 985 spi_set_drvdata(spi, qcaspi_devs); 986 987 ret = of_get_ethdev_address(spi->dev.of_node, qca->net_dev); 988 if (ret) { 989 eth_hw_addr_random(qca->net_dev); 990 dev_info(&spi->dev, "Using random MAC address: %pM\n", 991 qca->net_dev->dev_addr); 992 } 993 994 netif_carrier_off(qca->net_dev); 995 996 if (!qcaspi_pluggable) { 997 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 998 qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); 999 1000 if (signature != QCASPI_GOOD_SIGNATURE) { 1001 dev_err(&spi->dev, "Invalid signature (0x%04X)\n", 1002 signature); 1003 free_netdev(qcaspi_devs); 1004 return -EFAULT; 1005 } 1006 } 1007 1008 if (register_netdev(qcaspi_devs)) { 1009 dev_err(&spi->dev, "Unable to register net device %s\n", 1010 qcaspi_devs->name); 1011 free_netdev(qcaspi_devs); 1012 return -EFAULT; 1013 } 1014 1015 qcaspi_init_device_debugfs(qca); 1016 1017 return 0; 1018} 1019 1020static void 1021qca_spi_remove(struct spi_device *spi) 1022{ 1023 struct net_device *qcaspi_devs = spi_get_drvdata(spi); 1024 struct qcaspi *qca = netdev_priv(qcaspi_devs); 1025 1026 qcaspi_remove_device_debugfs(qca); 1027 1028 unregister_netdev(qcaspi_devs); 1029 free_netdev(qcaspi_devs); 1030} 1031 1032static const struct spi_device_id qca_spi_id[] = { 1033 { "qca7000", 0 }, 1034 { /* sentinel */ } 1035}; 1036MODULE_DEVICE_TABLE(spi, qca_spi_id); 1037 1038static struct spi_driver qca_spi_driver = { 1039 .driver = { 1040 .name = QCASPI_DRV_NAME, 1041 .of_match_table = qca_spi_of_match, 1042 }, 1043 .id_table = qca_spi_id, 1044 .probe = qca_spi_probe, 1045 .remove = qca_spi_remove, 1046}; 1047module_spi_driver(qca_spi_driver); 1048 1049MODULE_DESCRIPTION("Qualcomm Atheros QCA7000 SPI Driver"); 1050MODULE_AUTHOR("Qualcomm Atheros Communications"); 1051MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>"); 1052MODULE_LICENSE("Dual BSD/GPL"); 1053MODULE_VERSION(QCASPI_DRV_VERSION); 1054