1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2/* QLogic qede NIC Driver 3 * Copyright (c) 2015-2017 QLogic Corporation 4 * Copyright (c) 2019-2020 Marvell International Ltd. 5 */ 6 7#include <linux/types.h> 8#include <linux/netdevice.h> 9#include <linux/etherdevice.h> 10#include <linux/ethtool.h> 11#include <linux/string.h> 12#include <linux/pci.h> 13#include <linux/capability.h> 14#include <linux/vmalloc.h> 15#include <linux/phylink.h> 16 17#include "qede.h" 18#include "qede_ptp.h" 19 20#define QEDE_RQSTAT_OFFSET(stat_name) \ 21 (offsetof(struct qede_rx_queue, stat_name)) 22#define QEDE_RQSTAT_STRING(stat_name) (#stat_name) 23#define QEDE_RQSTAT(stat_name) \ 24 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)} 25 26#define QEDE_SELFTEST_POLL_COUNT 100 27#define QEDE_DUMP_VERSION 0x1 28#define QEDE_DUMP_NVM_ARG_COUNT 2 29 30static const struct { 31 u64 offset; 32 char string[ETH_GSTRING_LEN]; 33} qede_rqstats_arr[] = { 34 QEDE_RQSTAT(rcv_pkts), 35 QEDE_RQSTAT(rx_hw_errors), 36 QEDE_RQSTAT(rx_alloc_errors), 37 QEDE_RQSTAT(rx_ip_frags), 38 QEDE_RQSTAT(xdp_no_pass), 39}; 40 41#define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr) 42#define QEDE_TQSTAT_OFFSET(stat_name) \ 43 (offsetof(struct qede_tx_queue, stat_name)) 44#define QEDE_TQSTAT_STRING(stat_name) (#stat_name) 45#define QEDE_TQSTAT(stat_name) \ 46 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)} 47#define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr) 48static const struct { 49 u64 offset; 50 char string[ETH_GSTRING_LEN]; 51} qede_tqstats_arr[] = { 52 QEDE_TQSTAT(xmit_pkts), 53 QEDE_TQSTAT(stopped_cnt), 54 QEDE_TQSTAT(tx_mem_alloc_err), 55}; 56 57#define QEDE_STAT_OFFSET(stat_name, type, base) \ 58 (offsetof(type, stat_name) + (base)) 59#define QEDE_STAT_STRING(stat_name) (#stat_name) 60#define _QEDE_STAT(stat_name, type, base, attr) \ 61 {QEDE_STAT_OFFSET(stat_name, type, base), \ 62 QEDE_STAT_STRING(stat_name), \ 63 attr} 64#define QEDE_STAT(stat_name) \ 65 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0) 66#define QEDE_PF_STAT(stat_name) \ 67 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \ 68 BIT(QEDE_STAT_PF_ONLY)) 69#define QEDE_PF_BB_STAT(stat_name) \ 70 _QEDE_STAT(stat_name, struct qede_stats_bb, \ 71 offsetof(struct qede_stats, bb), \ 72 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY)) 73#define QEDE_PF_AH_STAT(stat_name) \ 74 _QEDE_STAT(stat_name, struct qede_stats_ah, \ 75 offsetof(struct qede_stats, ah), \ 76 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY)) 77static const struct { 78 u64 offset; 79 char string[ETH_GSTRING_LEN]; 80 unsigned long attr; 81#define QEDE_STAT_PF_ONLY 0 82#define QEDE_STAT_BB_ONLY 1 83#define QEDE_STAT_AH_ONLY 2 84} qede_stats_arr[] = { 85 QEDE_STAT(rx_ucast_bytes), 86 QEDE_STAT(rx_mcast_bytes), 87 QEDE_STAT(rx_bcast_bytes), 88 QEDE_STAT(rx_ucast_pkts), 89 QEDE_STAT(rx_mcast_pkts), 90 QEDE_STAT(rx_bcast_pkts), 91 92 QEDE_STAT(tx_ucast_bytes), 93 QEDE_STAT(tx_mcast_bytes), 94 QEDE_STAT(tx_bcast_bytes), 95 QEDE_STAT(tx_ucast_pkts), 96 QEDE_STAT(tx_mcast_pkts), 97 QEDE_STAT(tx_bcast_pkts), 98 99 QEDE_PF_STAT(rx_64_byte_packets), 100 QEDE_PF_STAT(rx_65_to_127_byte_packets), 101 QEDE_PF_STAT(rx_128_to_255_byte_packets), 102 QEDE_PF_STAT(rx_256_to_511_byte_packets), 103 QEDE_PF_STAT(rx_512_to_1023_byte_packets), 104 QEDE_PF_STAT(rx_1024_to_1518_byte_packets), 105 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets), 106 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets), 107 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets), 108 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets), 109 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets), 110 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets), 111 QEDE_PF_STAT(tx_64_byte_packets), 112 QEDE_PF_STAT(tx_65_to_127_byte_packets), 113 QEDE_PF_STAT(tx_128_to_255_byte_packets), 114 QEDE_PF_STAT(tx_256_to_511_byte_packets), 115 QEDE_PF_STAT(tx_512_to_1023_byte_packets), 116 QEDE_PF_STAT(tx_1024_to_1518_byte_packets), 117 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets), 118 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets), 119 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets), 120 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets), 121 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets), 122 QEDE_PF_STAT(rx_mac_crtl_frames), 123 QEDE_PF_STAT(tx_mac_ctrl_frames), 124 QEDE_PF_STAT(rx_pause_frames), 125 QEDE_PF_STAT(tx_pause_frames), 126 QEDE_PF_STAT(rx_pfc_frames), 127 QEDE_PF_STAT(tx_pfc_frames), 128 129 QEDE_PF_STAT(rx_crc_errors), 130 QEDE_PF_STAT(rx_align_errors), 131 QEDE_PF_STAT(rx_carrier_errors), 132 QEDE_PF_STAT(rx_oversize_packets), 133 QEDE_PF_STAT(rx_jabbers), 134 QEDE_PF_STAT(rx_undersize_packets), 135 QEDE_PF_STAT(rx_fragments), 136 QEDE_PF_BB_STAT(tx_lpi_entry_count), 137 QEDE_PF_BB_STAT(tx_total_collisions), 138 QEDE_PF_STAT(brb_truncates), 139 QEDE_PF_STAT(brb_discards), 140 QEDE_STAT(no_buff_discards), 141 QEDE_PF_STAT(mftag_filter_discards), 142 QEDE_PF_STAT(mac_filter_discards), 143 QEDE_PF_STAT(gft_filter_drop), 144 QEDE_STAT(tx_err_drop_pkts), 145 QEDE_STAT(ttl0_discard), 146 QEDE_STAT(packet_too_big_discard), 147 148 QEDE_STAT(coalesced_pkts), 149 QEDE_STAT(coalesced_events), 150 QEDE_STAT(coalesced_aborts_num), 151 QEDE_STAT(non_coalesced_pkts), 152 QEDE_STAT(coalesced_bytes), 153 154 QEDE_STAT(link_change_count), 155 QEDE_STAT(ptp_skip_txts), 156}; 157 158#define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr) 159#define QEDE_STAT_IS_PF_ONLY(i) \ 160 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr) 161#define QEDE_STAT_IS_BB_ONLY(i) \ 162 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr) 163#define QEDE_STAT_IS_AH_ONLY(i) \ 164 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr) 165 166enum { 167 QEDE_PRI_FLAG_CMT, 168 QEDE_PRI_FLAG_SMART_AN_SUPPORT, /* MFW supports SmartAN */ 169 QEDE_PRI_FLAG_RECOVER_ON_ERROR, 170 QEDE_PRI_FLAG_ESL_SUPPORT, /* MFW supports Enhanced System Lockdown */ 171 QEDE_PRI_FLAG_ESL_ACTIVE, /* Enhanced System Lockdown Active status */ 172 QEDE_PRI_FLAG_LEN, 173}; 174 175static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = { 176 "Coupled-Function", 177 "SmartAN capable", 178 "Recover on error", 179 "ESL capable", 180 "ESL active", 181}; 182 183enum qede_ethtool_tests { 184 QEDE_ETHTOOL_INT_LOOPBACK, 185 QEDE_ETHTOOL_INTERRUPT_TEST, 186 QEDE_ETHTOOL_MEMORY_TEST, 187 QEDE_ETHTOOL_REGISTER_TEST, 188 QEDE_ETHTOOL_CLOCK_TEST, 189 QEDE_ETHTOOL_NVRAM_TEST, 190 QEDE_ETHTOOL_TEST_MAX 191}; 192 193static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = { 194 "Internal loopback (offline)", 195 "Interrupt (online)\t", 196 "Memory (online)\t\t", 197 "Register (online)\t", 198 "Clock (online)\t\t", 199 "Nvram (online)\t\t", 200}; 201 202/* Forced speed capabilities maps */ 203 204struct qede_forced_speed_map { 205 u32 speed; 206 __ETHTOOL_DECLARE_LINK_MODE_MASK(caps); 207 208 const u32 *cap_arr; 209 u32 arr_size; 210}; 211 212#define QEDE_FORCED_SPEED_MAP(value) \ 213{ \ 214 .speed = SPEED_##value, \ 215 .cap_arr = qede_forced_speed_##value, \ 216 .arr_size = ARRAY_SIZE(qede_forced_speed_##value), \ 217} 218 219static const u32 qede_forced_speed_1000[] __initconst = { 220 ETHTOOL_LINK_MODE_1000baseT_Full_BIT, 221 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, 222 ETHTOOL_LINK_MODE_1000baseX_Full_BIT, 223}; 224 225static const u32 qede_forced_speed_10000[] __initconst = { 226 ETHTOOL_LINK_MODE_10000baseT_Full_BIT, 227 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, 228 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, 229 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, 230 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, 231 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, 232 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, 233 ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, 234}; 235 236static const u32 qede_forced_speed_20000[] __initconst = { 237 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT, 238}; 239 240static const u32 qede_forced_speed_25000[] __initconst = { 241 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, 242 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, 243 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, 244}; 245 246static const u32 qede_forced_speed_40000[] __initconst = { 247 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, 248 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, 249 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, 250 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, 251}; 252 253static const u32 qede_forced_speed_50000[] __initconst = { 254 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, 255 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, 256 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, 257}; 258 259static const u32 qede_forced_speed_100000[] __initconst = { 260 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, 261 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, 262 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, 263 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 264}; 265 266static struct qede_forced_speed_map qede_forced_speed_maps[] __ro_after_init = { 267 QEDE_FORCED_SPEED_MAP(1000), 268 QEDE_FORCED_SPEED_MAP(10000), 269 QEDE_FORCED_SPEED_MAP(20000), 270 QEDE_FORCED_SPEED_MAP(25000), 271 QEDE_FORCED_SPEED_MAP(40000), 272 QEDE_FORCED_SPEED_MAP(50000), 273 QEDE_FORCED_SPEED_MAP(100000), 274}; 275 276void __init qede_forced_speed_maps_init(void) 277{ 278 struct qede_forced_speed_map *map; 279 u32 i; 280 281 for (i = 0; i < ARRAY_SIZE(qede_forced_speed_maps); i++) { 282 map = qede_forced_speed_maps + i; 283 284 linkmode_set_bit_array(map->cap_arr, map->arr_size, map->caps); 285 map->cap_arr = NULL; 286 map->arr_size = 0; 287 } 288} 289 290/* Ethtool callbacks */ 291 292static void qede_get_strings_stats_txq(struct qede_dev *edev, 293 struct qede_tx_queue *txq, u8 **buf) 294{ 295 int i; 296 297 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 298 if (txq->is_xdp) 299 sprintf(*buf, "%d [XDP]: %s", 300 QEDE_TXQ_XDP_TO_IDX(edev, txq), 301 qede_tqstats_arr[i].string); 302 else 303 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos, 304 qede_tqstats_arr[i].string); 305 *buf += ETH_GSTRING_LEN; 306 } 307} 308 309static void qede_get_strings_stats_rxq(struct qede_dev *edev, 310 struct qede_rx_queue *rxq, u8 **buf) 311{ 312 int i; 313 314 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 315 sprintf(*buf, "%d: %s", rxq->rxq_id, 316 qede_rqstats_arr[i].string); 317 *buf += ETH_GSTRING_LEN; 318 } 319} 320 321static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index) 322{ 323 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) || 324 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) || 325 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index)); 326} 327 328static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf) 329{ 330 struct qede_fastpath *fp; 331 int i; 332 333 /* Account for queue statistics */ 334 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 335 fp = &edev->fp_array[i]; 336 337 if (fp->type & QEDE_FASTPATH_RX) 338 qede_get_strings_stats_rxq(edev, fp->rxq, &buf); 339 340 if (fp->type & QEDE_FASTPATH_XDP) 341 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf); 342 343 if (fp->type & QEDE_FASTPATH_TX) { 344 int cos; 345 346 for_each_cos_in_txq(edev, cos) 347 qede_get_strings_stats_txq(edev, 348 &fp->txq[cos], &buf); 349 } 350 } 351 352 /* Account for non-queue statistics */ 353 for (i = 0; i < QEDE_NUM_STATS; i++) { 354 if (qede_is_irrelevant_stat(edev, i)) 355 continue; 356 strcpy(buf, qede_stats_arr[i].string); 357 buf += ETH_GSTRING_LEN; 358 } 359} 360 361static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 362{ 363 struct qede_dev *edev = netdev_priv(dev); 364 365 switch (stringset) { 366 case ETH_SS_STATS: 367 qede_get_strings_stats(edev, buf); 368 break; 369 case ETH_SS_PRIV_FLAGS: 370 memcpy(buf, qede_private_arr, 371 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN); 372 break; 373 case ETH_SS_TEST: 374 memcpy(buf, qede_tests_str_arr, 375 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX); 376 break; 377 default: 378 DP_VERBOSE(edev, QED_MSG_DEBUG, 379 "Unsupported stringset 0x%08x\n", stringset); 380 } 381} 382 383static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf) 384{ 385 int i; 386 387 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 388 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset)); 389 (*buf)++; 390 } 391} 392 393static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf) 394{ 395 int i; 396 397 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 398 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset)); 399 (*buf)++; 400 } 401} 402 403static void qede_get_ethtool_stats(struct net_device *dev, 404 struct ethtool_stats *stats, u64 *buf) 405{ 406 struct qede_dev *edev = netdev_priv(dev); 407 struct qede_fastpath *fp; 408 int i; 409 410 qede_fill_by_demand_stats(edev); 411 412 /* Need to protect the access to the fastpath array */ 413 __qede_lock(edev); 414 415 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 416 fp = &edev->fp_array[i]; 417 418 if (fp->type & QEDE_FASTPATH_RX) 419 qede_get_ethtool_stats_rxq(fp->rxq, &buf); 420 421 if (fp->type & QEDE_FASTPATH_XDP) 422 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf); 423 424 if (fp->type & QEDE_FASTPATH_TX) { 425 int cos; 426 427 for_each_cos_in_txq(edev, cos) 428 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf); 429 } 430 } 431 432 spin_lock(&edev->stats_lock); 433 434 for (i = 0; i < QEDE_NUM_STATS; i++) { 435 if (qede_is_irrelevant_stat(edev, i)) 436 continue; 437 *buf = *((u64 *)(((void *)&edev->stats) + 438 qede_stats_arr[i].offset)); 439 440 buf++; 441 } 442 443 spin_unlock(&edev->stats_lock); 444 445 __qede_unlock(edev); 446} 447 448static int qede_get_sset_count(struct net_device *dev, int stringset) 449{ 450 struct qede_dev *edev = netdev_priv(dev); 451 int num_stats = QEDE_NUM_STATS, i; 452 453 switch (stringset) { 454 case ETH_SS_STATS: 455 for (i = 0; i < QEDE_NUM_STATS; i++) 456 if (qede_is_irrelevant_stat(edev, i)) 457 num_stats--; 458 459 /* Account for the Regular Tx statistics */ 460 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS * 461 edev->dev_info.num_tc; 462 463 /* Account for the Regular Rx statistics */ 464 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS; 465 466 /* Account for XDP statistics [if needed] */ 467 if (edev->xdp_prog) 468 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS; 469 return num_stats; 470 471 case ETH_SS_PRIV_FLAGS: 472 return QEDE_PRI_FLAG_LEN; 473 case ETH_SS_TEST: 474 if (!IS_VF(edev)) 475 return QEDE_ETHTOOL_TEST_MAX; 476 else 477 return 0; 478 default: 479 DP_VERBOSE(edev, QED_MSG_DEBUG, 480 "Unsupported stringset 0x%08x\n", stringset); 481 return -EINVAL; 482 } 483} 484 485static u32 qede_get_priv_flags(struct net_device *dev) 486{ 487 struct qede_dev *edev = netdev_priv(dev); 488 bool esl_active; 489 u32 flags = 0; 490 491 if (edev->dev_info.common.num_hwfns > 1) 492 flags |= BIT(QEDE_PRI_FLAG_CMT); 493 494 if (edev->dev_info.common.smart_an) 495 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT); 496 497 if (edev->err_flags & BIT(QEDE_ERR_IS_RECOVERABLE)) 498 flags |= BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR); 499 500 if (edev->dev_info.common.esl) 501 flags |= BIT(QEDE_PRI_FLAG_ESL_SUPPORT); 502 503 edev->ops->common->get_esl_status(edev->cdev, &esl_active); 504 505 if (esl_active) 506 flags |= BIT(QEDE_PRI_FLAG_ESL_ACTIVE); 507 508 return flags; 509} 510 511static int qede_set_priv_flags(struct net_device *dev, u32 flags) 512{ 513 struct qede_dev *edev = netdev_priv(dev); 514 u32 cflags = qede_get_priv_flags(dev); 515 u32 dflags = flags ^ cflags; 516 517 /* can only change RECOVER_ON_ERROR flag */ 518 if (dflags & ~BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR)) 519 return -EINVAL; 520 521 if (flags & BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR)) 522 set_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags); 523 else 524 clear_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags); 525 526 return 0; 527} 528 529static int qede_get_link_ksettings(struct net_device *dev, 530 struct ethtool_link_ksettings *cmd) 531{ 532 typeof(cmd->link_modes) *link_modes = &cmd->link_modes; 533 struct ethtool_link_settings *base = &cmd->base; 534 struct qede_dev *edev = netdev_priv(dev); 535 struct qed_link_output current_link; 536 537 __qede_lock(edev); 538 539 memset(¤t_link, 0, sizeof(current_link)); 540 edev->ops->common->get_link(edev->cdev, ¤t_link); 541 542 linkmode_copy(link_modes->supported, current_link.supported_caps); 543 linkmode_copy(link_modes->advertising, current_link.advertised_caps); 544 linkmode_copy(link_modes->lp_advertising, current_link.lp_caps); 545 546 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) { 547 base->speed = current_link.speed; 548 base->duplex = current_link.duplex; 549 } else { 550 base->speed = SPEED_UNKNOWN; 551 base->duplex = DUPLEX_UNKNOWN; 552 } 553 554 __qede_unlock(edev); 555 556 base->port = current_link.port; 557 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE : 558 AUTONEG_DISABLE; 559 560 return 0; 561} 562 563static int qede_set_link_ksettings(struct net_device *dev, 564 const struct ethtool_link_ksettings *cmd) 565{ 566 const struct ethtool_link_settings *base = &cmd->base; 567 struct qede_dev *edev = netdev_priv(dev); 568 const struct qede_forced_speed_map *map; 569 struct qed_link_output current_link; 570 struct qed_link_params params; 571 u32 i; 572 573 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 574 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 575 return -EOPNOTSUPP; 576 } 577 memset(¤t_link, 0, sizeof(current_link)); 578 memset(¶ms, 0, sizeof(params)); 579 edev->ops->common->get_link(edev->cdev, ¤t_link); 580 581 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS; 582 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG; 583 584 if (base->autoneg == AUTONEG_ENABLE) { 585 if (!phylink_test(current_link.supported_caps, Autoneg)) { 586 DP_INFO(edev, "Auto negotiation is not supported\n"); 587 return -EOPNOTSUPP; 588 } 589 590 params.autoneg = true; 591 params.forced_speed = 0; 592 593 linkmode_copy(params.adv_speeds, cmd->link_modes.advertising); 594 } else { /* forced speed */ 595 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED; 596 params.autoneg = false; 597 params.forced_speed = base->speed; 598 599 for (i = 0; i < ARRAY_SIZE(qede_forced_speed_maps); i++) { 600 map = qede_forced_speed_maps + i; 601 602 if (base->speed != map->speed || 603 !linkmode_intersects(current_link.supported_caps, 604 map->caps)) 605 continue; 606 607 linkmode_and(params.adv_speeds, 608 current_link.supported_caps, map->caps); 609 goto set_link; 610 } 611 612 DP_INFO(edev, "Unsupported speed %u\n", base->speed); 613 return -EINVAL; 614 } 615 616set_link: 617 params.link_up = true; 618 edev->ops->common->set_link(edev->cdev, ¶ms); 619 620 return 0; 621} 622 623static void qede_get_drvinfo(struct net_device *ndev, 624 struct ethtool_drvinfo *info) 625{ 626 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN]; 627 struct qede_dev *edev = netdev_priv(ndev); 628 char mbi[ETHTOOL_FWVERS_LEN]; 629 630 strscpy(info->driver, "qede", sizeof(info->driver)); 631 632 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 633 edev->dev_info.common.fw_major, 634 edev->dev_info.common.fw_minor, 635 edev->dev_info.common.fw_rev, 636 edev->dev_info.common.fw_eng); 637 638 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 639 (edev->dev_info.common.mfw_rev >> 24) & 0xFF, 640 (edev->dev_info.common.mfw_rev >> 16) & 0xFF, 641 (edev->dev_info.common.mfw_rev >> 8) & 0xFF, 642 edev->dev_info.common.mfw_rev & 0xFF); 643 644 if ((strlen(storm) + strlen("[storm]")) < 645 sizeof(info->version)) 646 snprintf(info->version, sizeof(info->version), 647 "[storm %s]", storm); 648 else 649 snprintf(info->version, sizeof(info->version), 650 "%s", storm); 651 652 if (edev->dev_info.common.mbi_version) { 653 snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d", 654 (edev->dev_info.common.mbi_version & 655 QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET, 656 (edev->dev_info.common.mbi_version & 657 QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET, 658 (edev->dev_info.common.mbi_version & 659 QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET); 660 snprintf(info->fw_version, sizeof(info->fw_version), 661 "mbi %s [mfw %s]", mbi, mfw); 662 } else { 663 snprintf(info->fw_version, sizeof(info->fw_version), 664 "mfw %s", mfw); 665 } 666 667 strscpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info)); 668} 669 670static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 671{ 672 struct qede_dev *edev = netdev_priv(ndev); 673 674 if (edev->dev_info.common.wol_support) { 675 wol->supported = WAKE_MAGIC; 676 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0; 677 } 678} 679 680static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 681{ 682 struct qede_dev *edev = netdev_priv(ndev); 683 bool wol_requested; 684 int rc; 685 686 if (wol->wolopts & ~WAKE_MAGIC) { 687 DP_INFO(edev, 688 "Can't support WoL options other than magic-packet\n"); 689 return -EINVAL; 690 } 691 692 wol_requested = !!(wol->wolopts & WAKE_MAGIC); 693 if (wol_requested == edev->wol_enabled) 694 return 0; 695 696 /* Need to actually change configuration */ 697 if (!edev->dev_info.common.wol_support) { 698 DP_INFO(edev, "Device doesn't support WoL\n"); 699 return -EINVAL; 700 } 701 702 rc = edev->ops->common->update_wol(edev->cdev, wol_requested); 703 if (!rc) 704 edev->wol_enabled = wol_requested; 705 706 return rc; 707} 708 709static u32 qede_get_msglevel(struct net_device *ndev) 710{ 711 struct qede_dev *edev = netdev_priv(ndev); 712 713 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module; 714} 715 716static void qede_set_msglevel(struct net_device *ndev, u32 level) 717{ 718 struct qede_dev *edev = netdev_priv(ndev); 719 u32 dp_module = 0; 720 u8 dp_level = 0; 721 722 qede_config_debug(level, &dp_module, &dp_level); 723 724 edev->dp_level = dp_level; 725 edev->dp_module = dp_module; 726 edev->ops->common->update_msglvl(edev->cdev, 727 dp_module, dp_level); 728} 729 730static int qede_nway_reset(struct net_device *dev) 731{ 732 struct qede_dev *edev = netdev_priv(dev); 733 struct qed_link_output current_link; 734 struct qed_link_params link_params; 735 736 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 737 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 738 return -EOPNOTSUPP; 739 } 740 741 if (!netif_running(dev)) 742 return 0; 743 744 memset(¤t_link, 0, sizeof(current_link)); 745 edev->ops->common->get_link(edev->cdev, ¤t_link); 746 if (!current_link.link_up) 747 return 0; 748 749 /* Toggle the link */ 750 memset(&link_params, 0, sizeof(link_params)); 751 link_params.link_up = false; 752 edev->ops->common->set_link(edev->cdev, &link_params); 753 link_params.link_up = true; 754 edev->ops->common->set_link(edev->cdev, &link_params); 755 756 return 0; 757} 758 759static u32 qede_get_link(struct net_device *dev) 760{ 761 struct qede_dev *edev = netdev_priv(dev); 762 struct qed_link_output current_link; 763 764 memset(¤t_link, 0, sizeof(current_link)); 765 edev->ops->common->get_link(edev->cdev, ¤t_link); 766 767 return current_link.link_up; 768} 769 770static int qede_flash_device(struct net_device *dev, 771 struct ethtool_flash *flash) 772{ 773 struct qede_dev *edev = netdev_priv(dev); 774 775 return edev->ops->common->nvm_flash(edev->cdev, flash->data); 776} 777 778static int qede_get_coalesce(struct net_device *dev, 779 struct ethtool_coalesce *coal, 780 struct kernel_ethtool_coalesce *kernel_coal, 781 struct netlink_ext_ack *extack) 782{ 783 void *rx_handle = NULL, *tx_handle = NULL; 784 struct qede_dev *edev = netdev_priv(dev); 785 u16 rx_coal, tx_coal, i, rc = 0; 786 struct qede_fastpath *fp; 787 788 rx_coal = QED_DEFAULT_RX_USECS; 789 tx_coal = QED_DEFAULT_TX_USECS; 790 791 memset(coal, 0, sizeof(struct ethtool_coalesce)); 792 793 __qede_lock(edev); 794 if (edev->state == QEDE_STATE_OPEN) { 795 for_each_queue(i) { 796 fp = &edev->fp_array[i]; 797 798 if (fp->type & QEDE_FASTPATH_RX) { 799 rx_handle = fp->rxq->handle; 800 break; 801 } 802 } 803 804 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle); 805 if (rc) { 806 DP_INFO(edev, "Read Rx coalesce error\n"); 807 goto out; 808 } 809 810 for_each_queue(i) { 811 struct qede_tx_queue *txq; 812 813 fp = &edev->fp_array[i]; 814 815 /* All TX queues of given fastpath uses same 816 * coalescing value, so no need to iterate over 817 * all TCs, TC0 txq should suffice. 818 */ 819 if (fp->type & QEDE_FASTPATH_TX) { 820 txq = QEDE_FP_TC0_TXQ(fp); 821 tx_handle = txq->handle; 822 break; 823 } 824 } 825 826 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle); 827 if (rc) 828 DP_INFO(edev, "Read Tx coalesce error\n"); 829 } 830 831out: 832 __qede_unlock(edev); 833 834 coal->rx_coalesce_usecs = rx_coal; 835 coal->tx_coalesce_usecs = tx_coal; 836 coal->stats_block_coalesce_usecs = edev->stats_coal_usecs; 837 838 return rc; 839} 840 841int qede_set_coalesce(struct net_device *dev, struct ethtool_coalesce *coal, 842 struct kernel_ethtool_coalesce *kernel_coal, 843 struct netlink_ext_ack *extack) 844{ 845 struct qede_dev *edev = netdev_priv(dev); 846 struct qede_fastpath *fp; 847 int i, rc = 0; 848 u16 rxc, txc; 849 850 if (edev->stats_coal_usecs != coal->stats_block_coalesce_usecs) { 851 edev->stats_coal_usecs = coal->stats_block_coalesce_usecs; 852 if (edev->stats_coal_usecs) { 853 edev->stats_coal_ticks = usecs_to_jiffies(edev->stats_coal_usecs); 854 schedule_delayed_work(&edev->periodic_task, 0); 855 856 DP_INFO(edev, "Configured stats coal ticks=%lu jiffies\n", 857 edev->stats_coal_ticks); 858 } else { 859 cancel_delayed_work_sync(&edev->periodic_task); 860 } 861 } 862 863 if (!netif_running(dev)) { 864 DP_INFO(edev, "Interface is down\n"); 865 return -EINVAL; 866 } 867 868 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX || 869 coal->tx_coalesce_usecs > QED_COALESCE_MAX) { 870 DP_INFO(edev, 871 "Can't support requested %s coalesce value [max supported value %d]\n", 872 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" : 873 "tx", QED_COALESCE_MAX); 874 return -EINVAL; 875 } 876 877 rxc = (u16)coal->rx_coalesce_usecs; 878 txc = (u16)coal->tx_coalesce_usecs; 879 for_each_queue(i) { 880 fp = &edev->fp_array[i]; 881 882 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 883 rc = edev->ops->common->set_coalesce(edev->cdev, 884 rxc, 0, 885 fp->rxq->handle); 886 if (rc) { 887 DP_INFO(edev, 888 "Set RX coalesce error, rc = %d\n", rc); 889 return rc; 890 } 891 edev->coal_entry[i].rxc = rxc; 892 edev->coal_entry[i].isvalid = true; 893 } 894 895 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 896 struct qede_tx_queue *txq; 897 898 /* All TX queues of given fastpath uses same 899 * coalescing value, so no need to iterate over 900 * all TCs, TC0 txq should suffice. 901 */ 902 txq = QEDE_FP_TC0_TXQ(fp); 903 904 rc = edev->ops->common->set_coalesce(edev->cdev, 905 0, txc, 906 txq->handle); 907 if (rc) { 908 DP_INFO(edev, 909 "Set TX coalesce error, rc = %d\n", rc); 910 return rc; 911 } 912 edev->coal_entry[i].txc = txc; 913 edev->coal_entry[i].isvalid = true; 914 } 915 } 916 917 return rc; 918} 919 920static void qede_get_ringparam(struct net_device *dev, 921 struct ethtool_ringparam *ering, 922 struct kernel_ethtool_ringparam *kernel_ering, 923 struct netlink_ext_ack *extack) 924{ 925 struct qede_dev *edev = netdev_priv(dev); 926 927 ering->rx_max_pending = NUM_RX_BDS_MAX; 928 ering->rx_pending = edev->q_num_rx_buffers; 929 ering->tx_max_pending = NUM_TX_BDS_MAX; 930 ering->tx_pending = edev->q_num_tx_buffers; 931} 932 933static int qede_set_ringparam(struct net_device *dev, 934 struct ethtool_ringparam *ering, 935 struct kernel_ethtool_ringparam *kernel_ering, 936 struct netlink_ext_ack *extack) 937{ 938 struct qede_dev *edev = netdev_priv(dev); 939 940 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 941 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n", 942 ering->rx_pending, ering->tx_pending); 943 944 /* Validate legality of configuration */ 945 if (ering->rx_pending > NUM_RX_BDS_MAX || 946 ering->rx_pending < NUM_RX_BDS_MIN || 947 ering->tx_pending > NUM_TX_BDS_MAX || 948 ering->tx_pending < NUM_TX_BDS_MIN) { 949 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 950 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n", 951 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX, 952 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX); 953 return -EINVAL; 954 } 955 956 /* Change ring size and re-load */ 957 edev->q_num_rx_buffers = ering->rx_pending; 958 edev->q_num_tx_buffers = ering->tx_pending; 959 960 qede_reload(edev, NULL, false); 961 962 return 0; 963} 964 965static void qede_get_pauseparam(struct net_device *dev, 966 struct ethtool_pauseparam *epause) 967{ 968 struct qede_dev *edev = netdev_priv(dev); 969 struct qed_link_output current_link; 970 971 memset(¤t_link, 0, sizeof(current_link)); 972 edev->ops->common->get_link(edev->cdev, ¤t_link); 973 974 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 975 epause->autoneg = true; 976 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE) 977 epause->rx_pause = true; 978 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE) 979 epause->tx_pause = true; 980 981 DP_VERBOSE(edev, QED_MSG_DEBUG, 982 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n", 983 epause->cmd, epause->autoneg, epause->rx_pause, 984 epause->tx_pause); 985} 986 987static int qede_set_pauseparam(struct net_device *dev, 988 struct ethtool_pauseparam *epause) 989{ 990 struct qede_dev *edev = netdev_priv(dev); 991 struct qed_link_params params; 992 struct qed_link_output current_link; 993 994 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 995 DP_INFO(edev, 996 "Pause settings are not allowed to be changed\n"); 997 return -EOPNOTSUPP; 998 } 999 1000 memset(¤t_link, 0, sizeof(current_link)); 1001 edev->ops->common->get_link(edev->cdev, ¤t_link); 1002 1003 memset(¶ms, 0, sizeof(params)); 1004 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG; 1005 1006 if (epause->autoneg) { 1007 if (!phylink_test(current_link.supported_caps, Autoneg)) { 1008 DP_INFO(edev, "autoneg not supported\n"); 1009 return -EINVAL; 1010 } 1011 1012 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 1013 } 1014 1015 if (epause->rx_pause) 1016 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE; 1017 if (epause->tx_pause) 1018 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE; 1019 1020 params.link_up = true; 1021 edev->ops->common->set_link(edev->cdev, ¶ms); 1022 1023 return 0; 1024} 1025 1026static void qede_get_regs(struct net_device *ndev, 1027 struct ethtool_regs *regs, void *buffer) 1028{ 1029 struct qede_dev *edev = netdev_priv(ndev); 1030 1031 regs->version = 0; 1032 memset(buffer, 0, regs->len); 1033 1034 if (edev->ops && edev->ops->common) 1035 edev->ops->common->dbg_all_data(edev->cdev, buffer); 1036} 1037 1038static int qede_get_regs_len(struct net_device *ndev) 1039{ 1040 struct qede_dev *edev = netdev_priv(ndev); 1041 1042 if (edev->ops && edev->ops->common) 1043 return edev->ops->common->dbg_all_data_size(edev->cdev); 1044 else 1045 return -EINVAL; 1046} 1047 1048static void qede_update_mtu(struct qede_dev *edev, 1049 struct qede_reload_args *args) 1050{ 1051 edev->ndev->mtu = args->u.mtu; 1052} 1053 1054/* Netdevice NDOs */ 1055int qede_change_mtu(struct net_device *ndev, int new_mtu) 1056{ 1057 struct qede_dev *edev = netdev_priv(ndev); 1058 struct qede_reload_args args; 1059 1060 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1061 "Configuring MTU size of %d\n", new_mtu); 1062 1063 if (new_mtu > PAGE_SIZE) 1064 ndev->features &= ~NETIF_F_GRO_HW; 1065 1066 /* Set the mtu field and re-start the interface if needed */ 1067 args.u.mtu = new_mtu; 1068 args.func = &qede_update_mtu; 1069 qede_reload(edev, &args, false); 1070#if IS_ENABLED(CONFIG_QED_RDMA) 1071 qede_rdma_event_change_mtu(edev); 1072#endif 1073 edev->ops->common->update_mtu(edev->cdev, new_mtu); 1074 1075 return 0; 1076} 1077 1078static void qede_get_channels(struct net_device *dev, 1079 struct ethtool_channels *channels) 1080{ 1081 struct qede_dev *edev = netdev_priv(dev); 1082 1083 channels->max_combined = QEDE_MAX_RSS_CNT(edev); 1084 channels->max_rx = QEDE_MAX_RSS_CNT(edev); 1085 channels->max_tx = QEDE_MAX_RSS_CNT(edev); 1086 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx - 1087 edev->fp_num_rx; 1088 channels->tx_count = edev->fp_num_tx; 1089 channels->rx_count = edev->fp_num_rx; 1090} 1091 1092static int qede_set_channels(struct net_device *dev, 1093 struct ethtool_channels *channels) 1094{ 1095 struct qede_dev *edev = netdev_priv(dev); 1096 u32 count; 1097 1098 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1099 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n", 1100 channels->rx_count, channels->tx_count, 1101 channels->other_count, channels->combined_count); 1102 1103 count = channels->rx_count + channels->tx_count + 1104 channels->combined_count; 1105 1106 /* We don't support `other' channels */ 1107 if (channels->other_count) { 1108 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1109 "command parameters not supported\n"); 1110 return -EINVAL; 1111 } 1112 1113 if (!(channels->combined_count || (channels->rx_count && 1114 channels->tx_count))) { 1115 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1116 "need to request at least one transmit and one receive channel\n"); 1117 return -EINVAL; 1118 } 1119 1120 if (count > QEDE_MAX_RSS_CNT(edev)) { 1121 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1122 "requested channels = %d max supported channels = %d\n", 1123 count, QEDE_MAX_RSS_CNT(edev)); 1124 return -EINVAL; 1125 } 1126 1127 /* Check if there was a change in the active parameters */ 1128 if ((count == QEDE_QUEUE_CNT(edev)) && 1129 (channels->tx_count == edev->fp_num_tx) && 1130 (channels->rx_count == edev->fp_num_rx)) { 1131 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1132 "No change in active parameters\n"); 1133 return 0; 1134 } 1135 1136 /* We need the number of queues to be divisible between the hwfns */ 1137 if ((count % edev->dev_info.common.num_hwfns) || 1138 (channels->tx_count % edev->dev_info.common.num_hwfns) || 1139 (channels->rx_count % edev->dev_info.common.num_hwfns)) { 1140 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1141 "Number of channels must be divisible by %04x\n", 1142 edev->dev_info.common.num_hwfns); 1143 return -EINVAL; 1144 } 1145 1146 /* Set number of queues and reload if necessary */ 1147 edev->req_queues = count; 1148 edev->req_num_tx = channels->tx_count; 1149 edev->req_num_rx = channels->rx_count; 1150 /* Reset the indirection table if rx queue count is updated */ 1151 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) { 1152 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED; 1153 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table)); 1154 } 1155 1156 qede_reload(edev, NULL, false); 1157 1158 return 0; 1159} 1160 1161static int qede_get_ts_info(struct net_device *dev, 1162 struct ethtool_ts_info *info) 1163{ 1164 struct qede_dev *edev = netdev_priv(dev); 1165 1166 return qede_ptp_get_ts_info(edev, info); 1167} 1168 1169static int qede_set_phys_id(struct net_device *dev, 1170 enum ethtool_phys_id_state state) 1171{ 1172 struct qede_dev *edev = netdev_priv(dev); 1173 u8 led_state = 0; 1174 1175 switch (state) { 1176 case ETHTOOL_ID_ACTIVE: 1177 return 1; /* cycle on/off once per second */ 1178 1179 case ETHTOOL_ID_ON: 1180 led_state = QED_LED_MODE_ON; 1181 break; 1182 1183 case ETHTOOL_ID_OFF: 1184 led_state = QED_LED_MODE_OFF; 1185 break; 1186 1187 case ETHTOOL_ID_INACTIVE: 1188 led_state = QED_LED_MODE_RESTORE; 1189 break; 1190 } 1191 1192 edev->ops->common->set_led(edev->cdev, led_state); 1193 1194 return 0; 1195} 1196 1197static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1198{ 1199 info->data = RXH_IP_SRC | RXH_IP_DST; 1200 1201 switch (info->flow_type) { 1202 case TCP_V4_FLOW: 1203 case TCP_V6_FLOW: 1204 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1205 break; 1206 case UDP_V4_FLOW: 1207 if (edev->rss_caps & QED_RSS_IPV4_UDP) 1208 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1209 break; 1210 case UDP_V6_FLOW: 1211 if (edev->rss_caps & QED_RSS_IPV6_UDP) 1212 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1213 break; 1214 case IPV4_FLOW: 1215 case IPV6_FLOW: 1216 break; 1217 default: 1218 info->data = 0; 1219 break; 1220 } 1221 1222 return 0; 1223} 1224 1225static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1226 u32 *rule_locs) 1227{ 1228 struct qede_dev *edev = netdev_priv(dev); 1229 int rc = 0; 1230 1231 switch (info->cmd) { 1232 case ETHTOOL_GRXRINGS: 1233 info->data = QEDE_RSS_COUNT(edev); 1234 break; 1235 case ETHTOOL_GRXFH: 1236 rc = qede_get_rss_flags(edev, info); 1237 break; 1238 case ETHTOOL_GRXCLSRLCNT: 1239 info->rule_cnt = qede_get_arfs_filter_count(edev); 1240 info->data = QEDE_RFS_MAX_FLTR; 1241 break; 1242 case ETHTOOL_GRXCLSRULE: 1243 rc = qede_get_cls_rule_entry(edev, info); 1244 break; 1245 case ETHTOOL_GRXCLSRLALL: 1246 rc = qede_get_cls_rule_all(edev, info, rule_locs); 1247 break; 1248 default: 1249 DP_ERR(edev, "Command parameters not supported\n"); 1250 rc = -EOPNOTSUPP; 1251 } 1252 1253 return rc; 1254} 1255 1256static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1257{ 1258 struct qed_update_vport_params *vport_update_params; 1259 u8 set_caps = 0, clr_caps = 0; 1260 int rc = 0; 1261 1262 DP_VERBOSE(edev, QED_MSG_DEBUG, 1263 "Set rss flags command parameters: flow type = %d, data = %llu\n", 1264 info->flow_type, info->data); 1265 1266 switch (info->flow_type) { 1267 case TCP_V4_FLOW: 1268 case TCP_V6_FLOW: 1269 /* For TCP only 4-tuple hash is supported */ 1270 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST | 1271 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1272 DP_INFO(edev, "Command parameters not supported\n"); 1273 return -EINVAL; 1274 } 1275 return 0; 1276 case UDP_V4_FLOW: 1277 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1278 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1279 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1280 set_caps = QED_RSS_IPV4_UDP; 1281 DP_VERBOSE(edev, QED_MSG_DEBUG, 1282 "UDP 4-tuple enabled\n"); 1283 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1284 clr_caps = QED_RSS_IPV4_UDP; 1285 DP_VERBOSE(edev, QED_MSG_DEBUG, 1286 "UDP 4-tuple disabled\n"); 1287 } else { 1288 return -EINVAL; 1289 } 1290 break; 1291 case UDP_V6_FLOW: 1292 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1293 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1294 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1295 set_caps = QED_RSS_IPV6_UDP; 1296 DP_VERBOSE(edev, QED_MSG_DEBUG, 1297 "UDP 4-tuple enabled\n"); 1298 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1299 clr_caps = QED_RSS_IPV6_UDP; 1300 DP_VERBOSE(edev, QED_MSG_DEBUG, 1301 "UDP 4-tuple disabled\n"); 1302 } else { 1303 return -EINVAL; 1304 } 1305 break; 1306 case IPV4_FLOW: 1307 case IPV6_FLOW: 1308 /* For IP only 2-tuple hash is supported */ 1309 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) { 1310 DP_INFO(edev, "Command parameters not supported\n"); 1311 return -EINVAL; 1312 } 1313 return 0; 1314 case SCTP_V4_FLOW: 1315 case AH_ESP_V4_FLOW: 1316 case AH_V4_FLOW: 1317 case ESP_V4_FLOW: 1318 case SCTP_V6_FLOW: 1319 case AH_ESP_V6_FLOW: 1320 case AH_V6_FLOW: 1321 case ESP_V6_FLOW: 1322 case IP_USER_FLOW: 1323 case ETHER_FLOW: 1324 /* RSS is not supported for these protocols */ 1325 if (info->data) { 1326 DP_INFO(edev, "Command parameters not supported\n"); 1327 return -EINVAL; 1328 } 1329 return 0; 1330 default: 1331 return -EINVAL; 1332 } 1333 1334 /* No action is needed if there is no change in the rss capability */ 1335 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps)) 1336 return 0; 1337 1338 /* Update internal configuration */ 1339 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps); 1340 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 1341 1342 /* Re-configure if possible */ 1343 __qede_lock(edev); 1344 if (edev->state == QEDE_STATE_OPEN) { 1345 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1346 if (!vport_update_params) { 1347 __qede_unlock(edev); 1348 return -ENOMEM; 1349 } 1350 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1351 &vport_update_params->update_rss_flg); 1352 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1353 vfree(vport_update_params); 1354 } 1355 __qede_unlock(edev); 1356 1357 return rc; 1358} 1359 1360static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info) 1361{ 1362 struct qede_dev *edev = netdev_priv(dev); 1363 int rc; 1364 1365 switch (info->cmd) { 1366 case ETHTOOL_SRXFH: 1367 rc = qede_set_rss_flags(edev, info); 1368 break; 1369 case ETHTOOL_SRXCLSRLINS: 1370 rc = qede_add_cls_rule(edev, info); 1371 break; 1372 case ETHTOOL_SRXCLSRLDEL: 1373 rc = qede_delete_flow_filter(edev, info->fs.location); 1374 break; 1375 default: 1376 DP_INFO(edev, "Command parameters not supported\n"); 1377 rc = -EOPNOTSUPP; 1378 } 1379 1380 return rc; 1381} 1382 1383static u32 qede_get_rxfh_indir_size(struct net_device *dev) 1384{ 1385 return QED_RSS_IND_TABLE_SIZE; 1386} 1387 1388static u32 qede_get_rxfh_key_size(struct net_device *dev) 1389{ 1390 struct qede_dev *edev = netdev_priv(dev); 1391 1392 return sizeof(edev->rss_key); 1393} 1394 1395static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc) 1396{ 1397 struct qede_dev *edev = netdev_priv(dev); 1398 int i; 1399 1400 if (hfunc) 1401 *hfunc = ETH_RSS_HASH_TOP; 1402 1403 if (!indir) 1404 return 0; 1405 1406 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1407 indir[i] = edev->rss_ind_table[i]; 1408 1409 if (key) 1410 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev)); 1411 1412 return 0; 1413} 1414 1415static int qede_set_rxfh(struct net_device *dev, const u32 *indir, 1416 const u8 *key, const u8 hfunc) 1417{ 1418 struct qed_update_vport_params *vport_update_params; 1419 struct qede_dev *edev = netdev_priv(dev); 1420 int i, rc = 0; 1421 1422 if (edev->dev_info.common.num_hwfns > 1) { 1423 DP_INFO(edev, 1424 "RSS configuration is not supported for 100G devices\n"); 1425 return -EOPNOTSUPP; 1426 } 1427 1428 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 1429 return -EOPNOTSUPP; 1430 1431 if (!indir && !key) 1432 return 0; 1433 1434 if (indir) { 1435 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1436 edev->rss_ind_table[i] = indir[i]; 1437 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 1438 } 1439 1440 if (key) { 1441 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev)); 1442 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 1443 } 1444 1445 __qede_lock(edev); 1446 if (edev->state == QEDE_STATE_OPEN) { 1447 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1448 if (!vport_update_params) { 1449 __qede_unlock(edev); 1450 return -ENOMEM; 1451 } 1452 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1453 &vport_update_params->update_rss_flg); 1454 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1455 vfree(vport_update_params); 1456 } 1457 __qede_unlock(edev); 1458 1459 return rc; 1460} 1461 1462/* This function enables the interrupt generation and the NAPI on the device */ 1463static void qede_netif_start(struct qede_dev *edev) 1464{ 1465 int i; 1466 1467 if (!netif_running(edev->ndev)) 1468 return; 1469 1470 for_each_queue(i) { 1471 /* Update and reenable interrupts */ 1472 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1); 1473 napi_enable(&edev->fp_array[i].napi); 1474 } 1475} 1476 1477/* This function disables the NAPI and the interrupt generation on the device */ 1478static void qede_netif_stop(struct qede_dev *edev) 1479{ 1480 int i; 1481 1482 for_each_queue(i) { 1483 napi_disable(&edev->fp_array[i].napi); 1484 /* Disable interrupts */ 1485 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0); 1486 } 1487} 1488 1489static int qede_selftest_transmit_traffic(struct qede_dev *edev, 1490 struct sk_buff *skb) 1491{ 1492 struct qede_tx_queue *txq = NULL; 1493 struct eth_tx_1st_bd *first_bd; 1494 dma_addr_t mapping; 1495 int i, idx; 1496 u16 val; 1497 1498 for_each_queue(i) { 1499 struct qede_fastpath *fp = &edev->fp_array[i]; 1500 1501 if (fp->type & QEDE_FASTPATH_TX) { 1502 txq = QEDE_FP_TC0_TXQ(fp); 1503 break; 1504 } 1505 } 1506 1507 if (!txq) { 1508 DP_NOTICE(edev, "Tx path is not available\n"); 1509 return -1; 1510 } 1511 1512 /* Fill the entry in the SW ring and the BDs in the FW ring */ 1513 idx = txq->sw_tx_prod; 1514 txq->sw_tx_ring.skbs[idx].skb = skb; 1515 first_bd = qed_chain_produce(&txq->tx_pbl); 1516 memset(first_bd, 0, sizeof(*first_bd)); 1517 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 1518 first_bd->data.bd_flags.bitfields = val; 1519 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK; 1520 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 1521 first_bd->data.bitfields |= cpu_to_le16(val); 1522 1523 /* Map skb linear data for DMA and set in the first BD */ 1524 mapping = dma_map_single(&edev->pdev->dev, skb->data, 1525 skb_headlen(skb), DMA_TO_DEVICE); 1526 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 1527 DP_NOTICE(edev, "SKB mapping failed\n"); 1528 return -ENOMEM; 1529 } 1530 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 1531 1532 /* update the first BD with the actual num BDs */ 1533 first_bd->data.nbds = 1; 1534 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers; 1535 /* 'next page' entries are counted in the producer value */ 1536 val = qed_chain_get_prod_idx(&txq->tx_pbl); 1537 txq->tx_db.data.bd_prod = cpu_to_le16(val); 1538 1539 /* wmb makes sure that the BDs data is updated before updating the 1540 * producer, otherwise FW may read old data from the BDs. 1541 */ 1542 wmb(); 1543 barrier(); 1544 writel(txq->tx_db.raw, txq->doorbell_addr); 1545 1546 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) { 1547 if (qede_txq_has_work(txq)) 1548 break; 1549 usleep_range(100, 200); 1550 } 1551 1552 if (!qede_txq_has_work(txq)) { 1553 DP_NOTICE(edev, "Tx completion didn't happen\n"); 1554 return -1; 1555 } 1556 1557 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 1558 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 1559 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE); 1560 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers; 1561 txq->sw_tx_ring.skbs[idx].skb = NULL; 1562 1563 return 0; 1564} 1565 1566static int qede_selftest_receive_traffic(struct qede_dev *edev) 1567{ 1568 u16 sw_rx_index, len; 1569 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1570 struct qede_rx_queue *rxq = NULL; 1571 struct sw_rx_data *sw_rx_data; 1572 union eth_rx_cqe *cqe; 1573 int i, iter, rc = 0; 1574 u8 *data_ptr; 1575 1576 for_each_queue(i) { 1577 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 1578 rxq = edev->fp_array[i].rxq; 1579 break; 1580 } 1581 } 1582 1583 if (!rxq) { 1584 DP_NOTICE(edev, "Rx path is not available\n"); 1585 return -1; 1586 } 1587 1588 /* The packet is expected to receive on rx-queue 0 even though RSS is 1589 * enabled. This is because the queue 0 is configured as the default 1590 * queue and that the loopback traffic is not IP. 1591 */ 1592 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) { 1593 if (!qede_has_rx_work(rxq)) { 1594 usleep_range(100, 200); 1595 continue; 1596 } 1597 1598 /* Get the CQE from the completion ring */ 1599 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring); 1600 1601 /* Get the data from the SW ring */ 1602 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1603 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1604 fp_cqe = &cqe->fast_path_regular; 1605 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1606 data_ptr = (u8 *)(page_address(sw_rx_data->data) + 1607 fp_cqe->placement_offset + 1608 sw_rx_data->page_offset + 1609 rxq->rx_headroom); 1610 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) && 1611 ether_addr_equal(data_ptr + ETH_ALEN, 1612 edev->ndev->dev_addr)) { 1613 for (i = ETH_HLEN; i < len; i++) 1614 if (data_ptr[i] != (unsigned char)(i & 0xff)) { 1615 rc = -1; 1616 break; 1617 } 1618 1619 qede_recycle_rx_bd_ring(rxq, 1); 1620 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1621 break; 1622 } 1623 1624 DP_INFO(edev, "Not the transmitted packet\n"); 1625 qede_recycle_rx_bd_ring(rxq, 1); 1626 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1627 } 1628 1629 if (iter == QEDE_SELFTEST_POLL_COUNT) { 1630 DP_NOTICE(edev, "Failed to receive the traffic\n"); 1631 return -1; 1632 } 1633 1634 qede_update_rx_prod(edev, rxq); 1635 1636 return rc; 1637} 1638 1639static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode) 1640{ 1641 struct qed_link_params link_params; 1642 struct sk_buff *skb = NULL; 1643 int rc = 0, i; 1644 u32 pkt_size; 1645 u8 *packet; 1646 1647 if (!netif_running(edev->ndev)) { 1648 DP_NOTICE(edev, "Interface is down\n"); 1649 return -EINVAL; 1650 } 1651 1652 qede_netif_stop(edev); 1653 1654 /* Bring up the link in Loopback mode */ 1655 memset(&link_params, 0, sizeof(link_params)); 1656 link_params.link_up = true; 1657 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1658 link_params.loopback_mode = loopback_mode; 1659 edev->ops->common->set_link(edev->cdev, &link_params); 1660 1661 /* Wait for loopback configuration to apply */ 1662 msleep_interruptible(500); 1663 1664 /* Setting max packet size to 1.5K to avoid data being split over 1665 * multiple BDs in cases where MTU > PAGE_SIZE. 1666 */ 1667 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ? 1668 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN); 1669 1670 skb = netdev_alloc_skb(edev->ndev, pkt_size); 1671 if (!skb) { 1672 DP_INFO(edev, "Can't allocate skb\n"); 1673 rc = -ENOMEM; 1674 goto test_loopback_exit; 1675 } 1676 packet = skb_put(skb, pkt_size); 1677 ether_addr_copy(packet, edev->ndev->dev_addr); 1678 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr); 1679 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN))); 1680 for (i = ETH_HLEN; i < pkt_size; i++) 1681 packet[i] = (unsigned char)(i & 0xff); 1682 1683 rc = qede_selftest_transmit_traffic(edev, skb); 1684 if (rc) 1685 goto test_loopback_exit; 1686 1687 rc = qede_selftest_receive_traffic(edev); 1688 if (rc) 1689 goto test_loopback_exit; 1690 1691 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n"); 1692 1693test_loopback_exit: 1694 dev_kfree_skb(skb); 1695 1696 /* Bring up the link in Normal mode */ 1697 memset(&link_params, 0, sizeof(link_params)); 1698 link_params.link_up = true; 1699 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1700 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE; 1701 edev->ops->common->set_link(edev->cdev, &link_params); 1702 1703 /* Wait for loopback configuration to apply */ 1704 msleep_interruptible(500); 1705 1706 qede_netif_start(edev); 1707 1708 return rc; 1709} 1710 1711static void qede_self_test(struct net_device *dev, 1712 struct ethtool_test *etest, u64 *buf) 1713{ 1714 struct qede_dev *edev = netdev_priv(dev); 1715 1716 DP_VERBOSE(edev, QED_MSG_DEBUG, 1717 "Self-test command parameters: offline = %d, external_lb = %d\n", 1718 (etest->flags & ETH_TEST_FL_OFFLINE), 1719 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2); 1720 1721 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX); 1722 1723 if (etest->flags & ETH_TEST_FL_OFFLINE) { 1724 if (qede_selftest_run_loopback(edev, 1725 QED_LINK_LOOPBACK_INT_PHY)) { 1726 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1; 1727 etest->flags |= ETH_TEST_FL_FAILED; 1728 } 1729 } 1730 1731 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) { 1732 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1; 1733 etest->flags |= ETH_TEST_FL_FAILED; 1734 } 1735 1736 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) { 1737 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1; 1738 etest->flags |= ETH_TEST_FL_FAILED; 1739 } 1740 1741 if (edev->ops->common->selftest->selftest_register(edev->cdev)) { 1742 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1; 1743 etest->flags |= ETH_TEST_FL_FAILED; 1744 } 1745 1746 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) { 1747 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1; 1748 etest->flags |= ETH_TEST_FL_FAILED; 1749 } 1750 1751 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) { 1752 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1; 1753 etest->flags |= ETH_TEST_FL_FAILED; 1754 } 1755} 1756 1757static int qede_set_tunable(struct net_device *dev, 1758 const struct ethtool_tunable *tuna, 1759 const void *data) 1760{ 1761 struct qede_dev *edev = netdev_priv(dev); 1762 u32 val; 1763 1764 switch (tuna->id) { 1765 case ETHTOOL_RX_COPYBREAK: 1766 val = *(u32 *)data; 1767 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) { 1768 DP_VERBOSE(edev, QED_MSG_DEBUG, 1769 "Invalid rx copy break value, range is [%u, %u]", 1770 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE); 1771 return -EINVAL; 1772 } 1773 1774 edev->rx_copybreak = *(u32 *)data; 1775 break; 1776 default: 1777 return -EOPNOTSUPP; 1778 } 1779 1780 return 0; 1781} 1782 1783static int qede_get_tunable(struct net_device *dev, 1784 const struct ethtool_tunable *tuna, void *data) 1785{ 1786 struct qede_dev *edev = netdev_priv(dev); 1787 1788 switch (tuna->id) { 1789 case ETHTOOL_RX_COPYBREAK: 1790 *(u32 *)data = edev->rx_copybreak; 1791 break; 1792 default: 1793 return -EOPNOTSUPP; 1794 } 1795 1796 return 0; 1797} 1798 1799static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata) 1800{ 1801 struct qede_dev *edev = netdev_priv(dev); 1802 struct qed_link_output current_link; 1803 1804 memset(¤t_link, 0, sizeof(current_link)); 1805 edev->ops->common->get_link(edev->cdev, ¤t_link); 1806 1807 if (!current_link.eee_supported) { 1808 DP_INFO(edev, "EEE is not supported\n"); 1809 return -EOPNOTSUPP; 1810 } 1811 1812 if (current_link.eee.adv_caps & QED_EEE_1G_ADV) 1813 edata->advertised = ADVERTISED_1000baseT_Full; 1814 if (current_link.eee.adv_caps & QED_EEE_10G_ADV) 1815 edata->advertised |= ADVERTISED_10000baseT_Full; 1816 if (current_link.sup_caps & QED_EEE_1G_ADV) 1817 edata->supported = ADVERTISED_1000baseT_Full; 1818 if (current_link.sup_caps & QED_EEE_10G_ADV) 1819 edata->supported |= ADVERTISED_10000baseT_Full; 1820 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV) 1821 edata->lp_advertised = ADVERTISED_1000baseT_Full; 1822 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV) 1823 edata->lp_advertised |= ADVERTISED_10000baseT_Full; 1824 1825 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer; 1826 edata->eee_enabled = current_link.eee.enable; 1827 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable; 1828 edata->eee_active = current_link.eee_active; 1829 1830 return 0; 1831} 1832 1833static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata) 1834{ 1835 struct qede_dev *edev = netdev_priv(dev); 1836 struct qed_link_output current_link; 1837 struct qed_link_params params; 1838 1839 if (!edev->ops->common->can_link_change(edev->cdev)) { 1840 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 1841 return -EOPNOTSUPP; 1842 } 1843 1844 memset(¤t_link, 0, sizeof(current_link)); 1845 edev->ops->common->get_link(edev->cdev, ¤t_link); 1846 1847 if (!current_link.eee_supported) { 1848 DP_INFO(edev, "EEE is not supported\n"); 1849 return -EOPNOTSUPP; 1850 } 1851 1852 memset(¶ms, 0, sizeof(params)); 1853 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG; 1854 1855 if (!(edata->advertised & (ADVERTISED_1000baseT_Full | 1856 ADVERTISED_10000baseT_Full)) || 1857 ((edata->advertised & (ADVERTISED_1000baseT_Full | 1858 ADVERTISED_10000baseT_Full)) != 1859 edata->advertised)) { 1860 DP_VERBOSE(edev, QED_MSG_DEBUG, 1861 "Invalid advertised capabilities %d\n", 1862 edata->advertised); 1863 return -EINVAL; 1864 } 1865 1866 if (edata->advertised & ADVERTISED_1000baseT_Full) 1867 params.eee.adv_caps = QED_EEE_1G_ADV; 1868 if (edata->advertised & ADVERTISED_10000baseT_Full) 1869 params.eee.adv_caps |= QED_EEE_10G_ADV; 1870 params.eee.enable = edata->eee_enabled; 1871 params.eee.tx_lpi_enable = edata->tx_lpi_enabled; 1872 params.eee.tx_lpi_timer = edata->tx_lpi_timer; 1873 1874 params.link_up = true; 1875 edev->ops->common->set_link(edev->cdev, ¶ms); 1876 1877 return 0; 1878} 1879 1880static u32 qede_link_to_ethtool_fec(u32 link_fec) 1881{ 1882 u32 eth_fec = 0; 1883 1884 if (link_fec & QED_FEC_MODE_NONE) 1885 eth_fec |= ETHTOOL_FEC_OFF; 1886 if (link_fec & QED_FEC_MODE_FIRECODE) 1887 eth_fec |= ETHTOOL_FEC_BASER; 1888 if (link_fec & QED_FEC_MODE_RS) 1889 eth_fec |= ETHTOOL_FEC_RS; 1890 if (link_fec & QED_FEC_MODE_AUTO) 1891 eth_fec |= ETHTOOL_FEC_AUTO; 1892 if (link_fec & QED_FEC_MODE_UNSUPPORTED) 1893 eth_fec |= ETHTOOL_FEC_NONE; 1894 1895 return eth_fec; 1896} 1897 1898static u32 qede_ethtool_to_link_fec(u32 eth_fec) 1899{ 1900 u32 link_fec = 0; 1901 1902 if (eth_fec & ETHTOOL_FEC_OFF) 1903 link_fec |= QED_FEC_MODE_NONE; 1904 if (eth_fec & ETHTOOL_FEC_BASER) 1905 link_fec |= QED_FEC_MODE_FIRECODE; 1906 if (eth_fec & ETHTOOL_FEC_RS) 1907 link_fec |= QED_FEC_MODE_RS; 1908 if (eth_fec & ETHTOOL_FEC_AUTO) 1909 link_fec |= QED_FEC_MODE_AUTO; 1910 if (eth_fec & ETHTOOL_FEC_NONE) 1911 link_fec |= QED_FEC_MODE_UNSUPPORTED; 1912 1913 return link_fec; 1914} 1915 1916static int qede_get_fecparam(struct net_device *dev, 1917 struct ethtool_fecparam *fecparam) 1918{ 1919 struct qede_dev *edev = netdev_priv(dev); 1920 struct qed_link_output curr_link; 1921 1922 memset(&curr_link, 0, sizeof(curr_link)); 1923 edev->ops->common->get_link(edev->cdev, &curr_link); 1924 1925 fecparam->active_fec = qede_link_to_ethtool_fec(curr_link.active_fec); 1926 fecparam->fec = qede_link_to_ethtool_fec(curr_link.sup_fec); 1927 1928 return 0; 1929} 1930 1931static int qede_set_fecparam(struct net_device *dev, 1932 struct ethtool_fecparam *fecparam) 1933{ 1934 struct qede_dev *edev = netdev_priv(dev); 1935 struct qed_link_params params; 1936 1937 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 1938 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 1939 return -EOPNOTSUPP; 1940 } 1941 1942 memset(¶ms, 0, sizeof(params)); 1943 params.override_flags |= QED_LINK_OVERRIDE_FEC_CONFIG; 1944 params.fec = qede_ethtool_to_link_fec(fecparam->fec); 1945 params.link_up = true; 1946 1947 edev->ops->common->set_link(edev->cdev, ¶ms); 1948 1949 return 0; 1950} 1951 1952static int qede_get_module_info(struct net_device *dev, 1953 struct ethtool_modinfo *modinfo) 1954{ 1955 struct qede_dev *edev = netdev_priv(dev); 1956 u8 buf[4]; 1957 int rc; 1958 1959 /* Read first 4 bytes to find the sfp type */ 1960 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1961 QED_I2C_DEV_ADDR_A0, 0, 4); 1962 if (rc) { 1963 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc); 1964 return rc; 1965 } 1966 1967 switch (buf[0]) { 1968 case 0x3: /* SFP, SFP+, SFP-28 */ 1969 modinfo->type = ETH_MODULE_SFF_8472; 1970 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1971 break; 1972 case 0xc: /* QSFP */ 1973 case 0xd: /* QSFP+ */ 1974 modinfo->type = ETH_MODULE_SFF_8436; 1975 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1976 break; 1977 case 0x11: /* QSFP-28 */ 1978 modinfo->type = ETH_MODULE_SFF_8636; 1979 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1980 break; 1981 default: 1982 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]); 1983 return -EINVAL; 1984 } 1985 1986 return 0; 1987} 1988 1989static int qede_get_module_eeprom(struct net_device *dev, 1990 struct ethtool_eeprom *ee, u8 *data) 1991{ 1992 struct qede_dev *edev = netdev_priv(dev); 1993 u32 start_addr = ee->offset, size = 0; 1994 u8 *buf = data; 1995 int rc = 0; 1996 1997 /* Read A0 section */ 1998 if (ee->offset < ETH_MODULE_SFF_8079_LEN) { 1999 /* Limit transfer size to the A0 section boundary */ 2000 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN) 2001 size = ETH_MODULE_SFF_8079_LEN - ee->offset; 2002 else 2003 size = ee->len; 2004 2005 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 2006 QED_I2C_DEV_ADDR_A0, 2007 start_addr, size); 2008 if (rc) { 2009 DP_ERR(edev, "Failed reading A0 section %d\n", rc); 2010 return rc; 2011 } 2012 2013 buf += size; 2014 start_addr += size; 2015 } 2016 2017 /* Read A2 section */ 2018 if (start_addr >= ETH_MODULE_SFF_8079_LEN && 2019 start_addr < ETH_MODULE_SFF_8472_LEN) { 2020 size = ee->len - size; 2021 /* Limit transfer size to the A2 section boundary */ 2022 if (start_addr + size > ETH_MODULE_SFF_8472_LEN) 2023 size = ETH_MODULE_SFF_8472_LEN - start_addr; 2024 start_addr -= ETH_MODULE_SFF_8079_LEN; 2025 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 2026 QED_I2C_DEV_ADDR_A2, 2027 start_addr, size); 2028 if (rc) { 2029 DP_VERBOSE(edev, QED_MSG_DEBUG, 2030 "Failed reading A2 section %d\n", rc); 2031 return 0; 2032 } 2033 } 2034 2035 return rc; 2036} 2037 2038static int qede_set_dump(struct net_device *dev, struct ethtool_dump *val) 2039{ 2040 struct qede_dev *edev = netdev_priv(dev); 2041 int rc = 0; 2042 2043 if (edev->dump_info.cmd == QEDE_DUMP_CMD_NONE) { 2044 if (val->flag > QEDE_DUMP_CMD_MAX) { 2045 DP_ERR(edev, "Invalid command %d\n", val->flag); 2046 return -EINVAL; 2047 } 2048 edev->dump_info.cmd = val->flag; 2049 edev->dump_info.num_args = 0; 2050 return 0; 2051 } 2052 2053 if (edev->dump_info.num_args == QEDE_DUMP_MAX_ARGS) { 2054 DP_ERR(edev, "Arg count = %d\n", edev->dump_info.num_args); 2055 return -EINVAL; 2056 } 2057 2058 switch (edev->dump_info.cmd) { 2059 case QEDE_DUMP_CMD_NVM_CFG: 2060 edev->dump_info.args[edev->dump_info.num_args] = val->flag; 2061 edev->dump_info.num_args++; 2062 break; 2063 case QEDE_DUMP_CMD_GRCDUMP: 2064 rc = edev->ops->common->set_grc_config(edev->cdev, 2065 val->flag, 1); 2066 break; 2067 default: 2068 break; 2069 } 2070 2071 return rc; 2072} 2073 2074static int qede_get_dump_flag(struct net_device *dev, 2075 struct ethtool_dump *dump) 2076{ 2077 struct qede_dev *edev = netdev_priv(dev); 2078 2079 if (!edev->ops || !edev->ops->common) { 2080 DP_ERR(edev, "Edev ops not populated\n"); 2081 return -EINVAL; 2082 } 2083 2084 dump->version = QEDE_DUMP_VERSION; 2085 switch (edev->dump_info.cmd) { 2086 case QEDE_DUMP_CMD_NVM_CFG: 2087 dump->flag = QEDE_DUMP_CMD_NVM_CFG; 2088 dump->len = edev->ops->common->read_nvm_cfg_len(edev->cdev, 2089 edev->dump_info.args[0]); 2090 break; 2091 case QEDE_DUMP_CMD_GRCDUMP: 2092 dump->flag = QEDE_DUMP_CMD_GRCDUMP; 2093 dump->len = edev->ops->common->dbg_all_data_size(edev->cdev); 2094 break; 2095 default: 2096 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd); 2097 return -EINVAL; 2098 } 2099 2100 DP_VERBOSE(edev, QED_MSG_DEBUG, 2101 "dump->version = 0x%x dump->flag = %d dump->len = %d\n", 2102 dump->version, dump->flag, dump->len); 2103 return 0; 2104} 2105 2106static int qede_get_dump_data(struct net_device *dev, 2107 struct ethtool_dump *dump, void *buf) 2108{ 2109 struct qede_dev *edev = netdev_priv(dev); 2110 int rc = 0; 2111 2112 if (!edev->ops || !edev->ops->common) { 2113 DP_ERR(edev, "Edev ops not populated\n"); 2114 rc = -EINVAL; 2115 goto err; 2116 } 2117 2118 switch (edev->dump_info.cmd) { 2119 case QEDE_DUMP_CMD_NVM_CFG: 2120 if (edev->dump_info.num_args != QEDE_DUMP_NVM_ARG_COUNT) { 2121 DP_ERR(edev, "Arg count = %d required = %d\n", 2122 edev->dump_info.num_args, 2123 QEDE_DUMP_NVM_ARG_COUNT); 2124 rc = -EINVAL; 2125 goto err; 2126 } 2127 rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf, 2128 edev->dump_info.args[0], 2129 edev->dump_info.args[1]); 2130 break; 2131 case QEDE_DUMP_CMD_GRCDUMP: 2132 memset(buf, 0, dump->len); 2133 rc = edev->ops->common->dbg_all_data(edev->cdev, buf); 2134 break; 2135 default: 2136 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd); 2137 rc = -EINVAL; 2138 break; 2139 } 2140 2141err: 2142 edev->dump_info.cmd = QEDE_DUMP_CMD_NONE; 2143 edev->dump_info.num_args = 0; 2144 memset(edev->dump_info.args, 0, sizeof(edev->dump_info.args)); 2145 2146 return rc; 2147} 2148 2149int qede_set_per_coalesce(struct net_device *dev, u32 queue, 2150 struct ethtool_coalesce *coal) 2151{ 2152 struct qede_dev *edev = netdev_priv(dev); 2153 struct qede_fastpath *fp; 2154 u16 rxc, txc; 2155 int rc = 0; 2156 2157 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX || 2158 coal->tx_coalesce_usecs > QED_COALESCE_MAX) { 2159 DP_INFO(edev, 2160 "Can't support requested %s coalesce value [max supported value %d]\n", 2161 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" 2162 : "tx", 2163 QED_COALESCE_MAX); 2164 return -EINVAL; 2165 } 2166 2167 rxc = (u16)coal->rx_coalesce_usecs; 2168 txc = (u16)coal->tx_coalesce_usecs; 2169 2170 __qede_lock(edev); 2171 if (queue >= edev->num_queues) { 2172 DP_INFO(edev, "Invalid queue\n"); 2173 rc = -EINVAL; 2174 goto out; 2175 } 2176 2177 if (edev->state != QEDE_STATE_OPEN) { 2178 rc = -EINVAL; 2179 goto out; 2180 } 2181 2182 fp = &edev->fp_array[queue]; 2183 2184 if (edev->fp_array[queue].type & QEDE_FASTPATH_RX) { 2185 rc = edev->ops->common->set_coalesce(edev->cdev, 2186 rxc, 0, 2187 fp->rxq->handle); 2188 if (rc) { 2189 DP_INFO(edev, 2190 "Set RX coalesce error, rc = %d\n", rc); 2191 goto out; 2192 } 2193 edev->coal_entry[queue].rxc = rxc; 2194 edev->coal_entry[queue].isvalid = true; 2195 } 2196 2197 if (edev->fp_array[queue].type & QEDE_FASTPATH_TX) { 2198 rc = edev->ops->common->set_coalesce(edev->cdev, 2199 0, txc, 2200 fp->txq->handle); 2201 if (rc) { 2202 DP_INFO(edev, 2203 "Set TX coalesce error, rc = %d\n", rc); 2204 goto out; 2205 } 2206 edev->coal_entry[queue].txc = txc; 2207 edev->coal_entry[queue].isvalid = true; 2208 } 2209out: 2210 __qede_unlock(edev); 2211 2212 return rc; 2213} 2214 2215static int qede_get_per_coalesce(struct net_device *dev, 2216 u32 queue, 2217 struct ethtool_coalesce *coal) 2218{ 2219 void *rx_handle = NULL, *tx_handle = NULL; 2220 struct qede_dev *edev = netdev_priv(dev); 2221 struct qede_fastpath *fp; 2222 u16 rx_coal, tx_coal; 2223 int rc = 0; 2224 2225 rx_coal = QED_DEFAULT_RX_USECS; 2226 tx_coal = QED_DEFAULT_TX_USECS; 2227 2228 memset(coal, 0, sizeof(struct ethtool_coalesce)); 2229 2230 __qede_lock(edev); 2231 if (queue >= edev->num_queues) { 2232 DP_INFO(edev, "Invalid queue\n"); 2233 rc = -EINVAL; 2234 goto out; 2235 } 2236 2237 if (edev->state != QEDE_STATE_OPEN) { 2238 rc = -EINVAL; 2239 goto out; 2240 } 2241 2242 fp = &edev->fp_array[queue]; 2243 2244 if (fp->type & QEDE_FASTPATH_RX) 2245 rx_handle = fp->rxq->handle; 2246 2247 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, 2248 rx_handle); 2249 if (rc) { 2250 DP_INFO(edev, "Read Rx coalesce error\n"); 2251 goto out; 2252 } 2253 2254 fp = &edev->fp_array[queue]; 2255 if (fp->type & QEDE_FASTPATH_TX) 2256 tx_handle = fp->txq->handle; 2257 2258 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, 2259 tx_handle); 2260 if (rc) 2261 DP_INFO(edev, "Read Tx coalesce error\n"); 2262 2263out: 2264 __qede_unlock(edev); 2265 2266 coal->rx_coalesce_usecs = rx_coal; 2267 coal->tx_coalesce_usecs = tx_coal; 2268 2269 return rc; 2270} 2271 2272static const struct ethtool_ops qede_ethtool_ops = { 2273 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 2274 ETHTOOL_COALESCE_STATS_BLOCK_USECS, 2275 .get_link_ksettings = qede_get_link_ksettings, 2276 .set_link_ksettings = qede_set_link_ksettings, 2277 .get_drvinfo = qede_get_drvinfo, 2278 .get_regs_len = qede_get_regs_len, 2279 .get_regs = qede_get_regs, 2280 .get_wol = qede_get_wol, 2281 .set_wol = qede_set_wol, 2282 .get_msglevel = qede_get_msglevel, 2283 .set_msglevel = qede_set_msglevel, 2284 .nway_reset = qede_nway_reset, 2285 .get_link = qede_get_link, 2286 .get_coalesce = qede_get_coalesce, 2287 .set_coalesce = qede_set_coalesce, 2288 .get_ringparam = qede_get_ringparam, 2289 .set_ringparam = qede_set_ringparam, 2290 .get_pauseparam = qede_get_pauseparam, 2291 .set_pauseparam = qede_set_pauseparam, 2292 .get_strings = qede_get_strings, 2293 .set_phys_id = qede_set_phys_id, 2294 .get_ethtool_stats = qede_get_ethtool_stats, 2295 .get_priv_flags = qede_get_priv_flags, 2296 .set_priv_flags = qede_set_priv_flags, 2297 .get_sset_count = qede_get_sset_count, 2298 .get_rxnfc = qede_get_rxnfc, 2299 .set_rxnfc = qede_set_rxnfc, 2300 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2301 .get_rxfh_key_size = qede_get_rxfh_key_size, 2302 .get_rxfh = qede_get_rxfh, 2303 .set_rxfh = qede_set_rxfh, 2304 .get_ts_info = qede_get_ts_info, 2305 .get_channels = qede_get_channels, 2306 .set_channels = qede_set_channels, 2307 .self_test = qede_self_test, 2308 .get_module_info = qede_get_module_info, 2309 .get_module_eeprom = qede_get_module_eeprom, 2310 .get_eee = qede_get_eee, 2311 .set_eee = qede_set_eee, 2312 .get_fecparam = qede_get_fecparam, 2313 .set_fecparam = qede_set_fecparam, 2314 .get_tunable = qede_get_tunable, 2315 .set_tunable = qede_set_tunable, 2316 .get_per_queue_coalesce = qede_get_per_coalesce, 2317 .set_per_queue_coalesce = qede_set_per_coalesce, 2318 .flash_device = qede_flash_device, 2319 .get_dump_flag = qede_get_dump_flag, 2320 .get_dump_data = qede_get_dump_data, 2321 .set_dump = qede_set_dump, 2322}; 2323 2324static const struct ethtool_ops qede_vf_ethtool_ops = { 2325 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 2326 ETHTOOL_COALESCE_STATS_BLOCK_USECS, 2327 .get_link_ksettings = qede_get_link_ksettings, 2328 .get_drvinfo = qede_get_drvinfo, 2329 .get_msglevel = qede_get_msglevel, 2330 .set_msglevel = qede_set_msglevel, 2331 .get_link = qede_get_link, 2332 .get_coalesce = qede_get_coalesce, 2333 .set_coalesce = qede_set_coalesce, 2334 .get_ringparam = qede_get_ringparam, 2335 .set_ringparam = qede_set_ringparam, 2336 .get_strings = qede_get_strings, 2337 .get_ethtool_stats = qede_get_ethtool_stats, 2338 .get_priv_flags = qede_get_priv_flags, 2339 .get_sset_count = qede_get_sset_count, 2340 .get_rxnfc = qede_get_rxnfc, 2341 .set_rxnfc = qede_set_rxnfc, 2342 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2343 .get_rxfh_key_size = qede_get_rxfh_key_size, 2344 .get_rxfh = qede_get_rxfh, 2345 .set_rxfh = qede_set_rxfh, 2346 .get_channels = qede_get_channels, 2347 .set_channels = qede_set_channels, 2348 .get_per_queue_coalesce = qede_get_per_coalesce, 2349 .set_per_queue_coalesce = qede_set_per_coalesce, 2350 .get_tunable = qede_get_tunable, 2351 .set_tunable = qede_set_tunable, 2352}; 2353 2354void qede_set_ethtool_ops(struct net_device *dev) 2355{ 2356 struct qede_dev *edev = netdev_priv(dev); 2357 2358 if (IS_VF(edev)) 2359 dev->ethtool_ops = &qede_vf_ethtool_ops; 2360 else 2361 dev->ethtool_ops = &qede_ethtool_ops; 2362} 2363