162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* Marvell RVU Ethernet driver 362306a36Sopenharmony_ci * 462306a36Sopenharmony_ci * Copyright (C) 2021 Marvell. 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#ifndef CN10K_H 962306a36Sopenharmony_ci#define CN10K_H 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#include "otx2_common.h" 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cistatic inline int mtu_to_dwrr_weight(struct otx2_nic *pfvf, int mtu) 1462306a36Sopenharmony_ci{ 1562306a36Sopenharmony_ci u32 weight; 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci /* On OTx2, since AF returns DWRR_MTU as '1', this logic 1862306a36Sopenharmony_ci * will work on those silicons as well. 1962306a36Sopenharmony_ci */ 2062306a36Sopenharmony_ci weight = mtu / pfvf->hw.dwrr_mtu; 2162306a36Sopenharmony_ci if (mtu % pfvf->hw.dwrr_mtu) 2262306a36Sopenharmony_ci weight += 1; 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci return weight; 2562306a36Sopenharmony_ci} 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ciint cn10k_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq); 2862306a36Sopenharmony_civoid cn10k_sqe_flush(void *dev, struct otx2_snd_queue *sq, int size, int qidx); 2962306a36Sopenharmony_ciint cn10k_sq_aq_init(void *dev, u16 qidx, u16 sqb_aura); 3062306a36Sopenharmony_ciint cn10k_lmtst_init(struct otx2_nic *pfvf); 3162306a36Sopenharmony_ciint cn10k_free_all_ipolicers(struct otx2_nic *pfvf); 3262306a36Sopenharmony_ciint cn10k_alloc_matchall_ipolicer(struct otx2_nic *pfvf); 3362306a36Sopenharmony_ciint cn10k_free_matchall_ipolicer(struct otx2_nic *pfvf); 3462306a36Sopenharmony_ciint cn10k_set_matchall_ipolicer_rate(struct otx2_nic *pfvf, 3562306a36Sopenharmony_ci u32 burst, u64 rate); 3662306a36Sopenharmony_ciint cn10k_map_unmap_rq_policer(struct otx2_nic *pfvf, int rq_idx, 3762306a36Sopenharmony_ci u16 policer, bool map); 3862306a36Sopenharmony_ciint cn10k_alloc_leaf_profile(struct otx2_nic *pfvf, u16 *leaf); 3962306a36Sopenharmony_ciint cn10k_set_ipolicer_rate(struct otx2_nic *pfvf, u16 profile, 4062306a36Sopenharmony_ci u32 burst, u64 rate, bool pps); 4162306a36Sopenharmony_ciint cn10k_free_leaf_profile(struct otx2_nic *pfvf, u16 leaf); 4262306a36Sopenharmony_ci#endif /* CN10K_H */ 43