1/*
2 * Combined Ethernet driver for Motorola MPC8xx and MPC82xx.
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 *  by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
9 *
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
13 */
14
15#include <linux/module.h>
16#include <linux/types.h>
17#include <linux/kernel.h>
18#include <linux/string.h>
19#include <linux/ptrace.h>
20#include <linux/errno.h>
21#include <linux/ioport.h>
22#include <linux/slab.h>
23#include <linux/interrupt.h>
24#include <linux/delay.h>
25#include <linux/netdevice.h>
26#include <linux/etherdevice.h>
27#include <linux/skbuff.h>
28#include <linux/spinlock.h>
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/bitops.h>
32#include <linux/platform_device.h>
33#include <linux/of_address.h>
34#include <linux/of_mdio.h>
35#include <linux/of_platform.h>
36#include <linux/pgtable.h>
37
38#include <asm/irq.h>
39#include <linux/uaccess.h>
40#include <asm/mpc5xxx.h>
41
42#include "fs_enet.h"
43#include "fec.h"
44
45/* Make MII read/write commands for the FEC.
46*/
47#define mk_mii_read(REG)	(0x60020000 | ((REG & 0x1f) << 18))
48#define mk_mii_write(REG, VAL)	(0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
49#define mk_mii_end		0
50
51#define FEC_MII_LOOPS	10000
52
53static int fs_enet_fec_mii_read(struct mii_bus *bus , int phy_id, int location)
54{
55	struct fec_info* fec = bus->priv;
56	struct fec __iomem *fecp = fec->fecp;
57	int i, ret = -1;
58
59	BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
60
61	/* Add PHY address to register command.  */
62	out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_read(location));
63
64	for (i = 0; i < FEC_MII_LOOPS; i++)
65		if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
66			break;
67
68	if (i < FEC_MII_LOOPS) {
69		out_be32(&fecp->fec_ievent, FEC_ENET_MII);
70		ret = in_be32(&fecp->fec_mii_data) & 0xffff;
71	}
72
73	return ret;
74}
75
76static int fs_enet_fec_mii_write(struct mii_bus *bus, int phy_id, int location, u16 val)
77{
78	struct fec_info* fec = bus->priv;
79	struct fec __iomem *fecp = fec->fecp;
80	int i;
81
82	/* this must never happen */
83	BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
84
85	/* Add PHY address to register command.  */
86	out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_write(location, val));
87
88	for (i = 0; i < FEC_MII_LOOPS; i++)
89		if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
90			break;
91
92	if (i < FEC_MII_LOOPS)
93		out_be32(&fecp->fec_ievent, FEC_ENET_MII);
94
95	return 0;
96
97}
98
99static const struct of_device_id fs_enet_mdio_fec_match[];
100static int fs_enet_mdio_probe(struct platform_device *ofdev)
101{
102	const struct of_device_id *match;
103	struct resource res;
104	struct mii_bus *new_bus;
105	struct fec_info *fec;
106	int (*get_bus_freq)(struct device *);
107	int ret = -ENOMEM, clock, speed;
108
109	match = of_match_device(fs_enet_mdio_fec_match, &ofdev->dev);
110	if (!match)
111		return -EINVAL;
112	get_bus_freq = match->data;
113
114	new_bus = mdiobus_alloc();
115	if (!new_bus)
116		goto out;
117
118	fec = kzalloc(sizeof(struct fec_info), GFP_KERNEL);
119	if (!fec)
120		goto out_mii;
121
122	new_bus->priv = fec;
123	new_bus->name = "FEC MII Bus";
124	new_bus->read = &fs_enet_fec_mii_read;
125	new_bus->write = &fs_enet_fec_mii_write;
126
127	ret = of_address_to_resource(ofdev->dev.of_node, 0, &res);
128	if (ret)
129		goto out_res;
130
131	snprintf(new_bus->id, MII_BUS_ID_SIZE, "%pap", &res.start);
132
133	fec->fecp = ioremap(res.start, resource_size(&res));
134	if (!fec->fecp) {
135		ret = -ENOMEM;
136		goto out_fec;
137	}
138
139	if (get_bus_freq) {
140		clock = get_bus_freq(&ofdev->dev);
141		if (!clock) {
142			/* Use maximum divider if clock is unknown */
143			dev_warn(&ofdev->dev, "could not determine IPS clock\n");
144			clock = 0x3F * 5000000;
145		}
146	} else
147		clock = ppc_proc_freq;
148
149	/*
150	 * Scale for a MII clock <= 2.5 MHz
151	 * Note that only 6 bits (25:30) are available for MII speed.
152	 */
153	speed = (clock + 4999999) / 5000000;
154	if (speed > 0x3F) {
155		speed = 0x3F;
156		dev_err(&ofdev->dev,
157			"MII clock (%d Hz) exceeds max (2.5 MHz)\n",
158			clock / speed);
159	}
160
161	fec->mii_speed = speed << 1;
162
163	setbits32(&fec->fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);
164	setbits32(&fec->fecp->fec_ecntrl, FEC_ECNTRL_PINMUX |
165	                                  FEC_ECNTRL_ETHER_EN);
166	out_be32(&fec->fecp->fec_ievent, FEC_ENET_MII);
167	clrsetbits_be32(&fec->fecp->fec_mii_speed, 0x7E, fec->mii_speed);
168
169	new_bus->phy_mask = ~0;
170
171	new_bus->parent = &ofdev->dev;
172	platform_set_drvdata(ofdev, new_bus);
173
174	ret = of_mdiobus_register(new_bus, ofdev->dev.of_node);
175	if (ret)
176		goto out_unmap_regs;
177
178	return 0;
179
180out_unmap_regs:
181	iounmap(fec->fecp);
182out_res:
183out_fec:
184	kfree(fec);
185out_mii:
186	mdiobus_free(new_bus);
187out:
188	return ret;
189}
190
191static void fs_enet_mdio_remove(struct platform_device *ofdev)
192{
193	struct mii_bus *bus = platform_get_drvdata(ofdev);
194	struct fec_info *fec = bus->priv;
195
196	mdiobus_unregister(bus);
197	iounmap(fec->fecp);
198	kfree(fec);
199	mdiobus_free(bus);
200}
201
202static const struct of_device_id fs_enet_mdio_fec_match[] = {
203	{
204		.compatible = "fsl,pq1-fec-mdio",
205	},
206#if defined(CONFIG_PPC_MPC512x)
207	{
208		.compatible = "fsl,mpc5121-fec-mdio",
209		.data = mpc5xxx_get_bus_frequency,
210	},
211#endif
212	{},
213};
214MODULE_DEVICE_TABLE(of, fs_enet_mdio_fec_match);
215
216static struct platform_driver fs_enet_fec_mdio_driver = {
217	.driver = {
218		.name = "fsl-fec-mdio",
219		.of_match_table = fs_enet_mdio_fec_match,
220	},
221	.probe = fs_enet_mdio_probe,
222	.remove_new = fs_enet_mdio_remove,
223};
224
225module_platform_driver(fs_enet_fec_mdio_driver);
226MODULE_LICENSE("GPL");
227