1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. 4 * 5 * Derived from Intel e1000 driver 6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 7 */ 8 9#include "atl1c.h" 10 11char atl1c_driver_name[] = "atl1c"; 12 13/* 14 * atl1c_pci_tbl - PCI Device ID Table 15 * 16 * Wildcard entries (PCI_ANY_ID) should come last 17 * Last entry must be all 0s 18 * 19 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 20 * Class, Class Mask, private data (not used) } 21 */ 22static const struct pci_device_id atl1c_pci_tbl[] = { 23 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 24 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 25 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, 26 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, 27 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, 28 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, 29 /* required last entry */ 30 { 0 } 31}; 32MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); 33 34MODULE_AUTHOR("Jie Yang"); 35MODULE_AUTHOR("Qualcomm Atheros Inc."); 36MODULE_DESCRIPTION("Qualcomm Atheros 100/1000M Ethernet Network Driver"); 37MODULE_LICENSE("GPL"); 38 39struct atl1c_qregs { 40 u16 tpd_addr_lo; 41 u16 tpd_prod; 42 u16 tpd_cons; 43 u16 rfd_addr_lo; 44 u16 rrd_addr_lo; 45 u16 rfd_prod; 46 u32 tx_isr; 47 u32 rx_isr; 48}; 49 50static struct atl1c_qregs atl1c_qregs[AT_MAX_TRANSMIT_QUEUE] = { 51 { 52 REG_TPD_PRI0_ADDR_LO, REG_TPD_PRI0_PIDX, REG_TPD_PRI0_CIDX, 53 REG_RFD0_HEAD_ADDR_LO, REG_RRD0_HEAD_ADDR_LO, 54 REG_MB_RFD0_PROD_IDX, ISR_TX_PKT_0, ISR_RX_PKT_0 55 }, 56 { 57 REG_TPD_PRI1_ADDR_LO, REG_TPD_PRI1_PIDX, REG_TPD_PRI1_CIDX, 58 REG_RFD1_HEAD_ADDR_LO, REG_RRD1_HEAD_ADDR_LO, 59 REG_MB_RFD1_PROD_IDX, ISR_TX_PKT_1, ISR_RX_PKT_1 60 }, 61 { 62 REG_TPD_PRI2_ADDR_LO, REG_TPD_PRI2_PIDX, REG_TPD_PRI2_CIDX, 63 REG_RFD2_HEAD_ADDR_LO, REG_RRD2_HEAD_ADDR_LO, 64 REG_MB_RFD2_PROD_IDX, ISR_TX_PKT_2, ISR_RX_PKT_2 65 }, 66 { 67 REG_TPD_PRI3_ADDR_LO, REG_TPD_PRI3_PIDX, REG_TPD_PRI3_CIDX, 68 REG_RFD3_HEAD_ADDR_LO, REG_RRD3_HEAD_ADDR_LO, 69 REG_MB_RFD3_PROD_IDX, ISR_TX_PKT_3, ISR_RX_PKT_3 70 }, 71}; 72 73static int atl1c_stop_mac(struct atl1c_hw *hw); 74static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); 75static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed); 76static void atl1c_start_mac(struct atl1c_adapter *adapter); 77static int atl1c_up(struct atl1c_adapter *adapter); 78static void atl1c_down(struct atl1c_adapter *adapter); 79static int atl1c_reset_mac(struct atl1c_hw *hw); 80static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter); 81static int atl1c_configure(struct atl1c_adapter *adapter); 82static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, u32 queue, 83 bool napi_mode); 84 85 86static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | 87 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; 88static void atl1c_pcie_patch(struct atl1c_hw *hw) 89{ 90 u32 mst_data, data; 91 92 /* pclk sel could switch to 25M */ 93 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data); 94 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS; 95 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data); 96 97 /* WoL/PCIE related settings */ 98 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { 99 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); 100 data |= PCIE_PHYMISC_FORCE_RCV_DET; 101 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); 102 } else { /* new dev set bit5 of MASTER */ 103 if (!(mst_data & MASTER_CTRL_WAKEN_25M)) 104 AT_WRITE_REG(hw, REG_MASTER_CTRL, 105 mst_data | MASTER_CTRL_WAKEN_25M); 106 } 107 /* aspm/PCIE setting only for l2cb 1.0 */ 108 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { 109 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); 110 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW, 111 L2CB1_PCIE_PHYMISC2_CDR_BW); 112 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH, 113 L2CB1_PCIE_PHYMISC2_L0S_TH); 114 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); 115 /* extend L1 sync timer */ 116 AT_READ_REG(hw, REG_LINK_CTRL, &data); 117 data |= LINK_CTRL_EXT_SYNC; 118 AT_WRITE_REG(hw, REG_LINK_CTRL, data); 119 } 120 /* l2cb 1.x & l1d 1.x */ 121 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { 122 AT_READ_REG(hw, REG_PM_CTRL, &data); 123 data |= PM_CTRL_L0S_BUFSRX_EN; 124 AT_WRITE_REG(hw, REG_PM_CTRL, data); 125 /* clear vendor msg */ 126 AT_READ_REG(hw, REG_DMA_DBG, &data); 127 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG); 128 } 129} 130 131/* FIXME: no need any more ? */ 132/* 133 * atl1c_init_pcie - init PCIE module 134 */ 135static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) 136{ 137 u32 data; 138 u32 pci_cmd; 139 struct pci_dev *pdev = hw->adapter->pdev; 140 int pos; 141 142 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); 143 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 144 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 145 PCI_COMMAND_IO); 146 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); 147 148 /* 149 * Clear any PowerSaveing Settings 150 */ 151 pci_enable_wake(pdev, PCI_D3hot, 0); 152 pci_enable_wake(pdev, PCI_D3cold, 0); 153 /* wol sts read-clear */ 154 AT_READ_REG(hw, REG_WOL_CTRL, &data); 155 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 156 157 /* 158 * Mask some pcie error bits 159 */ 160 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); 161 if (pos) { 162 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data); 163 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP); 164 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data); 165 } 166 /* clear error status */ 167 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, 168 PCI_EXP_DEVSTA_NFED | 169 PCI_EXP_DEVSTA_FED | 170 PCI_EXP_DEVSTA_CED | 171 PCI_EXP_DEVSTA_URD); 172 173 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); 174 data &= ~LTSSM_ID_EN_WRO; 175 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); 176 177 atl1c_pcie_patch(hw); 178 if (flag & ATL1C_PCIE_L0S_L1_DISABLE) 179 atl1c_disable_l0s_l1(hw); 180 181 msleep(5); 182} 183 184/** 185 * atl1c_irq_enable - Enable default interrupt generation settings 186 * @adapter: board private structure 187 */ 188static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) 189{ 190 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 191 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); 192 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 193 AT_WRITE_FLUSH(&adapter->hw); 194 } 195} 196 197/** 198 * atl1c_irq_disable - Mask off interrupt generation on the NIC 199 * @adapter: board private structure 200 */ 201static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) 202{ 203 atomic_inc(&adapter->irq_sem); 204 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 205 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); 206 AT_WRITE_FLUSH(&adapter->hw); 207 synchronize_irq(adapter->pdev->irq); 208} 209 210/* 211 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads 212 * of the idle status register until the device is actually idle 213 */ 214static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl) 215{ 216 int timeout; 217 u32 data; 218 219 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 220 AT_READ_REG(hw, REG_IDLE_STATUS, &data); 221 if ((data & modu_ctrl) == 0) 222 return 0; 223 msleep(1); 224 } 225 return data; 226} 227 228/** 229 * atl1c_phy_config - Timer Call-back 230 * @t: timer list containing pointer to netdev cast into an unsigned long 231 */ 232static void atl1c_phy_config(struct timer_list *t) 233{ 234 struct atl1c_adapter *adapter = from_timer(adapter, t, 235 phy_config_timer); 236 struct atl1c_hw *hw = &adapter->hw; 237 unsigned long flags; 238 239 spin_lock_irqsave(&adapter->mdio_lock, flags); 240 atl1c_restart_autoneg(hw); 241 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 242} 243 244void atl1c_reinit_locked(struct atl1c_adapter *adapter) 245{ 246 atl1c_down(adapter); 247 atl1c_up(adapter); 248 clear_bit(__AT_RESETTING, &adapter->flags); 249} 250 251static void atl1c_check_link_status(struct atl1c_adapter *adapter) 252{ 253 struct atl1c_hw *hw = &adapter->hw; 254 struct net_device *netdev = adapter->netdev; 255 struct pci_dev *pdev = adapter->pdev; 256 int err; 257 unsigned long flags; 258 u16 speed, duplex; 259 bool link; 260 261 spin_lock_irqsave(&adapter->mdio_lock, flags); 262 link = atl1c_get_link_status(hw); 263 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 264 265 if (!link) { 266 /* link down */ 267 netif_carrier_off(netdev); 268 hw->hibernate = true; 269 if (atl1c_reset_mac(hw) != 0) 270 if (netif_msg_hw(adapter)) 271 dev_warn(&pdev->dev, "reset mac failed\n"); 272 atl1c_set_aspm(hw, SPEED_0); 273 atl1c_post_phy_linkchg(hw, SPEED_0); 274 atl1c_reset_dma_ring(adapter); 275 atl1c_configure(adapter); 276 } else { 277 /* Link Up */ 278 hw->hibernate = false; 279 spin_lock_irqsave(&adapter->mdio_lock, flags); 280 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); 281 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 282 if (unlikely(err)) 283 return; 284 /* link result is our setting */ 285 if (adapter->link_speed != speed || 286 adapter->link_duplex != duplex) { 287 adapter->link_speed = speed; 288 adapter->link_duplex = duplex; 289 atl1c_set_aspm(hw, speed); 290 atl1c_post_phy_linkchg(hw, speed); 291 atl1c_start_mac(adapter); 292 if (netif_msg_link(adapter)) 293 dev_info(&pdev->dev, 294 "%s: %s NIC Link is Up<%d Mbps %s>\n", 295 atl1c_driver_name, netdev->name, 296 adapter->link_speed, 297 adapter->link_duplex == FULL_DUPLEX ? 298 "Full Duplex" : "Half Duplex"); 299 } 300 if (!netif_carrier_ok(netdev)) 301 netif_carrier_on(netdev); 302 } 303} 304 305static void atl1c_link_chg_event(struct atl1c_adapter *adapter) 306{ 307 struct net_device *netdev = adapter->netdev; 308 struct pci_dev *pdev = adapter->pdev; 309 bool link; 310 311 spin_lock(&adapter->mdio_lock); 312 link = atl1c_get_link_status(&adapter->hw); 313 spin_unlock(&adapter->mdio_lock); 314 /* notify upper layer link down ASAP */ 315 if (!link) { 316 if (netif_carrier_ok(netdev)) { 317 /* old link state: Up */ 318 netif_carrier_off(netdev); 319 if (netif_msg_link(adapter)) 320 dev_info(&pdev->dev, 321 "%s: %s NIC Link is Down\n", 322 atl1c_driver_name, netdev->name); 323 adapter->link_speed = SPEED_0; 324 } 325 } 326 327 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event); 328 schedule_work(&adapter->common_task); 329} 330 331static void atl1c_common_task(struct work_struct *work) 332{ 333 struct atl1c_adapter *adapter; 334 struct net_device *netdev; 335 336 adapter = container_of(work, struct atl1c_adapter, common_task); 337 netdev = adapter->netdev; 338 339 if (test_bit(__AT_DOWN, &adapter->flags)) 340 return; 341 342 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) { 343 netif_device_detach(netdev); 344 atl1c_down(adapter); 345 atl1c_up(adapter); 346 netif_device_attach(netdev); 347 } 348 349 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE, 350 &adapter->work_event)) { 351 atl1c_irq_disable(adapter); 352 atl1c_check_link_status(adapter); 353 atl1c_irq_enable(adapter); 354 } 355} 356 357 358static void atl1c_del_timer(struct atl1c_adapter *adapter) 359{ 360 del_timer_sync(&adapter->phy_config_timer); 361} 362 363 364/** 365 * atl1c_tx_timeout - Respond to a Tx Hang 366 * @netdev: network interface device structure 367 * @txqueue: index of hanging tx queue 368 */ 369static void atl1c_tx_timeout(struct net_device *netdev, unsigned int txqueue) 370{ 371 struct atl1c_adapter *adapter = netdev_priv(netdev); 372 373 /* Do the reset outside of interrupt context */ 374 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 375 schedule_work(&adapter->common_task); 376} 377 378/** 379 * atl1c_set_multi - Multicast and Promiscuous mode set 380 * @netdev: network interface device structure 381 * 382 * The set_multi entry point is called whenever the multicast address 383 * list or the network interface flags are updated. This routine is 384 * responsible for configuring the hardware for proper multicast, 385 * promiscuous mode, and all-multi behavior. 386 */ 387static void atl1c_set_multi(struct net_device *netdev) 388{ 389 struct atl1c_adapter *adapter = netdev_priv(netdev); 390 struct atl1c_hw *hw = &adapter->hw; 391 struct netdev_hw_addr *ha; 392 u32 mac_ctrl_data; 393 u32 hash_value; 394 395 /* Check for Promiscuous and All Multicast modes */ 396 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 397 398 if (netdev->flags & IFF_PROMISC) { 399 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 400 } else if (netdev->flags & IFF_ALLMULTI) { 401 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 402 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 403 } else { 404 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 405 } 406 407 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 408 409 /* clear the old settings from the multicast hash table */ 410 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 411 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 412 413 /* comoute mc addresses' hash value ,and put it into hash table */ 414 netdev_for_each_mc_addr(ha, netdev) { 415 hash_value = atl1c_hash_mc_addr(hw, ha->addr); 416 atl1c_hash_set(hw, hash_value); 417 } 418} 419 420static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 421{ 422 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 423 /* enable VLAN tag insert/strip */ 424 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 425 } else { 426 /* disable VLAN tag insert/strip */ 427 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 428 } 429} 430 431static void atl1c_vlan_mode(struct net_device *netdev, 432 netdev_features_t features) 433{ 434 struct atl1c_adapter *adapter = netdev_priv(netdev); 435 struct pci_dev *pdev = adapter->pdev; 436 u32 mac_ctrl_data = 0; 437 438 if (netif_msg_pktdata(adapter)) 439 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n"); 440 441 atl1c_irq_disable(adapter); 442 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); 443 __atl1c_vlan_mode(features, &mac_ctrl_data); 444 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 445 atl1c_irq_enable(adapter); 446} 447 448static void atl1c_restore_vlan(struct atl1c_adapter *adapter) 449{ 450 struct pci_dev *pdev = adapter->pdev; 451 452 if (netif_msg_pktdata(adapter)) 453 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n"); 454 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features); 455} 456 457/** 458 * atl1c_set_mac_addr - Change the Ethernet Address of the NIC 459 * @netdev: network interface device structure 460 * @p: pointer to an address structure 461 * 462 * Returns 0 on success, negative on failure 463 */ 464static int atl1c_set_mac_addr(struct net_device *netdev, void *p) 465{ 466 struct atl1c_adapter *adapter = netdev_priv(netdev); 467 struct sockaddr *addr = p; 468 469 if (!is_valid_ether_addr(addr->sa_data)) 470 return -EADDRNOTAVAIL; 471 472 if (netif_running(netdev)) 473 return -EBUSY; 474 475 eth_hw_addr_set(netdev, addr->sa_data); 476 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 477 478 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 479 480 return 0; 481} 482 483static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, 484 struct net_device *dev) 485{ 486 int mtu = dev->mtu; 487 488 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? 489 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; 490} 491 492static netdev_features_t atl1c_fix_features(struct net_device *netdev, 493 netdev_features_t features) 494{ 495 struct atl1c_adapter *adapter = netdev_priv(netdev); 496 struct atl1c_hw *hw = &adapter->hw; 497 498 /* 499 * Since there is no support for separate rx/tx vlan accel 500 * enable/disable make sure tx flag is always in same state as rx. 501 */ 502 if (features & NETIF_F_HW_VLAN_CTAG_RX) 503 features |= NETIF_F_HW_VLAN_CTAG_TX; 504 else 505 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 506 507 if (hw->nic_type != athr_mt) { 508 if (netdev->mtu > MAX_TSO_FRAME_SIZE) 509 features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 510 } 511 512 return features; 513} 514 515static int atl1c_set_features(struct net_device *netdev, 516 netdev_features_t features) 517{ 518 netdev_features_t changed = netdev->features ^ features; 519 520 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 521 atl1c_vlan_mode(netdev, features); 522 523 return 0; 524} 525 526static void atl1c_set_max_mtu(struct net_device *netdev) 527{ 528 struct atl1c_adapter *adapter = netdev_priv(netdev); 529 struct atl1c_hw *hw = &adapter->hw; 530 531 switch (hw->nic_type) { 532 /* These (GbE) devices support jumbo packets, max_mtu 6122 */ 533 case athr_l1c: 534 case athr_l1d: 535 case athr_l1d_2: 536 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - 537 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 538 break; 539 case athr_mt: 540 netdev->max_mtu = 9500; 541 break; 542 /* The 10/100 devices don't support jumbo packets, max_mtu 1500 */ 543 default: 544 netdev->max_mtu = ETH_DATA_LEN; 545 break; 546 } 547} 548 549/** 550 * atl1c_change_mtu - Change the Maximum Transfer Unit 551 * @netdev: network interface device structure 552 * @new_mtu: new value for maximum frame size 553 * 554 * Returns 0 on success, negative on failure 555 */ 556static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) 557{ 558 struct atl1c_adapter *adapter = netdev_priv(netdev); 559 560 /* set MTU */ 561 if (netif_running(netdev)) { 562 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 563 msleep(1); 564 netdev->mtu = new_mtu; 565 adapter->hw.max_frame_size = new_mtu; 566 atl1c_set_rxbufsize(adapter, netdev); 567 atl1c_down(adapter); 568 netdev_update_features(netdev); 569 atl1c_up(adapter); 570 clear_bit(__AT_RESETTING, &adapter->flags); 571 } 572 return 0; 573} 574 575/* 576 * caller should hold mdio_lock 577 */ 578static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 579{ 580 struct atl1c_adapter *adapter = netdev_priv(netdev); 581 u16 result; 582 583 atl1c_read_phy_reg(&adapter->hw, reg_num, &result); 584 return result; 585} 586 587static void atl1c_mdio_write(struct net_device *netdev, int phy_id, 588 int reg_num, int val) 589{ 590 struct atl1c_adapter *adapter = netdev_priv(netdev); 591 592 atl1c_write_phy_reg(&adapter->hw, reg_num, val); 593} 594 595static int atl1c_mii_ioctl(struct net_device *netdev, 596 struct ifreq *ifr, int cmd) 597{ 598 struct atl1c_adapter *adapter = netdev_priv(netdev); 599 struct pci_dev *pdev = adapter->pdev; 600 struct mii_ioctl_data *data = if_mii(ifr); 601 unsigned long flags; 602 int retval = 0; 603 604 if (!netif_running(netdev)) 605 return -EINVAL; 606 607 spin_lock_irqsave(&adapter->mdio_lock, flags); 608 switch (cmd) { 609 case SIOCGMIIPHY: 610 data->phy_id = 0; 611 break; 612 613 case SIOCGMIIREG: 614 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 615 &data->val_out)) { 616 retval = -EIO; 617 goto out; 618 } 619 break; 620 621 case SIOCSMIIREG: 622 if (data->reg_num & ~(0x1F)) { 623 retval = -EFAULT; 624 goto out; 625 } 626 627 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", 628 data->reg_num, data->val_in); 629 if (atl1c_write_phy_reg(&adapter->hw, 630 data->reg_num, data->val_in)) { 631 retval = -EIO; 632 goto out; 633 } 634 break; 635 636 default: 637 retval = -EOPNOTSUPP; 638 break; 639 } 640out: 641 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 642 return retval; 643} 644 645static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 646{ 647 switch (cmd) { 648 case SIOCGMIIPHY: 649 case SIOCGMIIREG: 650 case SIOCSMIIREG: 651 return atl1c_mii_ioctl(netdev, ifr, cmd); 652 default: 653 return -EOPNOTSUPP; 654 } 655} 656 657/** 658 * atl1c_alloc_queues - Allocate memory for all rings 659 * @adapter: board private structure to initialize 660 * 661 */ 662static int atl1c_alloc_queues(struct atl1c_adapter *adapter) 663{ 664 return 0; 665} 666 667static enum atl1c_nic_type atl1c_get_mac_type(struct pci_dev *pdev, 668 u8 __iomem *hw_addr) 669{ 670 switch (pdev->device) { 671 case PCI_DEVICE_ID_ATTANSIC_L2C: 672 return athr_l2c; 673 case PCI_DEVICE_ID_ATTANSIC_L1C: 674 return athr_l1c; 675 case PCI_DEVICE_ID_ATHEROS_L2C_B: 676 return athr_l2c_b; 677 case PCI_DEVICE_ID_ATHEROS_L2C_B2: 678 return athr_l2c_b2; 679 case PCI_DEVICE_ID_ATHEROS_L1D: 680 return athr_l1d; 681 case PCI_DEVICE_ID_ATHEROS_L1D_2_0: 682 if (readl(hw_addr + REG_MT_MAGIC) == MT_MAGIC) 683 return athr_mt; 684 return athr_l1d_2; 685 default: 686 return athr_l1c; 687 } 688} 689 690static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) 691{ 692 u32 link_ctrl_data; 693 694 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 695 696 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | 697 ATL1C_TXQ_MODE_ENHANCE; 698 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT | 699 ATL1C_ASPM_L1_SUPPORT; 700 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 701 702 if (hw->nic_type == athr_l1c || 703 hw->nic_type == athr_l1d || 704 hw->nic_type == athr_l1d_2) 705 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; 706 return 0; 707} 708 709struct atl1c_platform_patch { 710 u16 pci_did; 711 u8 pci_revid; 712 u16 subsystem_vid; 713 u16 subsystem_did; 714 u32 patch_flag; 715#define ATL1C_LINK_PATCH 0x1 716}; 717static const struct atl1c_platform_patch plats[] = { 718{0x2060, 0xC1, 0x1019, 0x8152, 0x1}, 719{0x2060, 0xC1, 0x1019, 0x2060, 0x1}, 720{0x2060, 0xC1, 0x1019, 0xE000, 0x1}, 721{0x2062, 0xC0, 0x1019, 0x8152, 0x1}, 722{0x2062, 0xC0, 0x1019, 0x2062, 0x1}, 723{0x2062, 0xC0, 0x1458, 0xE000, 0x1}, 724{0x2062, 0xC1, 0x1019, 0x8152, 0x1}, 725{0x2062, 0xC1, 0x1019, 0x2062, 0x1}, 726{0x2062, 0xC1, 0x1458, 0xE000, 0x1}, 727{0x2062, 0xC1, 0x1565, 0x2802, 0x1}, 728{0x2062, 0xC1, 0x1565, 0x2801, 0x1}, 729{0x1073, 0xC0, 0x1019, 0x8151, 0x1}, 730{0x1073, 0xC0, 0x1019, 0x1073, 0x1}, 731{0x1073, 0xC0, 0x1458, 0xE000, 0x1}, 732{0x1083, 0xC0, 0x1458, 0xE000, 0x1}, 733{0x1083, 0xC0, 0x1019, 0x8151, 0x1}, 734{0x1083, 0xC0, 0x1019, 0x1083, 0x1}, 735{0x1083, 0xC0, 0x1462, 0x7680, 0x1}, 736{0x1083, 0xC0, 0x1565, 0x2803, 0x1}, 737{0}, 738}; 739 740static void atl1c_patch_assign(struct atl1c_hw *hw) 741{ 742 struct pci_dev *pdev = hw->adapter->pdev; 743 u32 misc_ctrl; 744 int i = 0; 745 746 hw->msi_lnkpatch = false; 747 748 while (plats[i].pci_did != 0) { 749 if (plats[i].pci_did == hw->device_id && 750 plats[i].pci_revid == hw->revision_id && 751 plats[i].subsystem_vid == hw->subsystem_vendor_id && 752 plats[i].subsystem_did == hw->subsystem_id) { 753 if (plats[i].patch_flag & ATL1C_LINK_PATCH) 754 hw->msi_lnkpatch = true; 755 } 756 i++; 757 } 758 759 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 && 760 hw->revision_id == L2CB_V21) { 761 /* config access mode */ 762 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 763 REG_PCIE_DEV_MISC_CTRL); 764 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl); 765 misc_ctrl &= ~0x100; 766 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 767 REG_PCIE_DEV_MISC_CTRL); 768 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl); 769 } 770} 771/** 772 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 773 * @adapter: board private structure to initialize 774 * 775 * atl1c_sw_init initializes the Adapter private data structure. 776 * Fields are initialized based on PCI device information and 777 * OS network device settings (MTU size). 778 */ 779static int atl1c_sw_init(struct atl1c_adapter *adapter) 780{ 781 struct atl1c_hw *hw = &adapter->hw; 782 struct pci_dev *pdev = adapter->pdev; 783 u32 revision; 784 int i; 785 786 adapter->wol = 0; 787 device_set_wakeup_enable(&pdev->dev, false); 788 adapter->link_speed = SPEED_0; 789 adapter->link_duplex = FULL_DUPLEX; 790 adapter->tpd_ring[0].count = 1024; 791 adapter->rfd_ring[0].count = 512; 792 793 hw->vendor_id = pdev->vendor; 794 hw->device_id = pdev->device; 795 hw->subsystem_vendor_id = pdev->subsystem_vendor; 796 hw->subsystem_id = pdev->subsystem_device; 797 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision); 798 hw->revision_id = revision & 0xFF; 799 /* before link up, we assume hibernate is true */ 800 hw->hibernate = true; 801 hw->media_type = MEDIA_TYPE_AUTO_SENSOR; 802 if (atl1c_setup_mac_funcs(hw) != 0) { 803 dev_err(&pdev->dev, "set mac function pointers failed\n"); 804 return -1; 805 } 806 atl1c_patch_assign(hw); 807 808 hw->intr_mask = IMR_NORMAL_MASK; 809 for (i = 0; i < adapter->tx_queue_count; ++i) 810 hw->intr_mask |= atl1c_qregs[i].tx_isr; 811 for (i = 0; i < adapter->rx_queue_count; ++i) 812 hw->intr_mask |= atl1c_qregs[i].rx_isr; 813 hw->phy_configured = false; 814 hw->preamble_len = 7; 815 hw->max_frame_size = adapter->netdev->mtu; 816 hw->autoneg_advertised = ADVERTISED_Autoneg; 817 hw->indirect_tab = 0xE4E4E4E4; 818 hw->base_cpu = 0; 819 820 hw->ict = 50000; /* 100ms */ 821 hw->smb_timer = 200000; /* 400ms */ 822 hw->rx_imt = 200; 823 hw->tx_imt = 1000; 824 825 hw->tpd_burst = 5; 826 hw->rfd_burst = 8; 827 hw->dma_order = atl1c_dma_ord_out; 828 hw->dmar_block = atl1c_dma_req_1024; 829 830 if (atl1c_alloc_queues(adapter)) { 831 dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); 832 return -ENOMEM; 833 } 834 /* TODO */ 835 atl1c_set_rxbufsize(adapter, adapter->netdev); 836 atomic_set(&adapter->irq_sem, 1); 837 spin_lock_init(&adapter->mdio_lock); 838 spin_lock_init(&adapter->hw.intr_mask_lock); 839 set_bit(__AT_DOWN, &adapter->flags); 840 841 return 0; 842} 843 844static inline void atl1c_clean_buffer(struct pci_dev *pdev, 845 struct atl1c_buffer *buffer_info) 846{ 847 u16 pci_driection; 848 if (buffer_info->flags & ATL1C_BUFFER_FREE) 849 return; 850 if (buffer_info->dma) { 851 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) 852 pci_driection = DMA_FROM_DEVICE; 853 else 854 pci_driection = DMA_TO_DEVICE; 855 856 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) 857 dma_unmap_single(&pdev->dev, buffer_info->dma, 858 buffer_info->length, pci_driection); 859 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) 860 dma_unmap_page(&pdev->dev, buffer_info->dma, 861 buffer_info->length, pci_driection); 862 } 863 if (buffer_info->skb) 864 dev_consume_skb_any(buffer_info->skb); 865 buffer_info->dma = 0; 866 buffer_info->skb = NULL; 867 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 868} 869/** 870 * atl1c_clean_tx_ring - Free Tx-skb 871 * @adapter: board private structure 872 * @queue: idx of transmit queue 873 */ 874static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, 875 u32 queue) 876{ 877 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue]; 878 struct atl1c_buffer *buffer_info; 879 struct pci_dev *pdev = adapter->pdev; 880 u16 index, ring_count; 881 882 ring_count = tpd_ring->count; 883 for (index = 0; index < ring_count; index++) { 884 buffer_info = &tpd_ring->buffer_info[index]; 885 atl1c_clean_buffer(pdev, buffer_info); 886 } 887 888 netdev_tx_reset_queue(netdev_get_tx_queue(adapter->netdev, queue)); 889 890 /* Zero out Tx-buffers */ 891 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * 892 ring_count); 893 atomic_set(&tpd_ring->next_to_clean, 0); 894 tpd_ring->next_to_use = 0; 895} 896 897/** 898 * atl1c_clean_rx_ring - Free rx-reservation skbs 899 * @adapter: board private structure 900 * @queue: idx of transmit queue 901 */ 902static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter, u32 queue) 903{ 904 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[queue]; 905 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[queue]; 906 struct atl1c_buffer *buffer_info; 907 struct pci_dev *pdev = adapter->pdev; 908 int j; 909 910 for (j = 0; j < rfd_ring->count; j++) { 911 buffer_info = &rfd_ring->buffer_info[j]; 912 atl1c_clean_buffer(pdev, buffer_info); 913 } 914 /* zero out the descriptor ring */ 915 memset(rfd_ring->desc, 0, rfd_ring->size); 916 rfd_ring->next_to_clean = 0; 917 rfd_ring->next_to_use = 0; 918 rrd_ring->next_to_use = 0; 919 rrd_ring->next_to_clean = 0; 920} 921 922/* 923 * Read / Write Ptr Initialize: 924 */ 925static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) 926{ 927 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 928 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; 929 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; 930 struct atl1c_buffer *buffer_info; 931 int i, j; 932 933 for (i = 0; i < adapter->tx_queue_count; i++) { 934 tpd_ring[i].next_to_use = 0; 935 atomic_set(&tpd_ring[i].next_to_clean, 0); 936 buffer_info = tpd_ring[i].buffer_info; 937 for (j = 0; j < tpd_ring->count; j++) 938 ATL1C_SET_BUFFER_STATE(&buffer_info[i], 939 ATL1C_BUFFER_FREE); 940 } 941 for (i = 0; i < adapter->rx_queue_count; i++) { 942 rfd_ring[i].next_to_use = 0; 943 rfd_ring[i].next_to_clean = 0; 944 rrd_ring[i].next_to_use = 0; 945 rrd_ring[i].next_to_clean = 0; 946 for (j = 0; j < rfd_ring[i].count; j++) { 947 buffer_info = &rfd_ring[i].buffer_info[j]; 948 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 949 } 950 } 951} 952 953/** 954 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources 955 * @adapter: board private structure 956 * 957 * Free all transmit software resources 958 */ 959static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) 960{ 961 struct pci_dev *pdev = adapter->pdev; 962 963 dma_free_coherent(&pdev->dev, adapter->ring_header.size, 964 adapter->ring_header.desc, adapter->ring_header.dma); 965 adapter->ring_header.desc = NULL; 966 967 /* Note: just free tdp_ring.buffer_info, 968 * it contain rfd_ring.buffer_info, do not double free 969 */ 970 if (adapter->tpd_ring[0].buffer_info) { 971 kfree(adapter->tpd_ring[0].buffer_info); 972 adapter->tpd_ring[0].buffer_info = NULL; 973 } 974} 975 976/** 977 * atl1c_setup_ring_resources - allocate Tx / RX descriptor resources 978 * @adapter: board private structure 979 * 980 * Return 0 on success, negative on failure 981 */ 982static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) 983{ 984 struct pci_dev *pdev = adapter->pdev; 985 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 986 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; 987 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; 988 struct atl1c_ring_header *ring_header = &adapter->ring_header; 989 int tqc = adapter->tx_queue_count; 990 int rqc = adapter->rx_queue_count; 991 int size; 992 int i; 993 int count = 0; 994 u32 offset = 0; 995 996 /* Even though only one tpd queue is actually used, the "high" 997 * priority tpd queue also gets initialized 998 */ 999 if (tqc == 1) 1000 tqc = 2; 1001 1002 for (i = 1; i < tqc; i++) 1003 tpd_ring[i].count = tpd_ring[0].count; 1004 1005 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * tqc + 1006 rfd_ring->count * rqc); 1007 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); 1008 if (unlikely(!tpd_ring->buffer_info)) 1009 goto err_nomem; 1010 1011 for (i = 0; i < tqc; i++) { 1012 tpd_ring[i].adapter = adapter; 1013 tpd_ring[i].num = i; 1014 tpd_ring[i].buffer_info = (tpd_ring->buffer_info + count); 1015 count += tpd_ring[i].count; 1016 } 1017 1018 for (i = 0; i < rqc; i++) { 1019 rrd_ring[i].adapter = adapter; 1020 rrd_ring[i].num = i; 1021 rrd_ring[i].count = rfd_ring[0].count; 1022 rfd_ring[i].count = rfd_ring[0].count; 1023 rfd_ring[i].buffer_info = (tpd_ring->buffer_info + count); 1024 count += rfd_ring->count; 1025 } 1026 1027 /* 1028 * real ring DMA buffer 1029 * each ring/block may need up to 8 bytes for alignment, hence the 1030 * additional bytes tacked onto the end. 1031 */ 1032 ring_header->size = 1033 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * tqc + 1034 sizeof(struct atl1c_rx_free_desc) * rfd_ring->count * rqc + 1035 sizeof(struct atl1c_recv_ret_status) * rfd_ring->count * rqc + 1036 8 * 4; 1037 1038 ring_header->desc = dma_alloc_coherent(&pdev->dev, ring_header->size, 1039 &ring_header->dma, GFP_KERNEL); 1040 if (unlikely(!ring_header->desc)) { 1041 dev_err(&pdev->dev, "could not get memory for DMA buffer\n"); 1042 goto err_nomem; 1043 } 1044 /* init TPD ring */ 1045 1046 tpd_ring[0].dma = roundup(ring_header->dma, 8); 1047 offset = tpd_ring[0].dma - ring_header->dma; 1048 for (i = 0; i < tqc; i++) { 1049 tpd_ring[i].dma = ring_header->dma + offset; 1050 tpd_ring[i].desc = (u8 *)ring_header->desc + offset; 1051 tpd_ring[i].size = 1052 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; 1053 offset += roundup(tpd_ring[i].size, 8); 1054 } 1055 for (i = 0; i < rqc; i++) { 1056 /* init RFD ring */ 1057 rfd_ring[i].dma = ring_header->dma + offset; 1058 rfd_ring[i].desc = (u8 *)ring_header->desc + offset; 1059 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) * 1060 rfd_ring[i].count; 1061 offset += roundup(rfd_ring[i].size, 8); 1062 1063 /* init RRD ring */ 1064 rrd_ring[i].dma = ring_header->dma + offset; 1065 rrd_ring[i].desc = (u8 *)ring_header->desc + offset; 1066 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) * 1067 rrd_ring[i].count; 1068 offset += roundup(rrd_ring[i].size, 8); 1069 } 1070 1071 return 0; 1072 1073err_nomem: 1074 kfree(tpd_ring->buffer_info); 1075 return -ENOMEM; 1076} 1077 1078static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) 1079{ 1080 struct atl1c_hw *hw = &adapter->hw; 1081 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; 1082 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; 1083 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 1084 int i; 1085 int tx_queue_count = adapter->tx_queue_count; 1086 1087 if (tx_queue_count == 1) 1088 tx_queue_count = 2; 1089 1090 /* TPD */ 1091 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, 1092 (u32)((tpd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1093 /* just enable normal priority TX queue */ 1094 for (i = 0; i < tx_queue_count; i++) { 1095 AT_WRITE_REG(hw, atl1c_qregs[i].tpd_addr_lo, 1096 (u32)(tpd_ring[i].dma & AT_DMA_LO_ADDR_MASK)); 1097 } 1098 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, 1099 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); 1100 1101 1102 /* RFD */ 1103 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, 1104 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1105 for (i = 0; i < adapter->rx_queue_count; i++) { 1106 AT_WRITE_REG(hw, atl1c_qregs[i].rfd_addr_lo, 1107 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK)); 1108 } 1109 1110 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, 1111 rfd_ring->count & RFD_RING_SIZE_MASK); 1112 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, 1113 adapter->rx_buffer_len & RX_BUF_SIZE_MASK); 1114 1115 /* RRD */ 1116 for (i = 0; i < adapter->rx_queue_count; i++) { 1117 AT_WRITE_REG(hw, atl1c_qregs[i].rrd_addr_lo, 1118 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK)); 1119 } 1120 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, 1121 (rrd_ring->count & RRD_RING_SIZE_MASK)); 1122 1123 if (hw->nic_type == athr_l2c_b) { 1124 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); 1125 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); 1126 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); 1127 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); 1128 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); 1129 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); 1130 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ 1131 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ 1132 } 1133 /* Load all of base address above */ 1134 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 1135} 1136 1137static void atl1c_configure_tx(struct atl1c_adapter *adapter) 1138{ 1139 struct atl1c_hw *hw = &adapter->hw; 1140 int max_pay_load; 1141 u16 tx_offload_thresh; 1142 u32 txq_ctrl_data; 1143 1144 tx_offload_thresh = MAX_TSO_FRAME_SIZE; 1145 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, 1146 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); 1147 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8; 1148 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 1149 /* 1150 * if BIOS had changed the dam-read-max-length to an invalid value, 1151 * restore it to default value 1152 */ 1153 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) { 1154 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN); 1155 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN; 1156 } 1157 txq_ctrl_data = 1158 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ? 1159 L2CB_TXQ_CFGV : L1C_TXQ_CFGV; 1160 1161 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); 1162} 1163 1164static void atl1c_configure_rx(struct atl1c_adapter *adapter) 1165{ 1166 struct atl1c_hw *hw = &adapter->hw; 1167 u32 rxq_ctrl_data; 1168 1169 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << 1170 RXQ_RFD_BURST_NUM_SHIFT; 1171 1172 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) 1173 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; 1174 1175 /* aspm for gigabit */ 1176 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0) 1177 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT, 1178 ASPM_THRUPUT_LIMIT_100M); 1179 1180 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1181} 1182 1183static void atl1c_configure_dma(struct atl1c_adapter *adapter) 1184{ 1185 struct atl1c_hw *hw = &adapter->hw; 1186 u32 dma_ctrl_data; 1187 1188 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) | 1189 DMA_CTRL_RREQ_PRI_DATA | 1190 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) | 1191 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) | 1192 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF); 1193 1194 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1195} 1196 1197/* 1198 * Stop the mac, transmit and receive units 1199 * hw - Struct containing variables accessed by shared code 1200 * return : 0 or idle status (if error) 1201 */ 1202static int atl1c_stop_mac(struct atl1c_hw *hw) 1203{ 1204 u32 data; 1205 1206 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1207 data &= ~RXQ_CTRL_EN; 1208 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1209 1210 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1211 data &= ~TXQ_CTRL_EN; 1212 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1213 1214 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY); 1215 1216 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1217 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1218 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1219 1220 return (int)atl1c_wait_until_idle(hw, 1221 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY); 1222} 1223 1224static void atl1c_start_mac(struct atl1c_adapter *adapter) 1225{ 1226 struct atl1c_hw *hw = &adapter->hw; 1227 u32 mac, txq, rxq; 1228 1229 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX; 1230 hw->mac_speed = adapter->link_speed == SPEED_1000 ? 1231 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100; 1232 1233 AT_READ_REG(hw, REG_TXQ_CTRL, &txq); 1234 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq); 1235 AT_READ_REG(hw, REG_MAC_CTRL, &mac); 1236 1237 txq |= TXQ_CTRL_EN; 1238 rxq |= RXQ_CTRL_EN; 1239 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW | 1240 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW | 1241 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD | 1242 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN | 1243 MAC_CTRL_HASH_ALG_CRC32; 1244 if (hw->mac_duplex) 1245 mac |= MAC_CTRL_DUPLX; 1246 else 1247 mac &= ~MAC_CTRL_DUPLX; 1248 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed); 1249 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len); 1250 1251 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq); 1252 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq); 1253 AT_WRITE_REG(hw, REG_MAC_CTRL, mac); 1254} 1255 1256/* 1257 * Reset the transmit and receive units; mask and clear all interrupts. 1258 * hw - Struct containing variables accessed by shared code 1259 * return : 0 or idle status (if error) 1260 */ 1261static int atl1c_reset_mac(struct atl1c_hw *hw) 1262{ 1263 struct atl1c_adapter *adapter = hw->adapter; 1264 struct pci_dev *pdev = adapter->pdev; 1265 u32 ctrl_data = 0; 1266 1267 atl1c_stop_mac(hw); 1268 /* 1269 * Issue Soft Reset to the MAC. This will reset the chip's 1270 * transmit, receive, DMA. It will not effect 1271 * the current PCI configuration. The global reset bit is self- 1272 * clearing, and should clear within a microsecond. 1273 */ 1274 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data); 1275 ctrl_data |= MASTER_CTRL_OOB_DIS; 1276 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST); 1277 1278 AT_WRITE_FLUSH(hw); 1279 msleep(10); 1280 /* Wait at least 10ms for All module to be Idle */ 1281 1282 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) { 1283 dev_err(&pdev->dev, 1284 "MAC state machine can't be idle since" 1285 " disabled for 10ms second\n"); 1286 return -1; 1287 } 1288 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data); 1289 1290 /* driver control speed/duplex */ 1291 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data); 1292 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW); 1293 1294 /* clk switch setting */ 1295 AT_READ_REG(hw, REG_SERDES, &ctrl_data); 1296 switch (hw->nic_type) { 1297 case athr_l2c_b: 1298 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN | 1299 SERDES_MAC_CLK_SLOWDOWN); 1300 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1301 break; 1302 case athr_l2c_b2: 1303 case athr_l1d_2: 1304 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN; 1305 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1306 break; 1307 default: 1308 break; 1309 } 1310 1311 return 0; 1312} 1313 1314static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) 1315{ 1316 u16 ctrl_flags = hw->ctrl_flags; 1317 1318 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT); 1319 atl1c_set_aspm(hw, SPEED_0); 1320 hw->ctrl_flags = ctrl_flags; 1321} 1322 1323/* 1324 * Set ASPM state. 1325 * Enable/disable L0s/L1 depend on link state. 1326 */ 1327static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed) 1328{ 1329 u32 pm_ctrl_data; 1330 u32 link_l1_timer; 1331 1332 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1333 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN | 1334 PM_CTRL_ASPM_L0S_EN | 1335 PM_CTRL_MAC_ASPM_CHK); 1336 /* L1 timer */ 1337 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1338 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S; 1339 link_l1_timer = 1340 link_speed == SPEED_1000 || link_speed == SPEED_100 ? 1341 L1D_PMCTRL_L1_ENTRY_TM_16US : 1; 1342 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1343 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer); 1344 } else { 1345 link_l1_timer = hw->nic_type == athr_l2c_b ? 1346 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM; 1347 if (link_speed != SPEED_1000 && link_speed != SPEED_100) 1348 link_l1_timer = 1; 1349 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1350 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer); 1351 } 1352 1353 /* L0S/L1 enable */ 1354 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0) 1355 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK; 1356 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1357 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK; 1358 1359 /* l2cb & l1d & l2cb2 & l1d2 */ 1360 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1361 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1362 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1363 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF); 1364 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER | 1365 PM_CTRL_SERDES_PD_EX_L1 | 1366 PM_CTRL_CLK_SWH_L1; 1367 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1368 PM_CTRL_SERDES_PLL_L1_EN | 1369 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1370 PM_CTRL_SA_DLY_EN | 1371 PM_CTRL_HOTRST); 1372 /* disable l0s if link down or l2cb */ 1373 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b) 1374 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1375 } else { /* l1c */ 1376 pm_ctrl_data = 1377 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0); 1378 if (link_speed != SPEED_0) { 1379 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN | 1380 PM_CTRL_SERDES_PLL_L1_EN | 1381 PM_CTRL_SERDES_BUFS_RX_L1_EN; 1382 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 | 1383 PM_CTRL_CLK_SWH_L1 | 1384 PM_CTRL_ASPM_L0S_EN | 1385 PM_CTRL_ASPM_L1_EN); 1386 } else { /* link down */ 1387 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1388 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1389 PM_CTRL_SERDES_PLL_L1_EN | 1390 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1391 PM_CTRL_ASPM_L0S_EN); 1392 } 1393 } 1394 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1395 1396 return; 1397} 1398 1399/** 1400 * atl1c_configure_mac - Configure Transmit&Receive Unit after Reset 1401 * @adapter: board private structure 1402 * 1403 * Configure the Tx /Rx unit of the MAC after a reset. 1404 */ 1405static int atl1c_configure_mac(struct atl1c_adapter *adapter) 1406{ 1407 struct atl1c_hw *hw = &adapter->hw; 1408 u32 master_ctrl_data = 0; 1409 u32 intr_modrt_data; 1410 u32 data; 1411 1412 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1413 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN | 1414 MASTER_CTRL_RX_ITIMER_EN | 1415 MASTER_CTRL_INT_RDCLR); 1416 /* clear interrupt status */ 1417 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); 1418 /* Clear any WOL status */ 1419 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1420 /* set Interrupt Clear Timer 1421 * HW will enable self to assert interrupt event to system after 1422 * waiting x-time for software to notify it accept interrupt. 1423 */ 1424 1425 data = CLK_GATING_EN_ALL; 1426 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { 1427 if (hw->nic_type == athr_l2c_b) 1428 data &= ~CLK_GATING_RXMAC_EN; 1429 } else 1430 data = 0; 1431 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); 1432 1433 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, 1434 hw->ict & INT_RETRIG_TIMER_MASK); 1435 1436 atl1c_configure_des_ring(adapter); 1437 1438 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { 1439 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << 1440 IRQ_MODRT_TX_TIMER_SHIFT; 1441 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << 1442 IRQ_MODRT_RX_TIMER_SHIFT; 1443 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); 1444 master_ctrl_data |= 1445 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; 1446 } 1447 1448 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) 1449 master_ctrl_data |= MASTER_CTRL_INT_RDCLR; 1450 1451 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; 1452 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1453 1454 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, 1455 hw->smb_timer & SMB_STAT_TIMER_MASK); 1456 1457 /* set MTU */ 1458 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1459 VLAN_HLEN + ETH_FCS_LEN); 1460 1461 atl1c_configure_tx(adapter); 1462 atl1c_configure_rx(adapter); 1463 atl1c_configure_dma(adapter); 1464 1465 return 0; 1466} 1467 1468static int atl1c_configure(struct atl1c_adapter *adapter) 1469{ 1470 struct net_device *netdev = adapter->netdev; 1471 int num; 1472 int i; 1473 1474 if (adapter->hw.nic_type == athr_mt) { 1475 u32 mode; 1476 1477 AT_READ_REG(&adapter->hw, REG_MT_MODE, &mode); 1478 if (adapter->rx_queue_count == 4) 1479 mode |= MT_MODE_4Q; 1480 else 1481 mode &= ~MT_MODE_4Q; 1482 AT_WRITE_REG(&adapter->hw, REG_MT_MODE, mode); 1483 } 1484 1485 atl1c_init_ring_ptrs(adapter); 1486 atl1c_set_multi(netdev); 1487 atl1c_restore_vlan(adapter); 1488 1489 for (i = 0; i < adapter->rx_queue_count; ++i) { 1490 num = atl1c_alloc_rx_buffer(adapter, i, false); 1491 if (unlikely(num == 0)) 1492 return -ENOMEM; 1493 } 1494 1495 if (atl1c_configure_mac(adapter)) 1496 return -EIO; 1497 1498 return 0; 1499} 1500 1501static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) 1502{ 1503 u16 hw_reg_addr = 0; 1504 unsigned long *stats_item = NULL; 1505 u32 data; 1506 1507 /* update rx status */ 1508 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1509 stats_item = &adapter->hw_stats.rx_ok; 1510 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1511 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1512 *stats_item += data; 1513 stats_item++; 1514 hw_reg_addr += 4; 1515 } 1516/* update tx status */ 1517 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1518 stats_item = &adapter->hw_stats.tx_ok; 1519 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1520 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1521 *stats_item += data; 1522 stats_item++; 1523 hw_reg_addr += 4; 1524 } 1525} 1526 1527/** 1528 * atl1c_get_stats - Get System Network Statistics 1529 * @netdev: network interface device structure 1530 * 1531 * Returns the address of the device statistics structure. 1532 * The statistics are actually updated from the timer callback. 1533 */ 1534static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) 1535{ 1536 struct atl1c_adapter *adapter = netdev_priv(netdev); 1537 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; 1538 struct net_device_stats *net_stats = &netdev->stats; 1539 1540 atl1c_update_hw_stats(adapter); 1541 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1542 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1543 net_stats->multicast = hw_stats->rx_mcast; 1544 net_stats->collisions = hw_stats->tx_1_col + 1545 hw_stats->tx_2_col + 1546 hw_stats->tx_late_col + 1547 hw_stats->tx_abort_col; 1548 1549 net_stats->rx_errors = hw_stats->rx_frag + 1550 hw_stats->rx_fcs_err + 1551 hw_stats->rx_len_err + 1552 hw_stats->rx_sz_ov + 1553 hw_stats->rx_rrd_ov + 1554 hw_stats->rx_align_err + 1555 hw_stats->rx_rxf_ov; 1556 1557 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1558 net_stats->rx_length_errors = hw_stats->rx_len_err; 1559 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1560 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1561 net_stats->rx_dropped = hw_stats->rx_rrd_ov; 1562 1563 net_stats->tx_errors = hw_stats->tx_late_col + 1564 hw_stats->tx_abort_col + 1565 hw_stats->tx_underrun + 1566 hw_stats->tx_trunc; 1567 1568 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1569 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1570 net_stats->tx_window_errors = hw_stats->tx_late_col; 1571 1572 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors; 1573 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors; 1574 1575 return net_stats; 1576} 1577 1578static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) 1579{ 1580 u16 phy_data; 1581 1582 spin_lock(&adapter->mdio_lock); 1583 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); 1584 spin_unlock(&adapter->mdio_lock); 1585} 1586 1587static int atl1c_clean_tx(struct napi_struct *napi, int budget) 1588{ 1589 struct atl1c_tpd_ring *tpd_ring = 1590 container_of(napi, struct atl1c_tpd_ring, napi); 1591 struct atl1c_adapter *adapter = tpd_ring->adapter; 1592 struct netdev_queue *txq = 1593 netdev_get_tx_queue(napi->dev, tpd_ring->num); 1594 struct atl1c_buffer *buffer_info; 1595 struct pci_dev *pdev = adapter->pdev; 1596 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1597 u16 hw_next_to_clean; 1598 unsigned int total_bytes = 0, total_packets = 0; 1599 unsigned long flags; 1600 1601 AT_READ_REGW(&adapter->hw, atl1c_qregs[tpd_ring->num].tpd_cons, 1602 &hw_next_to_clean); 1603 1604 while (next_to_clean != hw_next_to_clean) { 1605 buffer_info = &tpd_ring->buffer_info[next_to_clean]; 1606 if (buffer_info->skb) { 1607 total_bytes += buffer_info->skb->len; 1608 total_packets++; 1609 } 1610 atl1c_clean_buffer(pdev, buffer_info); 1611 if (++next_to_clean == tpd_ring->count) 1612 next_to_clean = 0; 1613 atomic_set(&tpd_ring->next_to_clean, next_to_clean); 1614 } 1615 1616 netdev_tx_completed_queue(txq, total_packets, total_bytes); 1617 1618 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(adapter->netdev)) 1619 netif_tx_wake_queue(txq); 1620 1621 if (total_packets < budget) { 1622 napi_complete_done(napi, total_packets); 1623 spin_lock_irqsave(&adapter->hw.intr_mask_lock, flags); 1624 adapter->hw.intr_mask |= atl1c_qregs[tpd_ring->num].tx_isr; 1625 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1626 spin_unlock_irqrestore(&adapter->hw.intr_mask_lock, flags); 1627 return total_packets; 1628 } 1629 return budget; 1630} 1631 1632static void atl1c_intr_rx_tx(struct atl1c_adapter *adapter, u32 status) 1633{ 1634 struct atl1c_hw *hw = &adapter->hw; 1635 u32 intr_mask; 1636 int i; 1637 1638 spin_lock(&hw->intr_mask_lock); 1639 intr_mask = hw->intr_mask; 1640 for (i = 0; i < adapter->rx_queue_count; ++i) { 1641 if (!(status & atl1c_qregs[i].rx_isr)) 1642 continue; 1643 if (napi_schedule_prep(&adapter->rrd_ring[i].napi)) { 1644 intr_mask &= ~atl1c_qregs[i].rx_isr; 1645 __napi_schedule(&adapter->rrd_ring[i].napi); 1646 } 1647 } 1648 for (i = 0; i < adapter->tx_queue_count; ++i) { 1649 if (!(status & atl1c_qregs[i].tx_isr)) 1650 continue; 1651 if (napi_schedule_prep(&adapter->tpd_ring[i].napi)) { 1652 intr_mask &= ~atl1c_qregs[i].tx_isr; 1653 __napi_schedule(&adapter->tpd_ring[i].napi); 1654 } 1655 } 1656 1657 if (hw->intr_mask != intr_mask) { 1658 hw->intr_mask = intr_mask; 1659 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); 1660 } 1661 spin_unlock(&hw->intr_mask_lock); 1662} 1663 1664/** 1665 * atl1c_intr - Interrupt Handler 1666 * @irq: interrupt number 1667 * @data: pointer to a network interface device structure 1668 */ 1669static irqreturn_t atl1c_intr(int irq, void *data) 1670{ 1671 struct net_device *netdev = data; 1672 struct atl1c_adapter *adapter = netdev_priv(netdev); 1673 struct pci_dev *pdev = adapter->pdev; 1674 struct atl1c_hw *hw = &adapter->hw; 1675 int max_ints = AT_MAX_INT_WORK; 1676 int handled = IRQ_NONE; 1677 u32 status; 1678 u32 reg_data; 1679 1680 do { 1681 AT_READ_REG(hw, REG_ISR, ®_data); 1682 status = reg_data & hw->intr_mask; 1683 1684 if (status == 0 || (status & ISR_DIS_INT) != 0) { 1685 if (max_ints != AT_MAX_INT_WORK) 1686 handled = IRQ_HANDLED; 1687 break; 1688 } 1689 /* link event */ 1690 if (status & ISR_GPHY) 1691 atl1c_clear_phy_int(adapter); 1692 /* Ack ISR */ 1693 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1694 if (status & (ISR_RX_PKT | ISR_TX_PKT)) 1695 atl1c_intr_rx_tx(adapter, status); 1696 1697 handled = IRQ_HANDLED; 1698 /* check if PCIE PHY Link down */ 1699 if (status & ISR_ERROR) { 1700 if (netif_msg_hw(adapter)) 1701 dev_err(&pdev->dev, 1702 "atl1c hardware error (status = 0x%x)\n", 1703 status & ISR_ERROR); 1704 /* reset MAC */ 1705 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 1706 schedule_work(&adapter->common_task); 1707 return IRQ_HANDLED; 1708 } 1709 1710 if (status & ISR_OVER) 1711 if (netif_msg_intr(adapter)) 1712 dev_warn(&pdev->dev, 1713 "TX/RX overflow (status = 0x%x)\n", 1714 status & ISR_OVER); 1715 1716 /* link event */ 1717 if (status & (ISR_GPHY | ISR_MANUAL)) { 1718 netdev->stats.tx_carrier_errors++; 1719 atl1c_link_chg_event(adapter); 1720 break; 1721 } 1722 1723 } while (--max_ints > 0); 1724 /* re-enable Interrupt*/ 1725 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1726 return handled; 1727} 1728 1729static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, 1730 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) 1731{ 1732 if (adapter->hw.nic_type == athr_mt) { 1733 if (prrs->word3 & RRS_MT_PROT_ID_TCPUDP) 1734 skb->ip_summed = CHECKSUM_UNNECESSARY; 1735 return; 1736 } 1737 /* 1738 * The pid field in RRS in not correct sometimes, so we 1739 * cannot figure out if the packet is fragmented or not, 1740 * so we tell the KERNEL CHECKSUM_NONE 1741 */ 1742 skb_checksum_none_assert(skb); 1743} 1744 1745static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, u32 queue, 1746 bool napi_mode) 1747{ 1748 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[queue]; 1749 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[queue]; 1750 struct pci_dev *pdev = adapter->pdev; 1751 struct atl1c_buffer *buffer_info, *next_info; 1752 struct sk_buff *skb; 1753 void *vir_addr = NULL; 1754 u16 num_alloc = 0; 1755 u16 rfd_next_to_use, next_next; 1756 struct atl1c_rx_free_desc *rfd_desc; 1757 dma_addr_t mapping; 1758 1759 next_next = rfd_next_to_use = rfd_ring->next_to_use; 1760 if (++next_next == rfd_ring->count) 1761 next_next = 0; 1762 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1763 next_info = &rfd_ring->buffer_info[next_next]; 1764 1765 while (next_info->flags & ATL1C_BUFFER_FREE) { 1766 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); 1767 1768 /* When DMA RX address is set to something like 1769 * 0x....fc0, it will be very likely to cause DMA 1770 * RFD overflow issue. 1771 * 1772 * To work around it, we apply rx skb with 64 bytes 1773 * longer space, and offset the address whenever 1774 * 0x....fc0 is detected. 1775 */ 1776 if (likely(napi_mode)) 1777 skb = napi_alloc_skb(&rrd_ring->napi, adapter->rx_buffer_len + 64); 1778 else 1779 skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len + 64); 1780 if (unlikely(!skb)) { 1781 if (netif_msg_rx_err(adapter)) 1782 dev_warn(&pdev->dev, "alloc rx buffer failed\n"); 1783 break; 1784 } 1785 1786 if (((unsigned long)skb->data & 0xfff) == 0xfc0) 1787 skb_reserve(skb, 64); 1788 1789 /* 1790 * Make buffer alignment 2 beyond a 16 byte boundary 1791 * this will result in a 16 byte aligned IP header after 1792 * the 14 byte MAC header is removed 1793 */ 1794 vir_addr = skb->data; 1795 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 1796 buffer_info->skb = skb; 1797 buffer_info->length = adapter->rx_buffer_len; 1798 mapping = dma_map_single(&pdev->dev, vir_addr, 1799 buffer_info->length, DMA_FROM_DEVICE); 1800 if (unlikely(dma_mapping_error(&pdev->dev, mapping))) { 1801 dev_kfree_skb(skb); 1802 buffer_info->skb = NULL; 1803 buffer_info->length = 0; 1804 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 1805 netif_warn(adapter, rx_err, adapter->netdev, "RX dma_map_single failed"); 1806 break; 1807 } 1808 buffer_info->dma = mapping; 1809 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 1810 ATL1C_PCIMAP_FROMDEVICE); 1811 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 1812 rfd_next_to_use = next_next; 1813 if (++next_next == rfd_ring->count) 1814 next_next = 0; 1815 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1816 next_info = &rfd_ring->buffer_info[next_next]; 1817 num_alloc++; 1818 } 1819 1820 if (num_alloc) { 1821 /* TODO: update mailbox here */ 1822 wmb(); 1823 rfd_ring->next_to_use = rfd_next_to_use; 1824 AT_WRITE_REG(&adapter->hw, atl1c_qregs[queue].rfd_prod, 1825 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); 1826 } 1827 1828 return num_alloc; 1829} 1830 1831static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, 1832 struct atl1c_recv_ret_status *rrs, u16 num) 1833{ 1834 u16 i; 1835 /* the relationship between rrd and rfd is one map one */ 1836 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, 1837 rrd_ring->next_to_clean)) { 1838 rrs->word3 &= ~RRS_RXD_UPDATED; 1839 if (++rrd_ring->next_to_clean == rrd_ring->count) 1840 rrd_ring->next_to_clean = 0; 1841 } 1842} 1843 1844static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, 1845 struct atl1c_recv_ret_status *rrs, u16 num) 1846{ 1847 u16 i; 1848 u16 rfd_index; 1849 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; 1850 1851 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1852 RRS_RX_RFD_INDEX_MASK; 1853 for (i = 0; i < num; i++) { 1854 buffer_info[rfd_index].skb = NULL; 1855 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index], 1856 ATL1C_BUFFER_FREE); 1857 if (++rfd_index == rfd_ring->count) 1858 rfd_index = 0; 1859 } 1860 rfd_ring->next_to_clean = rfd_index; 1861} 1862 1863/** 1864 * atl1c_clean_rx - NAPI Rx polling callback 1865 * @napi: napi info 1866 * @budget: limit of packets to clean 1867 */ 1868static int atl1c_clean_rx(struct napi_struct *napi, int budget) 1869{ 1870 struct atl1c_rrd_ring *rrd_ring = 1871 container_of(napi, struct atl1c_rrd_ring, napi); 1872 struct atl1c_adapter *adapter = rrd_ring->adapter; 1873 u16 rfd_num, rfd_index; 1874 u16 length; 1875 struct pci_dev *pdev = adapter->pdev; 1876 struct net_device *netdev = adapter->netdev; 1877 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[rrd_ring->num]; 1878 struct sk_buff *skb; 1879 struct atl1c_recv_ret_status *rrs; 1880 struct atl1c_buffer *buffer_info; 1881 int work_done = 0; 1882 unsigned long flags; 1883 1884 /* Keep link state information with original netdev */ 1885 if (!netif_carrier_ok(adapter->netdev)) 1886 goto quit_polling; 1887 1888 while (1) { 1889 if (work_done >= budget) 1890 break; 1891 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); 1892 if (likely(RRS_RXD_IS_VALID(rrs->word3))) { 1893 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & 1894 RRS_RX_RFD_CNT_MASK; 1895 if (unlikely(rfd_num != 1)) 1896 /* TODO support mul rfd*/ 1897 if (netif_msg_rx_err(adapter)) 1898 dev_warn(&pdev->dev, 1899 "Multi rfd not support yet!\n"); 1900 goto rrs_checked; 1901 } else { 1902 break; 1903 } 1904rrs_checked: 1905 atl1c_clean_rrd(rrd_ring, rrs, rfd_num); 1906 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { 1907 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1908 if (netif_msg_rx_err(adapter)) 1909 dev_warn(&pdev->dev, 1910 "wrong packet! rrs word3 is %x\n", 1911 rrs->word3); 1912 continue; 1913 } 1914 1915 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & 1916 RRS_PKT_SIZE_MASK); 1917 /* Good Receive */ 1918 if (likely(rfd_num == 1)) { 1919 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1920 RRS_RX_RFD_INDEX_MASK; 1921 buffer_info = &rfd_ring->buffer_info[rfd_index]; 1922 dma_unmap_single(&pdev->dev, buffer_info->dma, 1923 buffer_info->length, DMA_FROM_DEVICE); 1924 skb = buffer_info->skb; 1925 } else { 1926 /* TODO */ 1927 if (netif_msg_rx_err(adapter)) 1928 dev_warn(&pdev->dev, 1929 "Multi rfd not support yet!\n"); 1930 break; 1931 } 1932 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1933 skb_put(skb, length - ETH_FCS_LEN); 1934 skb->protocol = eth_type_trans(skb, netdev); 1935 atl1c_rx_checksum(adapter, skb, rrs); 1936 if (rrs->word3 & RRS_VLAN_INS) { 1937 u16 vlan; 1938 1939 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); 1940 vlan = le16_to_cpu(vlan); 1941 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan); 1942 } 1943 napi_gro_receive(napi, skb); 1944 1945 work_done++; 1946 } 1947 if (work_done) 1948 atl1c_alloc_rx_buffer(adapter, rrd_ring->num, true); 1949 1950 if (work_done < budget) { 1951quit_polling: 1952 napi_complete_done(napi, work_done); 1953 spin_lock_irqsave(&adapter->hw.intr_mask_lock, flags); 1954 adapter->hw.intr_mask |= atl1c_qregs[rrd_ring->num].rx_isr; 1955 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1956 spin_unlock_irqrestore(&adapter->hw.intr_mask_lock, flags); 1957 } 1958 return work_done; 1959} 1960 1961#ifdef CONFIG_NET_POLL_CONTROLLER 1962 1963/* 1964 * Polling 'interrupt' - used by things like netconsole to send skbs 1965 * without having to re-enable interrupts. It's not called while 1966 * the interrupt routine is executing. 1967 */ 1968static void atl1c_netpoll(struct net_device *netdev) 1969{ 1970 struct atl1c_adapter *adapter = netdev_priv(netdev); 1971 1972 disable_irq(adapter->pdev->irq); 1973 atl1c_intr(adapter->pdev->irq, netdev); 1974 enable_irq(adapter->pdev->irq); 1975} 1976#endif 1977 1978static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, u32 queue) 1979{ 1980 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue]; 1981 u16 next_to_use = 0; 1982 u16 next_to_clean = 0; 1983 1984 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1985 next_to_use = tpd_ring->next_to_use; 1986 1987 return (u16)(next_to_clean > next_to_use) ? 1988 (next_to_clean - next_to_use - 1) : 1989 (tpd_ring->count + next_to_clean - next_to_use - 1); 1990} 1991 1992/* 1993 * get next usable tpd 1994 * Note: should call atl1c_tdp_avail to make sure 1995 * there is enough tpd to use 1996 */ 1997static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, 1998 u32 queue) 1999{ 2000 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue]; 2001 struct atl1c_tpd_desc *tpd_desc; 2002 u16 next_to_use = 0; 2003 2004 next_to_use = tpd_ring->next_to_use; 2005 if (++tpd_ring->next_to_use == tpd_ring->count) 2006 tpd_ring->next_to_use = 0; 2007 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); 2008 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); 2009 return tpd_desc; 2010} 2011 2012static struct atl1c_buffer * 2013atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) 2014{ 2015 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 2016 2017 return &tpd_ring->buffer_info[tpd - 2018 (struct atl1c_tpd_desc *)tpd_ring->desc]; 2019} 2020 2021/* Calculate the transmit packet descript needed*/ 2022static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) 2023{ 2024 u16 tpd_req; 2025 u16 proto_hdr_len = 0; 2026 2027 tpd_req = skb_shinfo(skb)->nr_frags + 1; 2028 2029 if (skb_is_gso(skb)) { 2030 proto_hdr_len = skb_tcp_all_headers(skb); 2031 if (proto_hdr_len < skb_headlen(skb)) 2032 tpd_req++; 2033 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) 2034 tpd_req++; 2035 } 2036 return tpd_req; 2037} 2038 2039static int atl1c_tso_csum(struct atl1c_adapter *adapter, 2040 struct sk_buff *skb, 2041 struct atl1c_tpd_desc **tpd, 2042 u32 queue) 2043{ 2044 struct pci_dev *pdev = adapter->pdev; 2045 unsigned short offload_type; 2046 u8 hdr_len; 2047 u32 real_len; 2048 2049 if (skb_is_gso(skb)) { 2050 int err; 2051 2052 err = skb_cow_head(skb, 0); 2053 if (err < 0) 2054 return err; 2055 2056 offload_type = skb_shinfo(skb)->gso_type; 2057 2058 if (offload_type & SKB_GSO_TCPV4) { 2059 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 2060 + ntohs(ip_hdr(skb)->tot_len)); 2061 2062 if (real_len < skb->len) { 2063 err = pskb_trim(skb, real_len); 2064 if (err) 2065 return err; 2066 } 2067 2068 hdr_len = skb_tcp_all_headers(skb); 2069 if (unlikely(skb->len == hdr_len)) { 2070 /* only xsum need */ 2071 if (netif_msg_tx_queued(adapter)) 2072 dev_warn(&pdev->dev, 2073 "IPV4 tso with zero data??\n"); 2074 goto check_sum; 2075 } else { 2076 ip_hdr(skb)->check = 0; 2077 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 2078 ip_hdr(skb)->saddr, 2079 ip_hdr(skb)->daddr, 2080 0, IPPROTO_TCP, 0); 2081 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; 2082 } 2083 } 2084 2085 if (offload_type & SKB_GSO_TCPV6) { 2086 struct atl1c_tpd_ext_desc *etpd = 2087 *(struct atl1c_tpd_ext_desc **)(tpd); 2088 2089 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); 2090 *tpd = atl1c_get_tpd(adapter, queue); 2091 ipv6_hdr(skb)->payload_len = 0; 2092 /* check payload == 0 byte ? */ 2093 hdr_len = skb_tcp_all_headers(skb); 2094 if (unlikely(skb->len == hdr_len)) { 2095 /* only xsum need */ 2096 if (netif_msg_tx_queued(adapter)) 2097 dev_warn(&pdev->dev, 2098 "IPV6 tso with zero data??\n"); 2099 goto check_sum; 2100 } else 2101 tcp_v6_gso_csum_prep(skb); 2102 2103 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; 2104 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; 2105 etpd->pkt_len = cpu_to_le32(skb->len); 2106 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; 2107 } 2108 2109 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; 2110 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << 2111 TPD_TCPHDR_OFFSET_SHIFT; 2112 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << 2113 TPD_MSS_SHIFT; 2114 return 0; 2115 } 2116 2117check_sum: 2118 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 2119 u8 css, cso; 2120 cso = skb_checksum_start_offset(skb); 2121 2122 if (unlikely(cso & 0x1)) { 2123 if (netif_msg_tx_err(adapter)) 2124 dev_err(&adapter->pdev->dev, 2125 "payload offset should not an event number\n"); 2126 return -1; 2127 } else { 2128 css = cso + skb->csum_offset; 2129 2130 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << 2131 TPD_PLOADOFFSET_SHIFT; 2132 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << 2133 TPD_CCSUM_OFFSET_SHIFT; 2134 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; 2135 } 2136 } 2137 return 0; 2138} 2139 2140static void atl1c_tx_rollback(struct atl1c_adapter *adpt, 2141 struct atl1c_tpd_desc *first_tpd, 2142 u32 queue) 2143{ 2144 struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[queue]; 2145 struct atl1c_buffer *buffer_info; 2146 struct atl1c_tpd_desc *tpd; 2147 u16 first_index, index; 2148 2149 first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc; 2150 index = first_index; 2151 while (index != tpd_ring->next_to_use) { 2152 tpd = ATL1C_TPD_DESC(tpd_ring, index); 2153 buffer_info = &tpd_ring->buffer_info[index]; 2154 atl1c_clean_buffer(adpt->pdev, buffer_info); 2155 memset(tpd, 0, sizeof(struct atl1c_tpd_desc)); 2156 if (++index == tpd_ring->count) 2157 index = 0; 2158 } 2159 tpd_ring->next_to_use = first_index; 2160} 2161 2162static int atl1c_tx_map(struct atl1c_adapter *adapter, 2163 struct sk_buff *skb, struct atl1c_tpd_desc *tpd, 2164 u32 queue) 2165{ 2166 struct atl1c_tpd_desc *use_tpd = NULL; 2167 struct atl1c_buffer *buffer_info = NULL; 2168 u16 buf_len = skb_headlen(skb); 2169 u16 map_len = 0; 2170 u16 mapped_len = 0; 2171 u16 hdr_len = 0; 2172 u16 nr_frags; 2173 u16 f; 2174 int tso; 2175 2176 nr_frags = skb_shinfo(skb)->nr_frags; 2177 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; 2178 if (tso) { 2179 /* TSO */ 2180 hdr_len = skb_tcp_all_headers(skb); 2181 map_len = hdr_len; 2182 use_tpd = tpd; 2183 2184 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2185 buffer_info->length = map_len; 2186 buffer_info->dma = dma_map_single(&adapter->pdev->dev, 2187 skb->data, hdr_len, 2188 DMA_TO_DEVICE); 2189 if (unlikely(dma_mapping_error(&adapter->pdev->dev, buffer_info->dma))) 2190 goto err_dma; 2191 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2192 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2193 ATL1C_PCIMAP_TODEVICE); 2194 mapped_len += map_len; 2195 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2196 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2197 } 2198 2199 if (mapped_len < buf_len) { 2200 /* mapped_len == 0, means we should use the first tpd, 2201 which is given by caller */ 2202 if (mapped_len == 0) 2203 use_tpd = tpd; 2204 else { 2205 use_tpd = atl1c_get_tpd(adapter, queue); 2206 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2207 } 2208 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2209 buffer_info->length = buf_len - mapped_len; 2210 buffer_info->dma = 2211 dma_map_single(&adapter->pdev->dev, 2212 skb->data + mapped_len, 2213 buffer_info->length, DMA_TO_DEVICE); 2214 if (unlikely(dma_mapping_error(&adapter->pdev->dev, buffer_info->dma))) 2215 goto err_dma; 2216 2217 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2218 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2219 ATL1C_PCIMAP_TODEVICE); 2220 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2221 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2222 } 2223 2224 for (f = 0; f < nr_frags; f++) { 2225 skb_frag_t *frag = &skb_shinfo(skb)->frags[f]; 2226 2227 use_tpd = atl1c_get_tpd(adapter, queue); 2228 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2229 2230 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2231 buffer_info->length = skb_frag_size(frag); 2232 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev, 2233 frag, 0, 2234 buffer_info->length, 2235 DMA_TO_DEVICE); 2236 if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) 2237 goto err_dma; 2238 2239 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2240 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, 2241 ATL1C_PCIMAP_TODEVICE); 2242 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2243 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2244 } 2245 2246 /* The last tpd */ 2247 use_tpd->word1 |= 1 << TPD_EOP_SHIFT; 2248 /* The last buffer info contain the skb address, 2249 so it will be free after unmap */ 2250 buffer_info->skb = skb; 2251 2252 return 0; 2253 2254err_dma: 2255 buffer_info->dma = 0; 2256 buffer_info->length = 0; 2257 return -1; 2258} 2259 2260static void atl1c_tx_queue(struct atl1c_adapter *adapter, u32 queue) 2261{ 2262 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue]; 2263 2264 AT_WRITE_REGW(&adapter->hw, atl1c_qregs[queue].tpd_prod, 2265 tpd_ring->next_to_use); 2266} 2267 2268static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb, 2269 struct net_device *netdev) 2270{ 2271 struct atl1c_adapter *adapter = netdev_priv(netdev); 2272 u32 queue = skb_get_queue_mapping(skb); 2273 struct netdev_queue *txq = netdev_get_tx_queue(netdev, queue); 2274 struct atl1c_tpd_desc *tpd; 2275 u16 tpd_req; 2276 2277 if (test_bit(__AT_DOWN, &adapter->flags)) { 2278 dev_kfree_skb_any(skb); 2279 return NETDEV_TX_OK; 2280 } 2281 2282 tpd_req = atl1c_cal_tpd_req(skb); 2283 2284 if (atl1c_tpd_avail(adapter, queue) < tpd_req) { 2285 /* no enough descriptor, just stop queue */ 2286 atl1c_tx_queue(adapter, queue); 2287 netif_tx_stop_queue(txq); 2288 return NETDEV_TX_BUSY; 2289 } 2290 2291 tpd = atl1c_get_tpd(adapter, queue); 2292 2293 /* do TSO and check sum */ 2294 if (atl1c_tso_csum(adapter, skb, &tpd, queue) != 0) { 2295 atl1c_tx_queue(adapter, queue); 2296 dev_kfree_skb_any(skb); 2297 return NETDEV_TX_OK; 2298 } 2299 2300 if (unlikely(skb_vlan_tag_present(skb))) { 2301 u16 vlan = skb_vlan_tag_get(skb); 2302 __le16 tag; 2303 2304 vlan = cpu_to_le16(vlan); 2305 AT_VLAN_TO_TAG(vlan, tag); 2306 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; 2307 tpd->vlan_tag = tag; 2308 } 2309 2310 if (skb_network_offset(skb) != ETH_HLEN) 2311 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ 2312 2313 if (atl1c_tx_map(adapter, skb, tpd, queue) < 0) { 2314 netif_info(adapter, tx_done, adapter->netdev, 2315 "tx-skb dropped due to dma error\n"); 2316 /* roll back tpd/buffer */ 2317 atl1c_tx_rollback(adapter, tpd, queue); 2318 dev_kfree_skb_any(skb); 2319 } else { 2320 bool more = netdev_xmit_more(); 2321 2322 if (__netdev_tx_sent_queue(txq, skb->len, more)) 2323 atl1c_tx_queue(adapter, queue); 2324 } 2325 2326 return NETDEV_TX_OK; 2327} 2328 2329static void atl1c_free_irq(struct atl1c_adapter *adapter) 2330{ 2331 struct net_device *netdev = adapter->netdev; 2332 2333 free_irq(adapter->pdev->irq, netdev); 2334 2335 if (adapter->have_msi) 2336 pci_disable_msi(adapter->pdev); 2337} 2338 2339static int atl1c_request_irq(struct atl1c_adapter *adapter) 2340{ 2341 struct pci_dev *pdev = adapter->pdev; 2342 struct net_device *netdev = adapter->netdev; 2343 int flags = 0; 2344 int err = 0; 2345 2346 adapter->have_msi = true; 2347 err = pci_enable_msi(adapter->pdev); 2348 if (err) { 2349 if (netif_msg_ifup(adapter)) 2350 dev_err(&pdev->dev, 2351 "Unable to allocate MSI interrupt Error: %d\n", 2352 err); 2353 adapter->have_msi = false; 2354 } 2355 2356 if (!adapter->have_msi) 2357 flags |= IRQF_SHARED; 2358 err = request_irq(adapter->pdev->irq, atl1c_intr, flags, 2359 netdev->name, netdev); 2360 if (err) { 2361 if (netif_msg_ifup(adapter)) 2362 dev_err(&pdev->dev, 2363 "Unable to allocate interrupt Error: %d\n", 2364 err); 2365 if (adapter->have_msi) 2366 pci_disable_msi(adapter->pdev); 2367 return err; 2368 } 2369 if (netif_msg_ifup(adapter)) 2370 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); 2371 return err; 2372} 2373 2374 2375static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter) 2376{ 2377 int i; 2378 /* release tx-pending skbs and reset tx/rx ring index */ 2379 for (i = 0; i < adapter->tx_queue_count; ++i) 2380 atl1c_clean_tx_ring(adapter, i); 2381 for (i = 0; i < adapter->rx_queue_count; ++i) 2382 atl1c_clean_rx_ring(adapter, i); 2383} 2384 2385static int atl1c_up(struct atl1c_adapter *adapter) 2386{ 2387 struct net_device *netdev = adapter->netdev; 2388 int err; 2389 int i; 2390 2391 netif_carrier_off(netdev); 2392 2393 err = atl1c_configure(adapter); 2394 if (unlikely(err)) 2395 goto err_up; 2396 2397 err = atl1c_request_irq(adapter); 2398 if (unlikely(err)) 2399 goto err_up; 2400 2401 atl1c_check_link_status(adapter); 2402 clear_bit(__AT_DOWN, &adapter->flags); 2403 for (i = 0; i < adapter->tx_queue_count; ++i) 2404 napi_enable(&adapter->tpd_ring[i].napi); 2405 for (i = 0; i < adapter->rx_queue_count; ++i) 2406 napi_enable(&adapter->rrd_ring[i].napi); 2407 atl1c_irq_enable(adapter); 2408 netif_start_queue(netdev); 2409 return err; 2410 2411err_up: 2412 for (i = 0; i < adapter->rx_queue_count; ++i) 2413 atl1c_clean_rx_ring(adapter, i); 2414 return err; 2415} 2416 2417static void atl1c_down(struct atl1c_adapter *adapter) 2418{ 2419 struct net_device *netdev = adapter->netdev; 2420 int i; 2421 2422 atl1c_del_timer(adapter); 2423 adapter->work_event = 0; /* clear all event */ 2424 /* signal that we're down so the interrupt handler does not 2425 * reschedule our watchdog timer */ 2426 set_bit(__AT_DOWN, &adapter->flags); 2427 netif_carrier_off(netdev); 2428 for (i = 0; i < adapter->tx_queue_count; ++i) 2429 napi_disable(&adapter->tpd_ring[i].napi); 2430 for (i = 0; i < adapter->rx_queue_count; ++i) 2431 napi_disable(&adapter->rrd_ring[i].napi); 2432 atl1c_irq_disable(adapter); 2433 atl1c_free_irq(adapter); 2434 /* disable ASPM if device inactive */ 2435 atl1c_disable_l0s_l1(&adapter->hw); 2436 /* reset MAC to disable all RX/TX */ 2437 atl1c_reset_mac(&adapter->hw); 2438 msleep(1); 2439 2440 adapter->link_speed = SPEED_0; 2441 adapter->link_duplex = -1; 2442 atl1c_reset_dma_ring(adapter); 2443} 2444 2445/** 2446 * atl1c_open - Called when a network interface is made active 2447 * @netdev: network interface device structure 2448 * 2449 * Returns 0 on success, negative value on failure 2450 * 2451 * The open entry point is called when a network interface is made 2452 * active by the system (IFF_UP). At this point all resources needed 2453 * for transmit and receive operations are allocated, the interrupt 2454 * handler is registered with the OS, the watchdog timer is started, 2455 * and the stack is notified that the interface is ready. 2456 */ 2457static int atl1c_open(struct net_device *netdev) 2458{ 2459 struct atl1c_adapter *adapter = netdev_priv(netdev); 2460 int err; 2461 2462 /* disallow open during test */ 2463 if (test_bit(__AT_TESTING, &adapter->flags)) 2464 return -EBUSY; 2465 2466 /* allocate rx/tx dma buffer & descriptors */ 2467 err = atl1c_setup_ring_resources(adapter); 2468 if (unlikely(err)) 2469 return err; 2470 2471 err = atl1c_up(adapter); 2472 if (unlikely(err)) 2473 goto err_up; 2474 2475 return 0; 2476 2477err_up: 2478 atl1c_free_irq(adapter); 2479 atl1c_free_ring_resources(adapter); 2480 atl1c_reset_mac(&adapter->hw); 2481 return err; 2482} 2483 2484/** 2485 * atl1c_close - Disables a network interface 2486 * @netdev: network interface device structure 2487 * 2488 * Returns 0, this is not allowed to fail 2489 * 2490 * The close entry point is called when an interface is de-activated 2491 * by the OS. The hardware is still under the drivers control, but 2492 * needs to be disabled. A global MAC reset is issued to stop the 2493 * hardware, and all transmit and receive resources are freed. 2494 */ 2495static int atl1c_close(struct net_device *netdev) 2496{ 2497 struct atl1c_adapter *adapter = netdev_priv(netdev); 2498 2499 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2500 set_bit(__AT_DOWN, &adapter->flags); 2501 cancel_work_sync(&adapter->common_task); 2502 atl1c_down(adapter); 2503 atl1c_free_ring_resources(adapter); 2504 return 0; 2505} 2506 2507static int atl1c_suspend(struct device *dev) 2508{ 2509 struct net_device *netdev = dev_get_drvdata(dev); 2510 struct atl1c_adapter *adapter = netdev_priv(netdev); 2511 struct atl1c_hw *hw = &adapter->hw; 2512 u32 wufc = adapter->wol; 2513 2514 atl1c_disable_l0s_l1(hw); 2515 if (netif_running(netdev)) { 2516 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2517 atl1c_down(adapter); 2518 } 2519 netif_device_detach(netdev); 2520 2521 if (wufc) 2522 if (atl1c_phy_to_ps_link(hw) != 0) 2523 dev_dbg(dev, "phy power saving failed"); 2524 2525 atl1c_power_saving(hw, wufc); 2526 2527 return 0; 2528} 2529 2530#ifdef CONFIG_PM_SLEEP 2531static int atl1c_resume(struct device *dev) 2532{ 2533 struct net_device *netdev = dev_get_drvdata(dev); 2534 struct atl1c_adapter *adapter = netdev_priv(netdev); 2535 2536 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2537 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2538 2539 atl1c_phy_reset(&adapter->hw); 2540 atl1c_reset_mac(&adapter->hw); 2541 atl1c_phy_init(&adapter->hw); 2542 2543 netif_device_attach(netdev); 2544 if (netif_running(netdev)) 2545 atl1c_up(adapter); 2546 2547 return 0; 2548} 2549#endif 2550 2551static void atl1c_shutdown(struct pci_dev *pdev) 2552{ 2553 struct net_device *netdev = pci_get_drvdata(pdev); 2554 struct atl1c_adapter *adapter = netdev_priv(netdev); 2555 2556 atl1c_suspend(&pdev->dev); 2557 pci_wake_from_d3(pdev, adapter->wol); 2558 pci_set_power_state(pdev, PCI_D3hot); 2559} 2560 2561static const struct net_device_ops atl1c_netdev_ops = { 2562 .ndo_open = atl1c_open, 2563 .ndo_stop = atl1c_close, 2564 .ndo_validate_addr = eth_validate_addr, 2565 .ndo_start_xmit = atl1c_xmit_frame, 2566 .ndo_set_mac_address = atl1c_set_mac_addr, 2567 .ndo_set_rx_mode = atl1c_set_multi, 2568 .ndo_change_mtu = atl1c_change_mtu, 2569 .ndo_fix_features = atl1c_fix_features, 2570 .ndo_set_features = atl1c_set_features, 2571 .ndo_eth_ioctl = atl1c_ioctl, 2572 .ndo_tx_timeout = atl1c_tx_timeout, 2573 .ndo_get_stats = atl1c_get_stats, 2574#ifdef CONFIG_NET_POLL_CONTROLLER 2575 .ndo_poll_controller = atl1c_netpoll, 2576#endif 2577}; 2578 2579static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2580{ 2581 SET_NETDEV_DEV(netdev, &pdev->dev); 2582 pci_set_drvdata(pdev, netdev); 2583 2584 netdev->netdev_ops = &atl1c_netdev_ops; 2585 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2586 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN); 2587 atl1c_set_ethtool_ops(netdev); 2588 2589 /* TODO: add when ready */ 2590 netdev->hw_features = NETIF_F_SG | 2591 NETIF_F_HW_CSUM | 2592 NETIF_F_HW_VLAN_CTAG_RX | 2593 NETIF_F_TSO | 2594 NETIF_F_TSO6; 2595 netdev->features = netdev->hw_features | 2596 NETIF_F_HW_VLAN_CTAG_TX; 2597 return 0; 2598} 2599 2600/** 2601 * atl1c_probe - Device Initialization Routine 2602 * @pdev: PCI device information struct 2603 * @ent: entry in atl1c_pci_tbl 2604 * 2605 * Returns 0 on success, negative on failure 2606 * 2607 * atl1c_probe initializes an adapter identified by a pci_dev structure. 2608 * The OS initialization, configuring of the adapter private structure, 2609 * and a hardware reset occur. 2610 */ 2611static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2612{ 2613 struct net_device *netdev; 2614 struct atl1c_adapter *adapter; 2615 static int cards_found; 2616 u8 __iomem *hw_addr; 2617 enum atl1c_nic_type nic_type; 2618 u32 queue_count = 1; 2619 int err = 0; 2620 int i; 2621 2622 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 2623 err = pci_enable_device_mem(pdev); 2624 if (err) 2625 return dev_err_probe(&pdev->dev, err, "cannot enable PCI device\n"); 2626 2627 /* 2628 * The atl1c chip can DMA to 64-bit addresses, but it uses a single 2629 * shared register for the high 32 bits, so only a single, aligned, 2630 * 4 GB physical address range can be used at a time. 2631 * 2632 * Supporting 64-bit DMA on this hardware is more trouble than it's 2633 * worth. It is far easier to limit to 32-bit DMA than update 2634 * various kernel subsystems to support the mechanics required by a 2635 * fixed-high-32-bit system. 2636 */ 2637 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 2638 if (err) { 2639 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2640 goto err_dma; 2641 } 2642 2643 err = pci_request_regions(pdev, atl1c_driver_name); 2644 if (err) { 2645 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2646 goto err_pci_reg; 2647 } 2648 2649 pci_set_master(pdev); 2650 2651 hw_addr = pci_ioremap_bar(pdev, 0); 2652 if (!hw_addr) { 2653 err = -EIO; 2654 dev_err(&pdev->dev, "cannot map device registers\n"); 2655 goto err_ioremap; 2656 } 2657 2658 nic_type = atl1c_get_mac_type(pdev, hw_addr); 2659 if (nic_type == athr_mt) 2660 queue_count = 4; 2661 2662 netdev = alloc_etherdev_mq(sizeof(struct atl1c_adapter), queue_count); 2663 if (netdev == NULL) { 2664 err = -ENOMEM; 2665 goto err_alloc_etherdev; 2666 } 2667 2668 err = atl1c_init_netdev(netdev, pdev); 2669 if (err) { 2670 dev_err(&pdev->dev, "init netdevice failed\n"); 2671 goto err_init_netdev; 2672 } 2673 adapter = netdev_priv(netdev); 2674 adapter->bd_number = cards_found; 2675 adapter->netdev = netdev; 2676 adapter->pdev = pdev; 2677 adapter->hw.adapter = adapter; 2678 adapter->hw.nic_type = nic_type; 2679 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); 2680 adapter->hw.hw_addr = hw_addr; 2681 adapter->tx_queue_count = queue_count; 2682 adapter->rx_queue_count = queue_count; 2683 2684 /* init mii data */ 2685 adapter->mii.dev = netdev; 2686 adapter->mii.mdio_read = atl1c_mdio_read; 2687 adapter->mii.mdio_write = atl1c_mdio_write; 2688 adapter->mii.phy_id_mask = 0x1f; 2689 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK; 2690 dev_set_threaded(netdev, true); 2691 for (i = 0; i < adapter->rx_queue_count; ++i) 2692 netif_napi_add(netdev, &adapter->rrd_ring[i].napi, 2693 atl1c_clean_rx); 2694 for (i = 0; i < adapter->tx_queue_count; ++i) 2695 netif_napi_add_tx(netdev, &adapter->tpd_ring[i].napi, 2696 atl1c_clean_tx); 2697 timer_setup(&adapter->phy_config_timer, atl1c_phy_config, 0); 2698 /* setup the private structure */ 2699 err = atl1c_sw_init(adapter); 2700 if (err) { 2701 dev_err(&pdev->dev, "net device private data init failed\n"); 2702 goto err_sw_init; 2703 } 2704 /* set max MTU */ 2705 atl1c_set_max_mtu(netdev); 2706 2707 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2708 2709 /* Init GPHY as early as possible due to power saving issue */ 2710 atl1c_phy_reset(&adapter->hw); 2711 2712 err = atl1c_reset_mac(&adapter->hw); 2713 if (err) { 2714 err = -EIO; 2715 goto err_reset; 2716 } 2717 2718 /* reset the controller to 2719 * put the device in a known good starting state */ 2720 err = atl1c_phy_init(&adapter->hw); 2721 if (err) { 2722 err = -EIO; 2723 goto err_reset; 2724 } 2725 if (atl1c_read_mac_addr(&adapter->hw)) { 2726 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */ 2727 netdev->addr_assign_type = NET_ADDR_RANDOM; 2728 } 2729 eth_hw_addr_set(netdev, adapter->hw.mac_addr); 2730 if (netif_msg_probe(adapter)) 2731 dev_dbg(&pdev->dev, "mac address : %pM\n", 2732 adapter->hw.mac_addr); 2733 2734 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 2735 INIT_WORK(&adapter->common_task, atl1c_common_task); 2736 adapter->work_event = 0; 2737 err = register_netdev(netdev); 2738 if (err) { 2739 dev_err(&pdev->dev, "register netdevice failed\n"); 2740 goto err_register; 2741 } 2742 2743 cards_found++; 2744 return 0; 2745 2746err_reset: 2747err_register: 2748err_sw_init: 2749err_init_netdev: 2750 free_netdev(netdev); 2751err_alloc_etherdev: 2752 iounmap(hw_addr); 2753err_ioremap: 2754 pci_release_regions(pdev); 2755err_pci_reg: 2756err_dma: 2757 pci_disable_device(pdev); 2758 return err; 2759} 2760 2761/** 2762 * atl1c_remove - Device Removal Routine 2763 * @pdev: PCI device information struct 2764 * 2765 * atl1c_remove is called by the PCI subsystem to alert the driver 2766 * that it should release a PCI device. The could be caused by a 2767 * Hot-Plug event, or because the driver is going to be removed from 2768 * memory. 2769 */ 2770static void atl1c_remove(struct pci_dev *pdev) 2771{ 2772 struct net_device *netdev = pci_get_drvdata(pdev); 2773 struct atl1c_adapter *adapter = netdev_priv(netdev); 2774 2775 unregister_netdev(netdev); 2776 /* restore permanent address */ 2777 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr); 2778 atl1c_phy_disable(&adapter->hw); 2779 2780 iounmap(adapter->hw.hw_addr); 2781 2782 pci_release_regions(pdev); 2783 pci_disable_device(pdev); 2784 free_netdev(netdev); 2785} 2786 2787/** 2788 * atl1c_io_error_detected - called when PCI error is detected 2789 * @pdev: Pointer to PCI device 2790 * @state: The current pci connection state 2791 * 2792 * This function is called after a PCI bus error affecting 2793 * this device has been detected. 2794 */ 2795static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, 2796 pci_channel_state_t state) 2797{ 2798 struct net_device *netdev = pci_get_drvdata(pdev); 2799 struct atl1c_adapter *adapter = netdev_priv(netdev); 2800 2801 netif_device_detach(netdev); 2802 2803 if (state == pci_channel_io_perm_failure) 2804 return PCI_ERS_RESULT_DISCONNECT; 2805 2806 if (netif_running(netdev)) 2807 atl1c_down(adapter); 2808 2809 pci_disable_device(pdev); 2810 2811 /* Request a slot reset. */ 2812 return PCI_ERS_RESULT_NEED_RESET; 2813} 2814 2815/** 2816 * atl1c_io_slot_reset - called after the pci bus has been reset. 2817 * @pdev: Pointer to PCI device 2818 * 2819 * Restart the card from scratch, as if from a cold-boot. Implementation 2820 * resembles the first-half of the e1000_resume routine. 2821 */ 2822static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) 2823{ 2824 struct net_device *netdev = pci_get_drvdata(pdev); 2825 struct atl1c_adapter *adapter = netdev_priv(netdev); 2826 2827 if (pci_enable_device(pdev)) { 2828 if (netif_msg_hw(adapter)) 2829 dev_err(&pdev->dev, 2830 "Cannot re-enable PCI device after reset\n"); 2831 return PCI_ERS_RESULT_DISCONNECT; 2832 } 2833 pci_set_master(pdev); 2834 2835 pci_enable_wake(pdev, PCI_D3hot, 0); 2836 pci_enable_wake(pdev, PCI_D3cold, 0); 2837 2838 atl1c_reset_mac(&adapter->hw); 2839 2840 return PCI_ERS_RESULT_RECOVERED; 2841} 2842 2843/** 2844 * atl1c_io_resume - called when traffic can start flowing again. 2845 * @pdev: Pointer to PCI device 2846 * 2847 * This callback is called when the error recovery driver tells us that 2848 * its OK to resume normal operation. Implementation resembles the 2849 * second-half of the atl1c_resume routine. 2850 */ 2851static void atl1c_io_resume(struct pci_dev *pdev) 2852{ 2853 struct net_device *netdev = pci_get_drvdata(pdev); 2854 struct atl1c_adapter *adapter = netdev_priv(netdev); 2855 2856 if (netif_running(netdev)) { 2857 if (atl1c_up(adapter)) { 2858 if (netif_msg_hw(adapter)) 2859 dev_err(&pdev->dev, 2860 "Cannot bring device back up after reset\n"); 2861 return; 2862 } 2863 } 2864 2865 netif_device_attach(netdev); 2866} 2867 2868static const struct pci_error_handlers atl1c_err_handler = { 2869 .error_detected = atl1c_io_error_detected, 2870 .slot_reset = atl1c_io_slot_reset, 2871 .resume = atl1c_io_resume, 2872}; 2873 2874static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume); 2875 2876static struct pci_driver atl1c_driver = { 2877 .name = atl1c_driver_name, 2878 .id_table = atl1c_pci_tbl, 2879 .probe = atl1c_probe, 2880 .remove = atl1c_remove, 2881 .shutdown = atl1c_shutdown, 2882 .err_handler = &atl1c_err_handler, 2883 .driver.pm = &atl1c_pm_ops, 2884}; 2885 2886module_pci_driver(atl1c_driver); 2887