162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Marvell 88e6xxx Ethernet switch PHY and PPU support
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (c) 2008 Marvell Semiconductor
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
862306a36Sopenharmony_ci */
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci#include <linux/mdio.h>
1162306a36Sopenharmony_ci#include <linux/module.h>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci#include "chip.h"
1462306a36Sopenharmony_ci#include "phy.h"
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ciint mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
1762306a36Sopenharmony_ci		       int addr, int reg, u16 *val)
1862306a36Sopenharmony_ci{
1962306a36Sopenharmony_ci	return mv88e6xxx_read(chip, addr, reg, val);
2062306a36Sopenharmony_ci}
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ciint mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
2362306a36Sopenharmony_ci			int addr, int reg, u16 val)
2462306a36Sopenharmony_ci{
2562306a36Sopenharmony_ci	return mv88e6xxx_write(chip, addr, reg, val);
2662306a36Sopenharmony_ci}
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ciint mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val)
2962306a36Sopenharmony_ci{
3062306a36Sopenharmony_ci	int addr = phy; /* PHY devices addresses start at 0x0 */
3162306a36Sopenharmony_ci	struct mii_bus *bus;
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci	bus = mv88e6xxx_default_mdio_bus(chip);
3462306a36Sopenharmony_ci	if (!bus)
3562306a36Sopenharmony_ci		return -EOPNOTSUPP;
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci	if (!chip->info->ops->phy_read)
3862306a36Sopenharmony_ci		return -EOPNOTSUPP;
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci	return chip->info->ops->phy_read(chip, bus, addr, reg, val);
4162306a36Sopenharmony_ci}
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ciint mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)
4462306a36Sopenharmony_ci{
4562306a36Sopenharmony_ci	int addr = phy; /* PHY devices addresses start at 0x0 */
4662306a36Sopenharmony_ci	struct mii_bus *bus;
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci	bus = mv88e6xxx_default_mdio_bus(chip);
4962306a36Sopenharmony_ci	if (!bus)
5062306a36Sopenharmony_ci		return -EOPNOTSUPP;
5162306a36Sopenharmony_ci
5262306a36Sopenharmony_ci	if (!chip->info->ops->phy_write)
5362306a36Sopenharmony_ci		return -EOPNOTSUPP;
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci	return chip->info->ops->phy_write(chip, bus, addr, reg, val);
5662306a36Sopenharmony_ci}
5762306a36Sopenharmony_ci
5862306a36Sopenharmony_ciint mv88e6xxx_phy_read_c45(struct mv88e6xxx_chip *chip, int phy, int devad,
5962306a36Sopenharmony_ci			   int reg, u16 *val)
6062306a36Sopenharmony_ci{
6162306a36Sopenharmony_ci	int addr = phy; /* PHY devices addresses start at 0x0 */
6262306a36Sopenharmony_ci	struct mii_bus *bus;
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci	bus = mv88e6xxx_default_mdio_bus(chip);
6562306a36Sopenharmony_ci	if (!bus)
6662306a36Sopenharmony_ci		return -EOPNOTSUPP;
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci	if (!chip->info->ops->phy_read_c45)
6962306a36Sopenharmony_ci		return -EOPNOTSUPP;
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_ci	return chip->info->ops->phy_read_c45(chip, bus, addr, devad, reg, val);
7262306a36Sopenharmony_ci}
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ciint mv88e6xxx_phy_write_c45(struct mv88e6xxx_chip *chip, int phy, int devad,
7562306a36Sopenharmony_ci			    int reg, u16 val)
7662306a36Sopenharmony_ci{
7762306a36Sopenharmony_ci	int addr = phy; /* PHY devices addresses start at 0x0 */
7862306a36Sopenharmony_ci	struct mii_bus *bus;
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ci	bus = mv88e6xxx_default_mdio_bus(chip);
8162306a36Sopenharmony_ci	if (!bus)
8262306a36Sopenharmony_ci		return -EOPNOTSUPP;
8362306a36Sopenharmony_ci
8462306a36Sopenharmony_ci	if (!chip->info->ops->phy_write_c45)
8562306a36Sopenharmony_ci		return -EOPNOTSUPP;
8662306a36Sopenharmony_ci
8762306a36Sopenharmony_ci	return chip->info->ops->phy_write_c45(chip, bus, addr, devad, reg, val);
8862306a36Sopenharmony_ci}
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_cistatic int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
9162306a36Sopenharmony_ci{
9262306a36Sopenharmony_ci	return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
9362306a36Sopenharmony_ci}
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_cistatic void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)
9662306a36Sopenharmony_ci{
9762306a36Sopenharmony_ci	int err;
9862306a36Sopenharmony_ci
9962306a36Sopenharmony_ci	/* Restore PHY page Copper 0x0 for access via the registered
10062306a36Sopenharmony_ci	 * MDIO bus
10162306a36Sopenharmony_ci	 */
10262306a36Sopenharmony_ci	err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE,
10362306a36Sopenharmony_ci				  MV88E6XXX_PHY_PAGE_COPPER);
10462306a36Sopenharmony_ci	if (unlikely(err)) {
10562306a36Sopenharmony_ci		dev_err(chip->dev,
10662306a36Sopenharmony_ci			"failed to restore PHY %d page Copper (%d)\n",
10762306a36Sopenharmony_ci			phy, err);
10862306a36Sopenharmony_ci	}
10962306a36Sopenharmony_ci}
11062306a36Sopenharmony_ci
11162306a36Sopenharmony_ciint mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
11262306a36Sopenharmony_ci			    u8 page, int reg, u16 *val)
11362306a36Sopenharmony_ci{
11462306a36Sopenharmony_ci	int err;
11562306a36Sopenharmony_ci
11662306a36Sopenharmony_ci	/* There is no paging for registers 22 */
11762306a36Sopenharmony_ci	if (reg == MV88E6XXX_PHY_PAGE)
11862306a36Sopenharmony_ci		return -EINVAL;
11962306a36Sopenharmony_ci
12062306a36Sopenharmony_ci	err = mv88e6xxx_phy_page_get(chip, phy, page);
12162306a36Sopenharmony_ci	if (!err) {
12262306a36Sopenharmony_ci		err = mv88e6xxx_phy_read(chip, phy, reg, val);
12362306a36Sopenharmony_ci		mv88e6xxx_phy_page_put(chip, phy);
12462306a36Sopenharmony_ci	}
12562306a36Sopenharmony_ci
12662306a36Sopenharmony_ci	return err;
12762306a36Sopenharmony_ci}
12862306a36Sopenharmony_ci
12962306a36Sopenharmony_ciint mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
13062306a36Sopenharmony_ci			     u8 page, int reg, u16 val)
13162306a36Sopenharmony_ci{
13262306a36Sopenharmony_ci	int err;
13362306a36Sopenharmony_ci
13462306a36Sopenharmony_ci	/* There is no paging for registers 22 */
13562306a36Sopenharmony_ci	if (reg == MV88E6XXX_PHY_PAGE)
13662306a36Sopenharmony_ci		return -EINVAL;
13762306a36Sopenharmony_ci
13862306a36Sopenharmony_ci	err = mv88e6xxx_phy_page_get(chip, phy, page);
13962306a36Sopenharmony_ci	if (!err) {
14062306a36Sopenharmony_ci		err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
14162306a36Sopenharmony_ci		if (!err)
14262306a36Sopenharmony_ci			err = mv88e6xxx_phy_write(chip, phy, reg, val);
14362306a36Sopenharmony_ci
14462306a36Sopenharmony_ci		mv88e6xxx_phy_page_put(chip, phy);
14562306a36Sopenharmony_ci	}
14662306a36Sopenharmony_ci
14762306a36Sopenharmony_ci	return err;
14862306a36Sopenharmony_ci}
14962306a36Sopenharmony_ci
15062306a36Sopenharmony_cistatic int mv88e6xxx_phy_ppu_disable(struct mv88e6xxx_chip *chip)
15162306a36Sopenharmony_ci{
15262306a36Sopenharmony_ci	if (!chip->info->ops->ppu_disable)
15362306a36Sopenharmony_ci		return 0;
15462306a36Sopenharmony_ci
15562306a36Sopenharmony_ci	return chip->info->ops->ppu_disable(chip);
15662306a36Sopenharmony_ci}
15762306a36Sopenharmony_ci
15862306a36Sopenharmony_cistatic int mv88e6xxx_phy_ppu_enable(struct mv88e6xxx_chip *chip)
15962306a36Sopenharmony_ci{
16062306a36Sopenharmony_ci	if (!chip->info->ops->ppu_enable)
16162306a36Sopenharmony_ci		return 0;
16262306a36Sopenharmony_ci
16362306a36Sopenharmony_ci	return chip->info->ops->ppu_enable(chip);
16462306a36Sopenharmony_ci}
16562306a36Sopenharmony_ci
16662306a36Sopenharmony_cistatic void mv88e6xxx_phy_ppu_reenable_work(struct work_struct *ugly)
16762306a36Sopenharmony_ci{
16862306a36Sopenharmony_ci	struct mv88e6xxx_chip *chip;
16962306a36Sopenharmony_ci
17062306a36Sopenharmony_ci	chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);
17162306a36Sopenharmony_ci
17262306a36Sopenharmony_ci	mv88e6xxx_reg_lock(chip);
17362306a36Sopenharmony_ci
17462306a36Sopenharmony_ci	if (mutex_trylock(&chip->ppu_mutex)) {
17562306a36Sopenharmony_ci		if (mv88e6xxx_phy_ppu_enable(chip) == 0)
17662306a36Sopenharmony_ci			chip->ppu_disabled = 0;
17762306a36Sopenharmony_ci		mutex_unlock(&chip->ppu_mutex);
17862306a36Sopenharmony_ci	}
17962306a36Sopenharmony_ci
18062306a36Sopenharmony_ci	mv88e6xxx_reg_unlock(chip);
18162306a36Sopenharmony_ci}
18262306a36Sopenharmony_ci
18362306a36Sopenharmony_cistatic void mv88e6xxx_phy_ppu_reenable_timer(struct timer_list *t)
18462306a36Sopenharmony_ci{
18562306a36Sopenharmony_ci	struct mv88e6xxx_chip *chip = from_timer(chip, t, ppu_timer);
18662306a36Sopenharmony_ci
18762306a36Sopenharmony_ci	schedule_work(&chip->ppu_work);
18862306a36Sopenharmony_ci}
18962306a36Sopenharmony_ci
19062306a36Sopenharmony_cistatic int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip)
19162306a36Sopenharmony_ci{
19262306a36Sopenharmony_ci	int ret;
19362306a36Sopenharmony_ci
19462306a36Sopenharmony_ci	mutex_lock(&chip->ppu_mutex);
19562306a36Sopenharmony_ci
19662306a36Sopenharmony_ci	/* If the PHY polling unit is enabled, disable it so that
19762306a36Sopenharmony_ci	 * we can access the PHY registers.  If it was already
19862306a36Sopenharmony_ci	 * disabled, cancel the timer that is going to re-enable
19962306a36Sopenharmony_ci	 * it.
20062306a36Sopenharmony_ci	 */
20162306a36Sopenharmony_ci	if (!chip->ppu_disabled) {
20262306a36Sopenharmony_ci		ret = mv88e6xxx_phy_ppu_disable(chip);
20362306a36Sopenharmony_ci		if (ret < 0) {
20462306a36Sopenharmony_ci			mutex_unlock(&chip->ppu_mutex);
20562306a36Sopenharmony_ci			return ret;
20662306a36Sopenharmony_ci		}
20762306a36Sopenharmony_ci		chip->ppu_disabled = 1;
20862306a36Sopenharmony_ci	} else {
20962306a36Sopenharmony_ci		del_timer(&chip->ppu_timer);
21062306a36Sopenharmony_ci		ret = 0;
21162306a36Sopenharmony_ci	}
21262306a36Sopenharmony_ci
21362306a36Sopenharmony_ci	return ret;
21462306a36Sopenharmony_ci}
21562306a36Sopenharmony_ci
21662306a36Sopenharmony_cistatic void mv88e6xxx_phy_ppu_access_put(struct mv88e6xxx_chip *chip)
21762306a36Sopenharmony_ci{
21862306a36Sopenharmony_ci	/* Schedule a timer to re-enable the PHY polling unit. */
21962306a36Sopenharmony_ci	mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
22062306a36Sopenharmony_ci	mutex_unlock(&chip->ppu_mutex);
22162306a36Sopenharmony_ci}
22262306a36Sopenharmony_ci
22362306a36Sopenharmony_cistatic void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip)
22462306a36Sopenharmony_ci{
22562306a36Sopenharmony_ci	mutex_init(&chip->ppu_mutex);
22662306a36Sopenharmony_ci	INIT_WORK(&chip->ppu_work, mv88e6xxx_phy_ppu_reenable_work);
22762306a36Sopenharmony_ci	timer_setup(&chip->ppu_timer, mv88e6xxx_phy_ppu_reenable_timer, 0);
22862306a36Sopenharmony_ci}
22962306a36Sopenharmony_ci
23062306a36Sopenharmony_cistatic void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip)
23162306a36Sopenharmony_ci{
23262306a36Sopenharmony_ci	del_timer_sync(&chip->ppu_timer);
23362306a36Sopenharmony_ci}
23462306a36Sopenharmony_ci
23562306a36Sopenharmony_ciint mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
23662306a36Sopenharmony_ci			   int addr, int reg, u16 *val)
23762306a36Sopenharmony_ci{
23862306a36Sopenharmony_ci	int err;
23962306a36Sopenharmony_ci
24062306a36Sopenharmony_ci	err = mv88e6xxx_phy_ppu_access_get(chip);
24162306a36Sopenharmony_ci	if (!err) {
24262306a36Sopenharmony_ci		err = mv88e6xxx_read(chip, addr, reg, val);
24362306a36Sopenharmony_ci		mv88e6xxx_phy_ppu_access_put(chip);
24462306a36Sopenharmony_ci	}
24562306a36Sopenharmony_ci
24662306a36Sopenharmony_ci	return err;
24762306a36Sopenharmony_ci}
24862306a36Sopenharmony_ci
24962306a36Sopenharmony_ciint mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
25062306a36Sopenharmony_ci			    int addr, int reg, u16 val)
25162306a36Sopenharmony_ci{
25262306a36Sopenharmony_ci	int err;
25362306a36Sopenharmony_ci
25462306a36Sopenharmony_ci	err = mv88e6xxx_phy_ppu_access_get(chip);
25562306a36Sopenharmony_ci	if (!err) {
25662306a36Sopenharmony_ci		err = mv88e6xxx_write(chip, addr, reg, val);
25762306a36Sopenharmony_ci		mv88e6xxx_phy_ppu_access_put(chip);
25862306a36Sopenharmony_ci	}
25962306a36Sopenharmony_ci
26062306a36Sopenharmony_ci	return err;
26162306a36Sopenharmony_ci}
26262306a36Sopenharmony_ci
26362306a36Sopenharmony_civoid mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
26462306a36Sopenharmony_ci{
26562306a36Sopenharmony_ci	if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
26662306a36Sopenharmony_ci		mv88e6xxx_phy_ppu_state_init(chip);
26762306a36Sopenharmony_ci}
26862306a36Sopenharmony_ci
26962306a36Sopenharmony_civoid mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
27062306a36Sopenharmony_ci{
27162306a36Sopenharmony_ci	if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
27262306a36Sopenharmony_ci		mv88e6xxx_phy_ppu_state_destroy(chip);
27362306a36Sopenharmony_ci}
27462306a36Sopenharmony_ci
27562306a36Sopenharmony_ciint mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip)
27662306a36Sopenharmony_ci{
27762306a36Sopenharmony_ci	return mv88e6xxx_phy_ppu_enable(chip);
27862306a36Sopenharmony_ci}
279