1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Broadcom Starfighter2 private context 4 * 5 * Copyright (C) 2014, Broadcom Corporation 6 */ 7 8#ifndef __BCM_SF2_H 9#define __BCM_SF2_H 10 11#include <linux/platform_device.h> 12#include <linux/kernel.h> 13#include <linux/io.h> 14#include <linux/spinlock.h> 15#include <linux/mutex.h> 16#include <linux/mii.h> 17#include <linux/ethtool.h> 18#include <linux/types.h> 19#include <linux/bitops.h> 20#include <linux/if_vlan.h> 21#include <linux/reset.h> 22 23#include <net/dsa.h> 24 25#include "bcm_sf2_regs.h" 26#include "b53/b53_priv.h" 27 28struct bcm_sf2_hw_params { 29 u16 top_rev; 30 u16 core_rev; 31 u16 gphy_rev; 32 u32 num_gphy; 33 u8 num_acb_queue; 34 u8 num_rgmii; 35 u8 num_ports; 36 u8 fcb_pause_override:1; 37 u8 acb_packets_inflight:1; 38}; 39 40#define BCM_SF2_REGS_NAME {\ 41 "core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb" \ 42} 43 44#define BCM_SF2_REGS_NUM 6 45 46struct bcm_sf2_port_status { 47 phy_interface_t mode; 48 unsigned int link; 49 bool enabled; 50}; 51 52struct bcm_sf2_cfp_priv { 53 /* Mutex protecting concurrent accesses to the CFP registers */ 54 struct mutex lock; 55 DECLARE_BITMAP(used, CFP_NUM_RULES); 56 DECLARE_BITMAP(unique, CFP_NUM_RULES); 57 unsigned int rules_cnt; 58 struct list_head rules_list; 59}; 60 61struct bcm_sf2_priv { 62 /* Base registers, keep those in order with BCM_SF2_REGS_NAME */ 63 void __iomem *core; 64 void __iomem *reg; 65 void __iomem *intrl2_0; 66 void __iomem *intrl2_1; 67 void __iomem *fcb; 68 void __iomem *acb; 69 70 struct reset_control *rcdev; 71 72 /* Register offsets indirection tables */ 73 u32 type; 74 const u16 *reg_offsets; 75 unsigned int core_reg_align; 76 unsigned int num_cfp_rules; 77 unsigned int num_crossbar_int_ports; 78 79 /* spinlock protecting access to the indirect registers */ 80 spinlock_t indir_lock; 81 82 int irq0; 83 int irq1; 84 u32 irq0_stat; 85 u32 irq0_mask; 86 u32 irq1_stat; 87 u32 irq1_mask; 88 89 /* Backing b53_device */ 90 struct b53_device *dev; 91 92 struct bcm_sf2_hw_params hw_params; 93 94 struct bcm_sf2_port_status port_sts[DSA_MAX_PORTS]; 95 96 /* Mask of ports enabled for Wake-on-LAN */ 97 u32 wol_ports_mask; 98 99 struct clk *clk; 100 struct clk *clk_mdiv; 101 102 /* MoCA port location */ 103 int moca_port; 104 105 /* Bitmask of ports having an integrated PHY */ 106 unsigned int int_phy_mask; 107 108 /* Master and slave MDIO bus controller */ 109 unsigned int indir_phy_mask; 110 struct device_node *master_mii_dn; 111 struct mii_bus *slave_mii_bus; 112 struct mii_bus *master_mii_bus; 113 114 /* Bitmask of ports needing BRCM tags */ 115 unsigned int brcm_tag_mask; 116 117 /* CFP rules context */ 118 struct bcm_sf2_cfp_priv cfp; 119}; 120 121static inline struct bcm_sf2_priv *bcm_sf2_to_priv(struct dsa_switch *ds) 122{ 123 struct b53_device *dev = ds->priv; 124 125 return dev->priv; 126} 127 128static inline u32 bcm_sf2_mangle_addr(struct bcm_sf2_priv *priv, u32 off) 129{ 130 return off << priv->core_reg_align; 131} 132 133#define SF2_IO_MACRO(name) \ 134static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off) \ 135{ \ 136 return readl_relaxed(priv->name + off); \ 137} \ 138static inline void name##_writel(struct bcm_sf2_priv *priv, \ 139 u32 val, u32 off) \ 140{ \ 141 writel_relaxed(val, priv->name + off); \ 142} \ 143 144/* Accesses to 64-bits register requires us to latch the hi/lo pairs 145 * using the REG_DIR_DATA_{READ,WRITE} ancillary registers. The 'indir_lock' 146 * spinlock is automatically grabbed and released to provide relative 147 * atomiticy with latched reads/writes. 148 */ 149#define SF2_IO64_MACRO(name) \ 150static inline u64 name##_readq(struct bcm_sf2_priv *priv, u32 off) \ 151{ \ 152 u32 indir, dir; \ 153 spin_lock(&priv->indir_lock); \ 154 dir = name##_readl(priv, off); \ 155 indir = reg_readl(priv, REG_DIR_DATA_READ); \ 156 spin_unlock(&priv->indir_lock); \ 157 return (u64)indir << 32 | dir; \ 158} \ 159static inline void name##_writeq(struct bcm_sf2_priv *priv, u64 val, \ 160 u32 off) \ 161{ \ 162 spin_lock(&priv->indir_lock); \ 163 reg_writel(priv, upper_32_bits(val), REG_DIR_DATA_WRITE); \ 164 name##_writel(priv, lower_32_bits(val), off); \ 165 spin_unlock(&priv->indir_lock); \ 166} 167 168#define SWITCH_INTR_L2(which) \ 169static inline void intrl2_##which##_mask_clear(struct bcm_sf2_priv *priv, \ 170 u32 mask) \ 171{ \ 172 priv->irq##which##_mask &= ~(mask); \ 173 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \ 174} \ 175static inline void intrl2_##which##_mask_set(struct bcm_sf2_priv *priv, \ 176 u32 mask) \ 177{ \ 178 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \ 179 priv->irq##which##_mask |= (mask); \ 180} \ 181 182static inline u32 core_readl(struct bcm_sf2_priv *priv, u32 off) 183{ 184 u32 tmp = bcm_sf2_mangle_addr(priv, off); 185 return readl_relaxed(priv->core + tmp); 186} 187 188static inline void core_writel(struct bcm_sf2_priv *priv, u32 val, u32 off) 189{ 190 u32 tmp = bcm_sf2_mangle_addr(priv, off); 191 writel_relaxed(val, priv->core + tmp); 192} 193 194static inline u32 reg_readl(struct bcm_sf2_priv *priv, u16 off) 195{ 196 return readl_relaxed(priv->reg + priv->reg_offsets[off]); 197} 198 199static inline void reg_writel(struct bcm_sf2_priv *priv, u32 val, u16 off) 200{ 201 writel_relaxed(val, priv->reg + priv->reg_offsets[off]); 202} 203 204SF2_IO64_MACRO(core); 205SF2_IO_MACRO(intrl2_0); 206SF2_IO_MACRO(intrl2_1); 207SF2_IO_MACRO(fcb); 208SF2_IO_MACRO(acb); 209 210SWITCH_INTR_L2(0); 211SWITCH_INTR_L2(1); 212 213static inline u32 reg_led_readl(struct bcm_sf2_priv *priv, u16 off, u16 reg) 214{ 215 return readl_relaxed(priv->reg + priv->reg_offsets[off] + reg); 216} 217 218static inline void reg_led_writel(struct bcm_sf2_priv *priv, u32 val, u16 off, u16 reg) 219{ 220 writel_relaxed(val, priv->reg + priv->reg_offsets[off] + reg); 221} 222 223/* RXNFC */ 224int bcm_sf2_get_rxnfc(struct dsa_switch *ds, int port, 225 struct ethtool_rxnfc *nfc, u32 *rule_locs); 226int bcm_sf2_set_rxnfc(struct dsa_switch *ds, int port, 227 struct ethtool_rxnfc *nfc); 228int bcm_sf2_cfp_rst(struct bcm_sf2_priv *priv); 229void bcm_sf2_cfp_exit(struct dsa_switch *ds); 230int bcm_sf2_cfp_resume(struct dsa_switch *ds); 231void bcm_sf2_cfp_get_strings(struct dsa_switch *ds, int port, 232 u32 stringset, uint8_t *data); 233void bcm_sf2_cfp_get_ethtool_stats(struct dsa_switch *ds, int port, 234 uint64_t *data); 235int bcm_sf2_cfp_get_sset_count(struct dsa_switch *ds, int port, int sset); 236 237#endif /* __BCM_SF2_H */ 238