162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2005, Intec Automation Inc. 462306a36Sopenharmony_ci * Copyright (C) 2014, Freescale Semiconductor, Inc. 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#include <linux/mtd/spi-nor.h> 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#include "core.h" 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#define ATMEL_SR_GLOBAL_PROTECT_MASK GENMASK(5, 2) 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci/* 1462306a36Sopenharmony_ci * The Atmel AT25FS010/AT25FS040 parts have some weird configuration for the 1562306a36Sopenharmony_ci * block protection bits. We don't support them. But legacy behavior in linux 1662306a36Sopenharmony_ci * is to unlock the whole flash array on startup. Therefore, we have to support 1762306a36Sopenharmony_ci * exactly this operation. 1862306a36Sopenharmony_ci */ 1962306a36Sopenharmony_cistatic int at25fs_nor_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) 2062306a36Sopenharmony_ci{ 2162306a36Sopenharmony_ci return -EOPNOTSUPP; 2262306a36Sopenharmony_ci} 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_cistatic int at25fs_nor_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) 2562306a36Sopenharmony_ci{ 2662306a36Sopenharmony_ci int ret; 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci /* We only support unlocking the whole flash array */ 2962306a36Sopenharmony_ci if (ofs || len != nor->params->size) 3062306a36Sopenharmony_ci return -EINVAL; 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci /* Write 0x00 to the status register to disable write protection */ 3362306a36Sopenharmony_ci ret = spi_nor_write_sr_and_check(nor, 0); 3462306a36Sopenharmony_ci if (ret) 3562306a36Sopenharmony_ci dev_dbg(nor->dev, "unable to clear BP bits, WP# asserted?\n"); 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci return ret; 3862306a36Sopenharmony_ci} 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_cistatic int at25fs_nor_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) 4162306a36Sopenharmony_ci{ 4262306a36Sopenharmony_ci return -EOPNOTSUPP; 4362306a36Sopenharmony_ci} 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_cistatic const struct spi_nor_locking_ops at25fs_nor_locking_ops = { 4662306a36Sopenharmony_ci .lock = at25fs_nor_lock, 4762306a36Sopenharmony_ci .unlock = at25fs_nor_unlock, 4862306a36Sopenharmony_ci .is_locked = at25fs_nor_is_locked, 4962306a36Sopenharmony_ci}; 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_cistatic int at25fs_nor_late_init(struct spi_nor *nor) 5262306a36Sopenharmony_ci{ 5362306a36Sopenharmony_ci nor->params->locking_ops = &at25fs_nor_locking_ops; 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci return 0; 5662306a36Sopenharmony_ci} 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_cistatic const struct spi_nor_fixups at25fs_nor_fixups = { 5962306a36Sopenharmony_ci .late_init = at25fs_nor_late_init, 6062306a36Sopenharmony_ci}; 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci/** 6362306a36Sopenharmony_ci * atmel_nor_set_global_protection - Do a Global Protect or Unprotect command 6462306a36Sopenharmony_ci * @nor: pointer to 'struct spi_nor' 6562306a36Sopenharmony_ci * @ofs: offset in bytes 6662306a36Sopenharmony_ci * @len: len in bytes 6762306a36Sopenharmony_ci * @is_protect: if true do a Global Protect otherwise it is a Global Unprotect 6862306a36Sopenharmony_ci * 6962306a36Sopenharmony_ci * Return: 0 on success, -error otherwise. 7062306a36Sopenharmony_ci */ 7162306a36Sopenharmony_cistatic int atmel_nor_set_global_protection(struct spi_nor *nor, loff_t ofs, 7262306a36Sopenharmony_ci uint64_t len, bool is_protect) 7362306a36Sopenharmony_ci{ 7462306a36Sopenharmony_ci int ret; 7562306a36Sopenharmony_ci u8 sr; 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci /* We only support locking the whole flash array */ 7862306a36Sopenharmony_ci if (ofs || len != nor->params->size) 7962306a36Sopenharmony_ci return -EINVAL; 8062306a36Sopenharmony_ci 8162306a36Sopenharmony_ci ret = spi_nor_read_sr(nor, nor->bouncebuf); 8262306a36Sopenharmony_ci if (ret) 8362306a36Sopenharmony_ci return ret; 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci sr = nor->bouncebuf[0]; 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_ci /* SRWD bit needs to be cleared, otherwise the protection doesn't change */ 8862306a36Sopenharmony_ci if (sr & SR_SRWD) { 8962306a36Sopenharmony_ci sr &= ~SR_SRWD; 9062306a36Sopenharmony_ci ret = spi_nor_write_sr_and_check(nor, sr); 9162306a36Sopenharmony_ci if (ret) { 9262306a36Sopenharmony_ci dev_dbg(nor->dev, "unable to clear SRWD bit, WP# asserted?\n"); 9362306a36Sopenharmony_ci return ret; 9462306a36Sopenharmony_ci } 9562306a36Sopenharmony_ci } 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ci if (is_protect) { 9862306a36Sopenharmony_ci sr |= ATMEL_SR_GLOBAL_PROTECT_MASK; 9962306a36Sopenharmony_ci /* 10062306a36Sopenharmony_ci * Set the SRWD bit again as soon as we are protecting 10162306a36Sopenharmony_ci * anything. This will ensure that the WP# pin is working 10262306a36Sopenharmony_ci * correctly. By doing this we also behave the same as 10362306a36Sopenharmony_ci * spi_nor_sr_lock(), which sets SRWD if any block protection 10462306a36Sopenharmony_ci * is active. 10562306a36Sopenharmony_ci */ 10662306a36Sopenharmony_ci sr |= SR_SRWD; 10762306a36Sopenharmony_ci } else { 10862306a36Sopenharmony_ci sr &= ~ATMEL_SR_GLOBAL_PROTECT_MASK; 10962306a36Sopenharmony_ci } 11062306a36Sopenharmony_ci 11162306a36Sopenharmony_ci nor->bouncebuf[0] = sr; 11262306a36Sopenharmony_ci 11362306a36Sopenharmony_ci /* 11462306a36Sopenharmony_ci * We cannot use the spi_nor_write_sr_and_check() because this command 11562306a36Sopenharmony_ci * isn't really setting any bits, instead it is an pseudo command for 11662306a36Sopenharmony_ci * "Global Unprotect" or "Global Protect" 11762306a36Sopenharmony_ci */ 11862306a36Sopenharmony_ci return spi_nor_write_sr(nor, nor->bouncebuf, 1); 11962306a36Sopenharmony_ci} 12062306a36Sopenharmony_ci 12162306a36Sopenharmony_cistatic int atmel_nor_global_protect(struct spi_nor *nor, loff_t ofs, 12262306a36Sopenharmony_ci uint64_t len) 12362306a36Sopenharmony_ci{ 12462306a36Sopenharmony_ci return atmel_nor_set_global_protection(nor, ofs, len, true); 12562306a36Sopenharmony_ci} 12662306a36Sopenharmony_ci 12762306a36Sopenharmony_cistatic int atmel_nor_global_unprotect(struct spi_nor *nor, loff_t ofs, 12862306a36Sopenharmony_ci uint64_t len) 12962306a36Sopenharmony_ci{ 13062306a36Sopenharmony_ci return atmel_nor_set_global_protection(nor, ofs, len, false); 13162306a36Sopenharmony_ci} 13262306a36Sopenharmony_ci 13362306a36Sopenharmony_cistatic int atmel_nor_is_global_protected(struct spi_nor *nor, loff_t ofs, 13462306a36Sopenharmony_ci uint64_t len) 13562306a36Sopenharmony_ci{ 13662306a36Sopenharmony_ci int ret; 13762306a36Sopenharmony_ci 13862306a36Sopenharmony_ci if (ofs >= nor->params->size || (ofs + len) > nor->params->size) 13962306a36Sopenharmony_ci return -EINVAL; 14062306a36Sopenharmony_ci 14162306a36Sopenharmony_ci ret = spi_nor_read_sr(nor, nor->bouncebuf); 14262306a36Sopenharmony_ci if (ret) 14362306a36Sopenharmony_ci return ret; 14462306a36Sopenharmony_ci 14562306a36Sopenharmony_ci return ((nor->bouncebuf[0] & ATMEL_SR_GLOBAL_PROTECT_MASK) == ATMEL_SR_GLOBAL_PROTECT_MASK); 14662306a36Sopenharmony_ci} 14762306a36Sopenharmony_ci 14862306a36Sopenharmony_cistatic const struct spi_nor_locking_ops atmel_nor_global_protection_ops = { 14962306a36Sopenharmony_ci .lock = atmel_nor_global_protect, 15062306a36Sopenharmony_ci .unlock = atmel_nor_global_unprotect, 15162306a36Sopenharmony_ci .is_locked = atmel_nor_is_global_protected, 15262306a36Sopenharmony_ci}; 15362306a36Sopenharmony_ci 15462306a36Sopenharmony_cistatic int atmel_nor_global_protection_late_init(struct spi_nor *nor) 15562306a36Sopenharmony_ci{ 15662306a36Sopenharmony_ci nor->params->locking_ops = &atmel_nor_global_protection_ops; 15762306a36Sopenharmony_ci 15862306a36Sopenharmony_ci return 0; 15962306a36Sopenharmony_ci} 16062306a36Sopenharmony_ci 16162306a36Sopenharmony_cistatic const struct spi_nor_fixups atmel_nor_global_protection_fixups = { 16262306a36Sopenharmony_ci .late_init = atmel_nor_global_protection_late_init, 16362306a36Sopenharmony_ci}; 16462306a36Sopenharmony_ci 16562306a36Sopenharmony_cistatic const struct flash_info atmel_nor_parts[] = { 16662306a36Sopenharmony_ci /* Atmel -- some are (confusingly) marketed as "DataFlash" */ 16762306a36Sopenharmony_ci { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4) 16862306a36Sopenharmony_ci FLAGS(SPI_NOR_HAS_LOCK) 16962306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K) 17062306a36Sopenharmony_ci .fixups = &at25fs_nor_fixups }, 17162306a36Sopenharmony_ci { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8) 17262306a36Sopenharmony_ci FLAGS(SPI_NOR_HAS_LOCK) 17362306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K) 17462306a36Sopenharmony_ci .fixups = &at25fs_nor_fixups }, 17562306a36Sopenharmony_ci { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8) 17662306a36Sopenharmony_ci FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) 17762306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K) 17862306a36Sopenharmony_ci .fixups = &atmel_nor_global_protection_fixups }, 17962306a36Sopenharmony_ci { "at25df321", INFO(0x1f4700, 0, 64 * 1024, 64) 18062306a36Sopenharmony_ci FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) 18162306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K) 18262306a36Sopenharmony_ci .fixups = &atmel_nor_global_protection_fixups }, 18362306a36Sopenharmony_ci { "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64) 18462306a36Sopenharmony_ci FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) 18562306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K) 18662306a36Sopenharmony_ci .fixups = &atmel_nor_global_protection_fixups }, 18762306a36Sopenharmony_ci { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128) 18862306a36Sopenharmony_ci FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) 18962306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K) 19062306a36Sopenharmony_ci .fixups = &atmel_nor_global_protection_fixups }, 19162306a36Sopenharmony_ci { "at25sl321", INFO(0x1f4216, 0, 64 * 1024, 64) 19262306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 19362306a36Sopenharmony_ci { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8) 19462306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K) }, 19562306a36Sopenharmony_ci { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16) 19662306a36Sopenharmony_ci FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) 19762306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K) 19862306a36Sopenharmony_ci .fixups = &atmel_nor_global_protection_fixups }, 19962306a36Sopenharmony_ci { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32) 20062306a36Sopenharmony_ci FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) 20162306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K) 20262306a36Sopenharmony_ci .fixups = &atmel_nor_global_protection_fixups }, 20362306a36Sopenharmony_ci { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64) 20462306a36Sopenharmony_ci FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) 20562306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K) 20662306a36Sopenharmony_ci .fixups = &atmel_nor_global_protection_fixups }, 20762306a36Sopenharmony_ci { "at45db081d", INFO(0x1f2500, 0, 64 * 1024, 16) 20862306a36Sopenharmony_ci NO_SFDP_FLAGS(SECT_4K) }, 20962306a36Sopenharmony_ci}; 21062306a36Sopenharmony_ci 21162306a36Sopenharmony_ciconst struct spi_nor_manufacturer spi_nor_atmel = { 21262306a36Sopenharmony_ci .name = "atmel", 21362306a36Sopenharmony_ci .parts = atmel_nor_parts, 21462306a36Sopenharmony_ci .nparts = ARRAY_SIZE(atmel_nor_parts), 21562306a36Sopenharmony_ci}; 216