162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Freescale UPM NAND driver.
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright © 2007-2008  MontaVista Software, Inc.
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
862306a36Sopenharmony_ci */
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci#include <linux/kernel.h>
1162306a36Sopenharmony_ci#include <linux/module.h>
1262306a36Sopenharmony_ci#include <linux/delay.h>
1362306a36Sopenharmony_ci#include <linux/mtd/rawnand.h>
1462306a36Sopenharmony_ci#include <linux/mtd/partitions.h>
1562306a36Sopenharmony_ci#include <linux/mtd/mtd.h>
1662306a36Sopenharmony_ci#include <linux/of.h>
1762306a36Sopenharmony_ci#include <linux/platform_device.h>
1862306a36Sopenharmony_ci#include <linux/io.h>
1962306a36Sopenharmony_ci#include <linux/slab.h>
2062306a36Sopenharmony_ci#include <asm/fsl_lbc.h>
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_cistruct fsl_upm_nand {
2362306a36Sopenharmony_ci	struct nand_controller base;
2462306a36Sopenharmony_ci	struct device *dev;
2562306a36Sopenharmony_ci	struct nand_chip chip;
2662306a36Sopenharmony_ci	struct fsl_upm upm;
2762306a36Sopenharmony_ci	uint8_t upm_addr_offset;
2862306a36Sopenharmony_ci	uint8_t upm_cmd_offset;
2962306a36Sopenharmony_ci	void __iomem *io_base;
3062306a36Sopenharmony_ci	struct gpio_desc *rnb_gpio[NAND_MAX_CHIPS];
3162306a36Sopenharmony_ci	uint32_t mchip_offsets[NAND_MAX_CHIPS];
3262306a36Sopenharmony_ci	uint32_t mchip_count;
3362306a36Sopenharmony_ci	uint32_t mchip_number;
3462306a36Sopenharmony_ci};
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_cistatic inline struct fsl_upm_nand *to_fsl_upm_nand(struct mtd_info *mtdinfo)
3762306a36Sopenharmony_ci{
3862306a36Sopenharmony_ci	return container_of(mtd_to_nand(mtdinfo), struct fsl_upm_nand,
3962306a36Sopenharmony_ci			    chip);
4062306a36Sopenharmony_ci}
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_cistatic int fun_chip_init(struct fsl_upm_nand *fun,
4362306a36Sopenharmony_ci			 const struct device_node *upm_np,
4462306a36Sopenharmony_ci			 const struct resource *io_res)
4562306a36Sopenharmony_ci{
4662306a36Sopenharmony_ci	struct mtd_info *mtd = nand_to_mtd(&fun->chip);
4762306a36Sopenharmony_ci	int ret;
4862306a36Sopenharmony_ci	struct device_node *flash_np;
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci	fun->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
5162306a36Sopenharmony_ci	fun->chip.ecc.algo = NAND_ECC_ALGO_HAMMING;
5262306a36Sopenharmony_ci	fun->chip.controller = &fun->base;
5362306a36Sopenharmony_ci	mtd->dev.parent = fun->dev;
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci	flash_np = of_get_next_child(upm_np, NULL);
5662306a36Sopenharmony_ci	if (!flash_np)
5762306a36Sopenharmony_ci		return -ENODEV;
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci	nand_set_flash_node(&fun->chip, flash_np);
6062306a36Sopenharmony_ci	mtd->name = devm_kasprintf(fun->dev, GFP_KERNEL, "0x%llx.%pOFn",
6162306a36Sopenharmony_ci				   (u64)io_res->start,
6262306a36Sopenharmony_ci				   flash_np);
6362306a36Sopenharmony_ci	if (!mtd->name) {
6462306a36Sopenharmony_ci		ret = -ENOMEM;
6562306a36Sopenharmony_ci		goto err;
6662306a36Sopenharmony_ci	}
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci	ret = nand_scan(&fun->chip, fun->mchip_count);
6962306a36Sopenharmony_ci	if (ret)
7062306a36Sopenharmony_ci		goto err;
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_ci	ret = mtd_device_register(mtd, NULL, 0);
7362306a36Sopenharmony_cierr:
7462306a36Sopenharmony_ci	of_node_put(flash_np);
7562306a36Sopenharmony_ci	return ret;
7662306a36Sopenharmony_ci}
7762306a36Sopenharmony_ci
7862306a36Sopenharmony_cistatic int func_exec_instr(struct nand_chip *chip,
7962306a36Sopenharmony_ci			   const struct nand_op_instr *instr)
8062306a36Sopenharmony_ci{
8162306a36Sopenharmony_ci	struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
8262306a36Sopenharmony_ci	u32 mar, reg_offs = fun->mchip_offsets[fun->mchip_number];
8362306a36Sopenharmony_ci	unsigned int i;
8462306a36Sopenharmony_ci	const u8 *out;
8562306a36Sopenharmony_ci	u8 *in;
8662306a36Sopenharmony_ci
8762306a36Sopenharmony_ci	switch (instr->type) {
8862306a36Sopenharmony_ci	case NAND_OP_CMD_INSTR:
8962306a36Sopenharmony_ci		fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
9062306a36Sopenharmony_ci		mar = (instr->ctx.cmd.opcode << (32 - fun->upm.width)) |
9162306a36Sopenharmony_ci		      reg_offs;
9262306a36Sopenharmony_ci		fsl_upm_run_pattern(&fun->upm, fun->io_base + reg_offs, mar);
9362306a36Sopenharmony_ci		fsl_upm_end_pattern(&fun->upm);
9462306a36Sopenharmony_ci		return 0;
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ci	case NAND_OP_ADDR_INSTR:
9762306a36Sopenharmony_ci		fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
9862306a36Sopenharmony_ci		for (i = 0; i < instr->ctx.addr.naddrs; i++) {
9962306a36Sopenharmony_ci			mar = (instr->ctx.addr.addrs[i] << (32 - fun->upm.width)) |
10062306a36Sopenharmony_ci			      reg_offs;
10162306a36Sopenharmony_ci			fsl_upm_run_pattern(&fun->upm, fun->io_base + reg_offs, mar);
10262306a36Sopenharmony_ci		}
10362306a36Sopenharmony_ci		fsl_upm_end_pattern(&fun->upm);
10462306a36Sopenharmony_ci		return 0;
10562306a36Sopenharmony_ci
10662306a36Sopenharmony_ci	case NAND_OP_DATA_IN_INSTR:
10762306a36Sopenharmony_ci		in = instr->ctx.data.buf.in;
10862306a36Sopenharmony_ci		for (i = 0; i < instr->ctx.data.len; i++)
10962306a36Sopenharmony_ci			in[i] = in_8(fun->io_base + reg_offs);
11062306a36Sopenharmony_ci		return 0;
11162306a36Sopenharmony_ci
11262306a36Sopenharmony_ci	case NAND_OP_DATA_OUT_INSTR:
11362306a36Sopenharmony_ci		out = instr->ctx.data.buf.out;
11462306a36Sopenharmony_ci		for (i = 0; i < instr->ctx.data.len; i++)
11562306a36Sopenharmony_ci			out_8(fun->io_base + reg_offs, out[i]);
11662306a36Sopenharmony_ci		return 0;
11762306a36Sopenharmony_ci
11862306a36Sopenharmony_ci	case NAND_OP_WAITRDY_INSTR:
11962306a36Sopenharmony_ci		if (!fun->rnb_gpio[fun->mchip_number])
12062306a36Sopenharmony_ci			return nand_soft_waitrdy(chip, instr->ctx.waitrdy.timeout_ms);
12162306a36Sopenharmony_ci
12262306a36Sopenharmony_ci		return nand_gpio_waitrdy(chip, fun->rnb_gpio[fun->mchip_number],
12362306a36Sopenharmony_ci					 instr->ctx.waitrdy.timeout_ms);
12462306a36Sopenharmony_ci
12562306a36Sopenharmony_ci	default:
12662306a36Sopenharmony_ci		return -EINVAL;
12762306a36Sopenharmony_ci	}
12862306a36Sopenharmony_ci
12962306a36Sopenharmony_ci	return 0;
13062306a36Sopenharmony_ci}
13162306a36Sopenharmony_ci
13262306a36Sopenharmony_cistatic int fun_exec_op(struct nand_chip *chip, const struct nand_operation *op,
13362306a36Sopenharmony_ci		       bool check_only)
13462306a36Sopenharmony_ci{
13562306a36Sopenharmony_ci	struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
13662306a36Sopenharmony_ci	unsigned int i;
13762306a36Sopenharmony_ci	int ret;
13862306a36Sopenharmony_ci
13962306a36Sopenharmony_ci	if (op->cs >= NAND_MAX_CHIPS)
14062306a36Sopenharmony_ci		return -EINVAL;
14162306a36Sopenharmony_ci
14262306a36Sopenharmony_ci	if (check_only)
14362306a36Sopenharmony_ci		return 0;
14462306a36Sopenharmony_ci
14562306a36Sopenharmony_ci	fun->mchip_number = op->cs;
14662306a36Sopenharmony_ci
14762306a36Sopenharmony_ci	for (i = 0; i < op->ninstrs; i++) {
14862306a36Sopenharmony_ci		ret = func_exec_instr(chip, &op->instrs[i]);
14962306a36Sopenharmony_ci		if (ret)
15062306a36Sopenharmony_ci			return ret;
15162306a36Sopenharmony_ci
15262306a36Sopenharmony_ci		if (op->instrs[i].delay_ns)
15362306a36Sopenharmony_ci			ndelay(op->instrs[i].delay_ns);
15462306a36Sopenharmony_ci	}
15562306a36Sopenharmony_ci
15662306a36Sopenharmony_ci	return 0;
15762306a36Sopenharmony_ci}
15862306a36Sopenharmony_ci
15962306a36Sopenharmony_cistatic const struct nand_controller_ops fun_ops = {
16062306a36Sopenharmony_ci	.exec_op = fun_exec_op,
16162306a36Sopenharmony_ci};
16262306a36Sopenharmony_ci
16362306a36Sopenharmony_cistatic int fun_probe(struct platform_device *ofdev)
16462306a36Sopenharmony_ci{
16562306a36Sopenharmony_ci	struct fsl_upm_nand *fun;
16662306a36Sopenharmony_ci	struct resource *io_res;
16762306a36Sopenharmony_ci	const __be32 *prop;
16862306a36Sopenharmony_ci	int ret;
16962306a36Sopenharmony_ci	int size;
17062306a36Sopenharmony_ci	int i;
17162306a36Sopenharmony_ci
17262306a36Sopenharmony_ci	fun = devm_kzalloc(&ofdev->dev, sizeof(*fun), GFP_KERNEL);
17362306a36Sopenharmony_ci	if (!fun)
17462306a36Sopenharmony_ci		return -ENOMEM;
17562306a36Sopenharmony_ci
17662306a36Sopenharmony_ci	fun->io_base = devm_platform_get_and_ioremap_resource(ofdev, 0, &io_res);
17762306a36Sopenharmony_ci	if (IS_ERR(fun->io_base))
17862306a36Sopenharmony_ci		return PTR_ERR(fun->io_base);
17962306a36Sopenharmony_ci
18062306a36Sopenharmony_ci	ret = fsl_upm_find(io_res->start, &fun->upm);
18162306a36Sopenharmony_ci	if (ret) {
18262306a36Sopenharmony_ci		dev_err(&ofdev->dev, "can't find UPM\n");
18362306a36Sopenharmony_ci		return ret;
18462306a36Sopenharmony_ci	}
18562306a36Sopenharmony_ci
18662306a36Sopenharmony_ci	prop = of_get_property(ofdev->dev.of_node, "fsl,upm-addr-offset",
18762306a36Sopenharmony_ci			       &size);
18862306a36Sopenharmony_ci	if (!prop || size != sizeof(uint32_t)) {
18962306a36Sopenharmony_ci		dev_err(&ofdev->dev, "can't get UPM address offset\n");
19062306a36Sopenharmony_ci		return -EINVAL;
19162306a36Sopenharmony_ci	}
19262306a36Sopenharmony_ci	fun->upm_addr_offset = *prop;
19362306a36Sopenharmony_ci
19462306a36Sopenharmony_ci	prop = of_get_property(ofdev->dev.of_node, "fsl,upm-cmd-offset", &size);
19562306a36Sopenharmony_ci	if (!prop || size != sizeof(uint32_t)) {
19662306a36Sopenharmony_ci		dev_err(&ofdev->dev, "can't get UPM command offset\n");
19762306a36Sopenharmony_ci		return -EINVAL;
19862306a36Sopenharmony_ci	}
19962306a36Sopenharmony_ci	fun->upm_cmd_offset = *prop;
20062306a36Sopenharmony_ci
20162306a36Sopenharmony_ci	prop = of_get_property(ofdev->dev.of_node,
20262306a36Sopenharmony_ci			       "fsl,upm-addr-line-cs-offsets", &size);
20362306a36Sopenharmony_ci	if (prop && (size / sizeof(uint32_t)) > 0) {
20462306a36Sopenharmony_ci		fun->mchip_count = size / sizeof(uint32_t);
20562306a36Sopenharmony_ci		if (fun->mchip_count >= NAND_MAX_CHIPS) {
20662306a36Sopenharmony_ci			dev_err(&ofdev->dev, "too much multiple chips\n");
20762306a36Sopenharmony_ci			return -EINVAL;
20862306a36Sopenharmony_ci		}
20962306a36Sopenharmony_ci		for (i = 0; i < fun->mchip_count; i++)
21062306a36Sopenharmony_ci			fun->mchip_offsets[i] = be32_to_cpu(prop[i]);
21162306a36Sopenharmony_ci	} else {
21262306a36Sopenharmony_ci		fun->mchip_count = 1;
21362306a36Sopenharmony_ci	}
21462306a36Sopenharmony_ci
21562306a36Sopenharmony_ci	for (i = 0; i < fun->mchip_count; i++) {
21662306a36Sopenharmony_ci		fun->rnb_gpio[i] = devm_gpiod_get_index_optional(&ofdev->dev,
21762306a36Sopenharmony_ci								 NULL, i,
21862306a36Sopenharmony_ci								 GPIOD_IN);
21962306a36Sopenharmony_ci		if (IS_ERR(fun->rnb_gpio[i])) {
22062306a36Sopenharmony_ci			dev_err(&ofdev->dev, "RNB gpio #%d is invalid\n", i);
22162306a36Sopenharmony_ci			return PTR_ERR(fun->rnb_gpio[i]);
22262306a36Sopenharmony_ci		}
22362306a36Sopenharmony_ci	}
22462306a36Sopenharmony_ci
22562306a36Sopenharmony_ci	nand_controller_init(&fun->base);
22662306a36Sopenharmony_ci	fun->base.ops = &fun_ops;
22762306a36Sopenharmony_ci	fun->dev = &ofdev->dev;
22862306a36Sopenharmony_ci
22962306a36Sopenharmony_ci	ret = fun_chip_init(fun, ofdev->dev.of_node, io_res);
23062306a36Sopenharmony_ci	if (ret)
23162306a36Sopenharmony_ci		return ret;
23262306a36Sopenharmony_ci
23362306a36Sopenharmony_ci	dev_set_drvdata(&ofdev->dev, fun);
23462306a36Sopenharmony_ci
23562306a36Sopenharmony_ci	return 0;
23662306a36Sopenharmony_ci}
23762306a36Sopenharmony_ci
23862306a36Sopenharmony_cistatic void fun_remove(struct platform_device *ofdev)
23962306a36Sopenharmony_ci{
24062306a36Sopenharmony_ci	struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
24162306a36Sopenharmony_ci	struct nand_chip *chip = &fun->chip;
24262306a36Sopenharmony_ci	struct mtd_info *mtd = nand_to_mtd(chip);
24362306a36Sopenharmony_ci	int ret;
24462306a36Sopenharmony_ci
24562306a36Sopenharmony_ci	ret = mtd_device_unregister(mtd);
24662306a36Sopenharmony_ci	WARN_ON(ret);
24762306a36Sopenharmony_ci	nand_cleanup(chip);
24862306a36Sopenharmony_ci}
24962306a36Sopenharmony_ci
25062306a36Sopenharmony_cistatic const struct of_device_id of_fun_match[] = {
25162306a36Sopenharmony_ci	{ .compatible = "fsl,upm-nand" },
25262306a36Sopenharmony_ci	{},
25362306a36Sopenharmony_ci};
25462306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, of_fun_match);
25562306a36Sopenharmony_ci
25662306a36Sopenharmony_cistatic struct platform_driver of_fun_driver = {
25762306a36Sopenharmony_ci	.driver = {
25862306a36Sopenharmony_ci		.name = "fsl,upm-nand",
25962306a36Sopenharmony_ci		.of_match_table = of_fun_match,
26062306a36Sopenharmony_ci	},
26162306a36Sopenharmony_ci	.probe		= fun_probe,
26262306a36Sopenharmony_ci	.remove_new	= fun_remove,
26362306a36Sopenharmony_ci};
26462306a36Sopenharmony_ci
26562306a36Sopenharmony_cimodule_platform_driver(of_fun_driver);
26662306a36Sopenharmony_ci
26762306a36Sopenharmony_ciMODULE_LICENSE("GPL");
26862306a36Sopenharmony_ciMODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
26962306a36Sopenharmony_ciMODULE_DESCRIPTION("Driver for NAND chips working through Freescale "
27062306a36Sopenharmony_ci		   "LocalBus User-Programmable Machine");
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