162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * ichxrom.c 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Normal mappings of chips in physical memory 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include <linux/module.h> 962306a36Sopenharmony_ci#include <linux/types.h> 1062306a36Sopenharmony_ci#include <linux/kernel.h> 1162306a36Sopenharmony_ci#include <linux/init.h> 1262306a36Sopenharmony_ci#include <linux/slab.h> 1362306a36Sopenharmony_ci#include <asm/io.h> 1462306a36Sopenharmony_ci#include <linux/mtd/mtd.h> 1562306a36Sopenharmony_ci#include <linux/mtd/map.h> 1662306a36Sopenharmony_ci#include <linux/mtd/cfi.h> 1762306a36Sopenharmony_ci#include <linux/mtd/flashchip.h> 1862306a36Sopenharmony_ci#include <linux/pci.h> 1962306a36Sopenharmony_ci#include <linux/pci_ids.h> 2062306a36Sopenharmony_ci#include <linux/list.h> 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci#define xstr(s) str(s) 2362306a36Sopenharmony_ci#define str(s) #s 2462306a36Sopenharmony_ci#define MOD_NAME xstr(KBUILD_BASENAME) 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci#define ADDRESS_NAME_LEN 18 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci#define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */ 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci#define BIOS_CNTL 0x4e 3162306a36Sopenharmony_ci#define FWH_DEC_EN1 0xE3 3262306a36Sopenharmony_ci#define FWH_DEC_EN2 0xF0 3362306a36Sopenharmony_ci#define FWH_SEL1 0xE8 3462306a36Sopenharmony_ci#define FWH_SEL2 0xEE 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_cistruct ichxrom_window { 3762306a36Sopenharmony_ci void __iomem* virt; 3862306a36Sopenharmony_ci unsigned long phys; 3962306a36Sopenharmony_ci unsigned long size; 4062306a36Sopenharmony_ci struct list_head maps; 4162306a36Sopenharmony_ci struct resource rsrc; 4262306a36Sopenharmony_ci struct pci_dev *pdev; 4362306a36Sopenharmony_ci}; 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_cistruct ichxrom_map_info { 4662306a36Sopenharmony_ci struct list_head list; 4762306a36Sopenharmony_ci struct map_info map; 4862306a36Sopenharmony_ci struct mtd_info *mtd; 4962306a36Sopenharmony_ci struct resource rsrc; 5062306a36Sopenharmony_ci char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN]; 5162306a36Sopenharmony_ci}; 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_cistatic struct ichxrom_window ichxrom_window = { 5462306a36Sopenharmony_ci .maps = LIST_HEAD_INIT(ichxrom_window.maps), 5562306a36Sopenharmony_ci}; 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_cistatic void ichxrom_cleanup(struct ichxrom_window *window) 5862306a36Sopenharmony_ci{ 5962306a36Sopenharmony_ci struct ichxrom_map_info *map, *scratch; 6062306a36Sopenharmony_ci u16 word; 6162306a36Sopenharmony_ci int ret; 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci /* Disable writes through the rom window */ 6462306a36Sopenharmony_ci ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word); 6562306a36Sopenharmony_ci if (!ret) 6662306a36Sopenharmony_ci pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1); 6762306a36Sopenharmony_ci pci_dev_put(window->pdev); 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci /* Free all of the mtd devices */ 7062306a36Sopenharmony_ci list_for_each_entry_safe(map, scratch, &window->maps, list) { 7162306a36Sopenharmony_ci if (map->rsrc.parent) 7262306a36Sopenharmony_ci release_resource(&map->rsrc); 7362306a36Sopenharmony_ci mtd_device_unregister(map->mtd); 7462306a36Sopenharmony_ci map_destroy(map->mtd); 7562306a36Sopenharmony_ci list_del(&map->list); 7662306a36Sopenharmony_ci kfree(map); 7762306a36Sopenharmony_ci } 7862306a36Sopenharmony_ci if (window->rsrc.parent) 7962306a36Sopenharmony_ci release_resource(&window->rsrc); 8062306a36Sopenharmony_ci if (window->virt) { 8162306a36Sopenharmony_ci iounmap(window->virt); 8262306a36Sopenharmony_ci window->virt = NULL; 8362306a36Sopenharmony_ci window->phys = 0; 8462306a36Sopenharmony_ci window->size = 0; 8562306a36Sopenharmony_ci window->pdev = NULL; 8662306a36Sopenharmony_ci } 8762306a36Sopenharmony_ci} 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_cistatic int __init ichxrom_init_one(struct pci_dev *pdev, 9162306a36Sopenharmony_ci const struct pci_device_id *ent) 9262306a36Sopenharmony_ci{ 9362306a36Sopenharmony_ci static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL }; 9462306a36Sopenharmony_ci struct ichxrom_window *window = &ichxrom_window; 9562306a36Sopenharmony_ci struct ichxrom_map_info *map = NULL; 9662306a36Sopenharmony_ci unsigned long map_top; 9762306a36Sopenharmony_ci u8 byte; 9862306a36Sopenharmony_ci u16 word; 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ci /* For now I just handle the ichx and I assume there 10162306a36Sopenharmony_ci * are not a lot of resources up at the top of the address 10262306a36Sopenharmony_ci * space. It is possible to handle other devices in the 10362306a36Sopenharmony_ci * top 16MB but it is very painful. Also since 10462306a36Sopenharmony_ci * you can only really attach a FWH to an ICHX there 10562306a36Sopenharmony_ci * a number of simplifications you can make. 10662306a36Sopenharmony_ci * 10762306a36Sopenharmony_ci * Also you can page firmware hubs if an 8MB window isn't enough 10862306a36Sopenharmony_ci * but don't currently handle that case either. 10962306a36Sopenharmony_ci */ 11062306a36Sopenharmony_ci window->pdev = pdev; 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ci /* Find a region continuous to the end of the ROM window */ 11362306a36Sopenharmony_ci window->phys = 0; 11462306a36Sopenharmony_ci pci_read_config_byte(pdev, FWH_DEC_EN1, &byte); 11562306a36Sopenharmony_ci if (byte == 0xff) { 11662306a36Sopenharmony_ci window->phys = 0xffc00000; 11762306a36Sopenharmony_ci pci_read_config_byte(pdev, FWH_DEC_EN2, &byte); 11862306a36Sopenharmony_ci if ((byte & 0x0f) == 0x0f) { 11962306a36Sopenharmony_ci window->phys = 0xff400000; 12062306a36Sopenharmony_ci } 12162306a36Sopenharmony_ci else if ((byte & 0x0e) == 0x0e) { 12262306a36Sopenharmony_ci window->phys = 0xff500000; 12362306a36Sopenharmony_ci } 12462306a36Sopenharmony_ci else if ((byte & 0x0c) == 0x0c) { 12562306a36Sopenharmony_ci window->phys = 0xff600000; 12662306a36Sopenharmony_ci } 12762306a36Sopenharmony_ci else if ((byte & 0x08) == 0x08) { 12862306a36Sopenharmony_ci window->phys = 0xff700000; 12962306a36Sopenharmony_ci } 13062306a36Sopenharmony_ci } 13162306a36Sopenharmony_ci else if ((byte & 0xfe) == 0xfe) { 13262306a36Sopenharmony_ci window->phys = 0xffc80000; 13362306a36Sopenharmony_ci } 13462306a36Sopenharmony_ci else if ((byte & 0xfc) == 0xfc) { 13562306a36Sopenharmony_ci window->phys = 0xffd00000; 13662306a36Sopenharmony_ci } 13762306a36Sopenharmony_ci else if ((byte & 0xf8) == 0xf8) { 13862306a36Sopenharmony_ci window->phys = 0xffd80000; 13962306a36Sopenharmony_ci } 14062306a36Sopenharmony_ci else if ((byte & 0xf0) == 0xf0) { 14162306a36Sopenharmony_ci window->phys = 0xffe00000; 14262306a36Sopenharmony_ci } 14362306a36Sopenharmony_ci else if ((byte & 0xe0) == 0xe0) { 14462306a36Sopenharmony_ci window->phys = 0xffe80000; 14562306a36Sopenharmony_ci } 14662306a36Sopenharmony_ci else if ((byte & 0xc0) == 0xc0) { 14762306a36Sopenharmony_ci window->phys = 0xfff00000; 14862306a36Sopenharmony_ci } 14962306a36Sopenharmony_ci else if ((byte & 0x80) == 0x80) { 15062306a36Sopenharmony_ci window->phys = 0xfff80000; 15162306a36Sopenharmony_ci } 15262306a36Sopenharmony_ci 15362306a36Sopenharmony_ci if (window->phys == 0) { 15462306a36Sopenharmony_ci printk(KERN_ERR MOD_NAME ": Rom window is closed\n"); 15562306a36Sopenharmony_ci goto out; 15662306a36Sopenharmony_ci } 15762306a36Sopenharmony_ci window->phys -= 0x400000UL; 15862306a36Sopenharmony_ci window->size = (0xffffffffUL - window->phys) + 1UL; 15962306a36Sopenharmony_ci 16062306a36Sopenharmony_ci /* Enable writes through the rom window */ 16162306a36Sopenharmony_ci pci_read_config_word(pdev, BIOS_CNTL, &word); 16262306a36Sopenharmony_ci if (!(word & 1) && (word & (1<<1))) { 16362306a36Sopenharmony_ci /* The BIOS will generate an error if I enable 16462306a36Sopenharmony_ci * this device, so don't even try. 16562306a36Sopenharmony_ci */ 16662306a36Sopenharmony_ci printk(KERN_ERR MOD_NAME ": firmware access control, I can't enable writes\n"); 16762306a36Sopenharmony_ci goto out; 16862306a36Sopenharmony_ci } 16962306a36Sopenharmony_ci pci_write_config_word(pdev, BIOS_CNTL, word | 1); 17062306a36Sopenharmony_ci 17162306a36Sopenharmony_ci /* 17262306a36Sopenharmony_ci * Try to reserve the window mem region. If this fails then 17362306a36Sopenharmony_ci * it is likely due to the window being "reserved" by the BIOS. 17462306a36Sopenharmony_ci */ 17562306a36Sopenharmony_ci window->rsrc.name = MOD_NAME; 17662306a36Sopenharmony_ci window->rsrc.start = window->phys; 17762306a36Sopenharmony_ci window->rsrc.end = window->phys + window->size - 1; 17862306a36Sopenharmony_ci window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; 17962306a36Sopenharmony_ci if (request_resource(&iomem_resource, &window->rsrc)) { 18062306a36Sopenharmony_ci window->rsrc.parent = NULL; 18162306a36Sopenharmony_ci printk(KERN_DEBUG MOD_NAME ": " 18262306a36Sopenharmony_ci "%s(): Unable to register resource %pR - kernel bug?\n", 18362306a36Sopenharmony_ci __func__, &window->rsrc); 18462306a36Sopenharmony_ci } 18562306a36Sopenharmony_ci 18662306a36Sopenharmony_ci /* Map the firmware hub into my address space. */ 18762306a36Sopenharmony_ci window->virt = ioremap(window->phys, window->size); 18862306a36Sopenharmony_ci if (!window->virt) { 18962306a36Sopenharmony_ci printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n", 19062306a36Sopenharmony_ci window->phys, window->size); 19162306a36Sopenharmony_ci goto out; 19262306a36Sopenharmony_ci } 19362306a36Sopenharmony_ci 19462306a36Sopenharmony_ci /* Get the first address to look for an rom chip at */ 19562306a36Sopenharmony_ci map_top = window->phys; 19662306a36Sopenharmony_ci if ((window->phys & 0x3fffff) != 0) { 19762306a36Sopenharmony_ci map_top = window->phys + 0x400000; 19862306a36Sopenharmony_ci } 19962306a36Sopenharmony_ci#if 1 20062306a36Sopenharmony_ci /* The probe sequence run over the firmware hub lock 20162306a36Sopenharmony_ci * registers sets them to 0x7 (no access). 20262306a36Sopenharmony_ci * Probe at most the last 4M of the address space. 20362306a36Sopenharmony_ci */ 20462306a36Sopenharmony_ci if (map_top < 0xffc00000) { 20562306a36Sopenharmony_ci map_top = 0xffc00000; 20662306a36Sopenharmony_ci } 20762306a36Sopenharmony_ci#endif 20862306a36Sopenharmony_ci /* Loop through and look for rom chips */ 20962306a36Sopenharmony_ci while((map_top - 1) < 0xffffffffUL) { 21062306a36Sopenharmony_ci struct cfi_private *cfi; 21162306a36Sopenharmony_ci unsigned long offset; 21262306a36Sopenharmony_ci int i; 21362306a36Sopenharmony_ci 21462306a36Sopenharmony_ci if (!map) { 21562306a36Sopenharmony_ci map = kmalloc(sizeof(*map), GFP_KERNEL); 21662306a36Sopenharmony_ci if (!map) 21762306a36Sopenharmony_ci goto out; 21862306a36Sopenharmony_ci } 21962306a36Sopenharmony_ci memset(map, 0, sizeof(*map)); 22062306a36Sopenharmony_ci INIT_LIST_HEAD(&map->list); 22162306a36Sopenharmony_ci map->map.name = map->map_name; 22262306a36Sopenharmony_ci map->map.phys = map_top; 22362306a36Sopenharmony_ci offset = map_top - window->phys; 22462306a36Sopenharmony_ci map->map.virt = (void __iomem *) 22562306a36Sopenharmony_ci (((unsigned long)(window->virt)) + offset); 22662306a36Sopenharmony_ci map->map.size = 0xffffffffUL - map_top + 1UL; 22762306a36Sopenharmony_ci /* Set the name of the map to the address I am trying */ 22862306a36Sopenharmony_ci sprintf(map->map_name, "%s @%08Lx", 22962306a36Sopenharmony_ci MOD_NAME, (unsigned long long)map->map.phys); 23062306a36Sopenharmony_ci 23162306a36Sopenharmony_ci /* Firmware hubs only use vpp when being programmed 23262306a36Sopenharmony_ci * in a factory setting. So in-place programming 23362306a36Sopenharmony_ci * needs to use a different method. 23462306a36Sopenharmony_ci */ 23562306a36Sopenharmony_ci for(map->map.bankwidth = 32; map->map.bankwidth; 23662306a36Sopenharmony_ci map->map.bankwidth >>= 1) 23762306a36Sopenharmony_ci { 23862306a36Sopenharmony_ci char **probe_type; 23962306a36Sopenharmony_ci /* Skip bankwidths that are not supported */ 24062306a36Sopenharmony_ci if (!map_bankwidth_supported(map->map.bankwidth)) 24162306a36Sopenharmony_ci continue; 24262306a36Sopenharmony_ci 24362306a36Sopenharmony_ci /* Setup the map methods */ 24462306a36Sopenharmony_ci simple_map_init(&map->map); 24562306a36Sopenharmony_ci 24662306a36Sopenharmony_ci /* Try all of the probe methods */ 24762306a36Sopenharmony_ci probe_type = rom_probe_types; 24862306a36Sopenharmony_ci for(; *probe_type; probe_type++) { 24962306a36Sopenharmony_ci map->mtd = do_map_probe(*probe_type, &map->map); 25062306a36Sopenharmony_ci if (map->mtd) 25162306a36Sopenharmony_ci goto found; 25262306a36Sopenharmony_ci } 25362306a36Sopenharmony_ci } 25462306a36Sopenharmony_ci map_top += ROM_PROBE_STEP_SIZE; 25562306a36Sopenharmony_ci continue; 25662306a36Sopenharmony_ci found: 25762306a36Sopenharmony_ci /* Trim the size if we are larger than the map */ 25862306a36Sopenharmony_ci if (map->mtd->size > map->map.size) { 25962306a36Sopenharmony_ci printk(KERN_WARNING MOD_NAME 26062306a36Sopenharmony_ci " rom(%llu) larger than window(%lu). fixing...\n", 26162306a36Sopenharmony_ci (unsigned long long)map->mtd->size, map->map.size); 26262306a36Sopenharmony_ci map->mtd->size = map->map.size; 26362306a36Sopenharmony_ci } 26462306a36Sopenharmony_ci if (window->rsrc.parent) { 26562306a36Sopenharmony_ci /* 26662306a36Sopenharmony_ci * Registering the MTD device in iomem may not be possible 26762306a36Sopenharmony_ci * if there is a BIOS "reserved" and BUSY range. If this 26862306a36Sopenharmony_ci * fails then continue anyway. 26962306a36Sopenharmony_ci */ 27062306a36Sopenharmony_ci map->rsrc.name = map->map_name; 27162306a36Sopenharmony_ci map->rsrc.start = map->map.phys; 27262306a36Sopenharmony_ci map->rsrc.end = map->map.phys + map->mtd->size - 1; 27362306a36Sopenharmony_ci map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; 27462306a36Sopenharmony_ci if (request_resource(&window->rsrc, &map->rsrc)) { 27562306a36Sopenharmony_ci printk(KERN_ERR MOD_NAME 27662306a36Sopenharmony_ci ": cannot reserve MTD resource\n"); 27762306a36Sopenharmony_ci map->rsrc.parent = NULL; 27862306a36Sopenharmony_ci } 27962306a36Sopenharmony_ci } 28062306a36Sopenharmony_ci 28162306a36Sopenharmony_ci /* Make the whole region visible in the map */ 28262306a36Sopenharmony_ci map->map.virt = window->virt; 28362306a36Sopenharmony_ci map->map.phys = window->phys; 28462306a36Sopenharmony_ci cfi = map->map.fldrv_priv; 28562306a36Sopenharmony_ci for(i = 0; i < cfi->numchips; i++) { 28662306a36Sopenharmony_ci cfi->chips[i].start += offset; 28762306a36Sopenharmony_ci } 28862306a36Sopenharmony_ci 28962306a36Sopenharmony_ci /* Now that the mtd devices is complete claim and export it */ 29062306a36Sopenharmony_ci map->mtd->owner = THIS_MODULE; 29162306a36Sopenharmony_ci if (mtd_device_register(map->mtd, NULL, 0)) { 29262306a36Sopenharmony_ci map_destroy(map->mtd); 29362306a36Sopenharmony_ci map->mtd = NULL; 29462306a36Sopenharmony_ci goto out; 29562306a36Sopenharmony_ci } 29662306a36Sopenharmony_ci 29762306a36Sopenharmony_ci 29862306a36Sopenharmony_ci /* Calculate the new value of map_top */ 29962306a36Sopenharmony_ci map_top += map->mtd->size; 30062306a36Sopenharmony_ci 30162306a36Sopenharmony_ci /* File away the map structure */ 30262306a36Sopenharmony_ci list_add(&map->list, &window->maps); 30362306a36Sopenharmony_ci map = NULL; 30462306a36Sopenharmony_ci } 30562306a36Sopenharmony_ci 30662306a36Sopenharmony_ci out: 30762306a36Sopenharmony_ci /* Free any left over map structures */ 30862306a36Sopenharmony_ci kfree(map); 30962306a36Sopenharmony_ci 31062306a36Sopenharmony_ci /* See if I have any map structures */ 31162306a36Sopenharmony_ci if (list_empty(&window->maps)) { 31262306a36Sopenharmony_ci ichxrom_cleanup(window); 31362306a36Sopenharmony_ci return -ENODEV; 31462306a36Sopenharmony_ci } 31562306a36Sopenharmony_ci return 0; 31662306a36Sopenharmony_ci} 31762306a36Sopenharmony_ci 31862306a36Sopenharmony_ci 31962306a36Sopenharmony_cistatic void ichxrom_remove_one(struct pci_dev *pdev) 32062306a36Sopenharmony_ci{ 32162306a36Sopenharmony_ci struct ichxrom_window *window = &ichxrom_window; 32262306a36Sopenharmony_ci ichxrom_cleanup(window); 32362306a36Sopenharmony_ci} 32462306a36Sopenharmony_ci 32562306a36Sopenharmony_cistatic const struct pci_device_id ichxrom_pci_tbl[] = { 32662306a36Sopenharmony_ci { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, 32762306a36Sopenharmony_ci PCI_ANY_ID, PCI_ANY_ID, }, 32862306a36Sopenharmony_ci { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, 32962306a36Sopenharmony_ci PCI_ANY_ID, PCI_ANY_ID, }, 33062306a36Sopenharmony_ci { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, 33162306a36Sopenharmony_ci PCI_ANY_ID, PCI_ANY_ID, }, 33262306a36Sopenharmony_ci { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, 33362306a36Sopenharmony_ci PCI_ANY_ID, PCI_ANY_ID, }, 33462306a36Sopenharmony_ci { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, 33562306a36Sopenharmony_ci PCI_ANY_ID, PCI_ANY_ID, }, 33662306a36Sopenharmony_ci { 0, }, 33762306a36Sopenharmony_ci}; 33862306a36Sopenharmony_ci 33962306a36Sopenharmony_ci#if 0 34062306a36Sopenharmony_ciMODULE_DEVICE_TABLE(pci, ichxrom_pci_tbl); 34162306a36Sopenharmony_ci 34262306a36Sopenharmony_cistatic struct pci_driver ichxrom_driver = { 34362306a36Sopenharmony_ci .name = MOD_NAME, 34462306a36Sopenharmony_ci .id_table = ichxrom_pci_tbl, 34562306a36Sopenharmony_ci .probe = ichxrom_init_one, 34662306a36Sopenharmony_ci .remove = ichxrom_remove_one, 34762306a36Sopenharmony_ci}; 34862306a36Sopenharmony_ci#endif 34962306a36Sopenharmony_ci 35062306a36Sopenharmony_cistatic int __init init_ichxrom(void) 35162306a36Sopenharmony_ci{ 35262306a36Sopenharmony_ci struct pci_dev *pdev; 35362306a36Sopenharmony_ci const struct pci_device_id *id; 35462306a36Sopenharmony_ci 35562306a36Sopenharmony_ci pdev = NULL; 35662306a36Sopenharmony_ci for (id = ichxrom_pci_tbl; id->vendor; id++) { 35762306a36Sopenharmony_ci pdev = pci_get_device(id->vendor, id->device, NULL); 35862306a36Sopenharmony_ci if (pdev) { 35962306a36Sopenharmony_ci break; 36062306a36Sopenharmony_ci } 36162306a36Sopenharmony_ci } 36262306a36Sopenharmony_ci if (pdev) { 36362306a36Sopenharmony_ci return ichxrom_init_one(pdev, &ichxrom_pci_tbl[0]); 36462306a36Sopenharmony_ci } 36562306a36Sopenharmony_ci return -ENXIO; 36662306a36Sopenharmony_ci#if 0 36762306a36Sopenharmony_ci return pci_register_driver(&ichxrom_driver); 36862306a36Sopenharmony_ci#endif 36962306a36Sopenharmony_ci} 37062306a36Sopenharmony_ci 37162306a36Sopenharmony_cistatic void __exit cleanup_ichxrom(void) 37262306a36Sopenharmony_ci{ 37362306a36Sopenharmony_ci ichxrom_remove_one(ichxrom_window.pdev); 37462306a36Sopenharmony_ci} 37562306a36Sopenharmony_ci 37662306a36Sopenharmony_cimodule_init(init_ichxrom); 37762306a36Sopenharmony_cimodule_exit(cleanup_ichxrom); 37862306a36Sopenharmony_ci 37962306a36Sopenharmony_ciMODULE_LICENSE("GPL"); 38062306a36Sopenharmony_ciMODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>"); 38162306a36Sopenharmony_ciMODULE_DESCRIPTION("MTD map driver for BIOS chips on the ICHX southbridge"); 382