162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * A driver for the Integrated Circuits ICS932S401 462306a36Sopenharmony_ci * Copyright (C) 2008 IBM 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * Author: Darrick J. Wong <darrick.wong@oracle.com> 762306a36Sopenharmony_ci */ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#include <linux/module.h> 1062306a36Sopenharmony_ci#include <linux/jiffies.h> 1162306a36Sopenharmony_ci#include <linux/i2c.h> 1262306a36Sopenharmony_ci#include <linux/err.h> 1362306a36Sopenharmony_ci#include <linux/mutex.h> 1462306a36Sopenharmony_ci#include <linux/delay.h> 1562306a36Sopenharmony_ci#include <linux/log2.h> 1662306a36Sopenharmony_ci#include <linux/slab.h> 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci/* Addresses to scan */ 1962306a36Sopenharmony_cistatic const unsigned short normal_i2c[] = { 0x69, I2C_CLIENT_END }; 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci/* ICS932S401 registers */ 2262306a36Sopenharmony_ci#define ICS932S401_REG_CFG2 0x01 2362306a36Sopenharmony_ci#define ICS932S401_CFG1_SPREAD 0x01 2462306a36Sopenharmony_ci#define ICS932S401_REG_CFG7 0x06 2562306a36Sopenharmony_ci#define ICS932S401_FS_MASK 0x07 2662306a36Sopenharmony_ci#define ICS932S401_REG_VENDOR_REV 0x07 2762306a36Sopenharmony_ci#define ICS932S401_VENDOR 1 2862306a36Sopenharmony_ci#define ICS932S401_VENDOR_MASK 0x0F 2962306a36Sopenharmony_ci#define ICS932S401_REV 4 3062306a36Sopenharmony_ci#define ICS932S401_REV_SHIFT 4 3162306a36Sopenharmony_ci#define ICS932S401_REG_DEVICE 0x09 3262306a36Sopenharmony_ci#define ICS932S401_DEVICE 11 3362306a36Sopenharmony_ci#define ICS932S401_REG_CTRL 0x0A 3462306a36Sopenharmony_ci#define ICS932S401_MN_ENABLED 0x80 3562306a36Sopenharmony_ci#define ICS932S401_CPU_ALT 0x04 3662306a36Sopenharmony_ci#define ICS932S401_SRC_ALT 0x08 3762306a36Sopenharmony_ci#define ICS932S401_REG_CPU_M_CTRL 0x0B 3862306a36Sopenharmony_ci#define ICS932S401_M_MASK 0x3F 3962306a36Sopenharmony_ci#define ICS932S401_REG_CPU_N_CTRL 0x0C 4062306a36Sopenharmony_ci#define ICS932S401_REG_CPU_SPREAD1 0x0D 4162306a36Sopenharmony_ci#define ICS932S401_REG_CPU_SPREAD2 0x0E 4262306a36Sopenharmony_ci#define ICS932S401_SPREAD_MASK 0x7FFF 4362306a36Sopenharmony_ci#define ICS932S401_REG_SRC_M_CTRL 0x0F 4462306a36Sopenharmony_ci#define ICS932S401_REG_SRC_N_CTRL 0x10 4562306a36Sopenharmony_ci#define ICS932S401_REG_SRC_SPREAD1 0x11 4662306a36Sopenharmony_ci#define ICS932S401_REG_SRC_SPREAD2 0x12 4762306a36Sopenharmony_ci#define ICS932S401_REG_CPU_DIVISOR 0x13 4862306a36Sopenharmony_ci#define ICS932S401_CPU_DIVISOR_SHIFT 4 4962306a36Sopenharmony_ci#define ICS932S401_REG_PCISRC_DIVISOR 0x14 5062306a36Sopenharmony_ci#define ICS932S401_SRC_DIVISOR_MASK 0x0F 5162306a36Sopenharmony_ci#define ICS932S401_PCI_DIVISOR_SHIFT 4 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci/* Base clock is 14.318MHz */ 5462306a36Sopenharmony_ci#define BASE_CLOCK 14318 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ci#define NUM_REGS 21 5762306a36Sopenharmony_ci#define NUM_MIRRORED_REGS 15 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_cistatic int regs_to_copy[NUM_MIRRORED_REGS] = { 6062306a36Sopenharmony_ci ICS932S401_REG_CFG2, 6162306a36Sopenharmony_ci ICS932S401_REG_CFG7, 6262306a36Sopenharmony_ci ICS932S401_REG_VENDOR_REV, 6362306a36Sopenharmony_ci ICS932S401_REG_DEVICE, 6462306a36Sopenharmony_ci ICS932S401_REG_CTRL, 6562306a36Sopenharmony_ci ICS932S401_REG_CPU_M_CTRL, 6662306a36Sopenharmony_ci ICS932S401_REG_CPU_N_CTRL, 6762306a36Sopenharmony_ci ICS932S401_REG_CPU_SPREAD1, 6862306a36Sopenharmony_ci ICS932S401_REG_CPU_SPREAD2, 6962306a36Sopenharmony_ci ICS932S401_REG_SRC_M_CTRL, 7062306a36Sopenharmony_ci ICS932S401_REG_SRC_N_CTRL, 7162306a36Sopenharmony_ci ICS932S401_REG_SRC_SPREAD1, 7262306a36Sopenharmony_ci ICS932S401_REG_SRC_SPREAD2, 7362306a36Sopenharmony_ci ICS932S401_REG_CPU_DIVISOR, 7462306a36Sopenharmony_ci ICS932S401_REG_PCISRC_DIVISOR, 7562306a36Sopenharmony_ci}; 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci/* How often do we reread sensors values? (In jiffies) */ 7862306a36Sopenharmony_ci#define SENSOR_REFRESH_INTERVAL (2 * HZ) 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci/* How often do we reread sensor limit values? (In jiffies) */ 8162306a36Sopenharmony_ci#define LIMIT_REFRESH_INTERVAL (60 * HZ) 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_cistruct ics932s401_data { 8462306a36Sopenharmony_ci struct attribute_group attrs; 8562306a36Sopenharmony_ci struct mutex lock; 8662306a36Sopenharmony_ci char sensors_valid; 8762306a36Sopenharmony_ci unsigned long sensors_last_updated; /* In jiffies */ 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_ci u8 regs[NUM_REGS]; 9062306a36Sopenharmony_ci}; 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_cistatic int ics932s401_probe(struct i2c_client *client); 9362306a36Sopenharmony_cistatic int ics932s401_detect(struct i2c_client *client, 9462306a36Sopenharmony_ci struct i2c_board_info *info); 9562306a36Sopenharmony_cistatic void ics932s401_remove(struct i2c_client *client); 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_cistatic const struct i2c_device_id ics932s401_id[] = { 9862306a36Sopenharmony_ci { "ics932s401", 0 }, 9962306a36Sopenharmony_ci { } 10062306a36Sopenharmony_ci}; 10162306a36Sopenharmony_ciMODULE_DEVICE_TABLE(i2c, ics932s401_id); 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_cistatic struct i2c_driver ics932s401_driver = { 10462306a36Sopenharmony_ci .class = I2C_CLASS_HWMON, 10562306a36Sopenharmony_ci .driver = { 10662306a36Sopenharmony_ci .name = "ics932s401", 10762306a36Sopenharmony_ci }, 10862306a36Sopenharmony_ci .probe = ics932s401_probe, 10962306a36Sopenharmony_ci .remove = ics932s401_remove, 11062306a36Sopenharmony_ci .id_table = ics932s401_id, 11162306a36Sopenharmony_ci .detect = ics932s401_detect, 11262306a36Sopenharmony_ci .address_list = normal_i2c, 11362306a36Sopenharmony_ci}; 11462306a36Sopenharmony_ci 11562306a36Sopenharmony_cistatic struct ics932s401_data *ics932s401_update_device(struct device *dev) 11662306a36Sopenharmony_ci{ 11762306a36Sopenharmony_ci struct i2c_client *client = to_i2c_client(dev); 11862306a36Sopenharmony_ci struct ics932s401_data *data = i2c_get_clientdata(client); 11962306a36Sopenharmony_ci unsigned long local_jiffies = jiffies; 12062306a36Sopenharmony_ci int i, temp; 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_ci mutex_lock(&data->lock); 12362306a36Sopenharmony_ci if (time_before(local_jiffies, data->sensors_last_updated + 12462306a36Sopenharmony_ci SENSOR_REFRESH_INTERVAL) 12562306a36Sopenharmony_ci && data->sensors_valid) 12662306a36Sopenharmony_ci goto out; 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_ci /* 12962306a36Sopenharmony_ci * Each register must be read as a word and then right shifted 8 bits. 13062306a36Sopenharmony_ci * Not really sure why this is; setting the "byte count programming" 13162306a36Sopenharmony_ci * register to 1 does not fix this problem. 13262306a36Sopenharmony_ci */ 13362306a36Sopenharmony_ci for (i = 0; i < NUM_MIRRORED_REGS; i++) { 13462306a36Sopenharmony_ci temp = i2c_smbus_read_word_data(client, regs_to_copy[i]); 13562306a36Sopenharmony_ci if (temp < 0) 13662306a36Sopenharmony_ci temp = 0; 13762306a36Sopenharmony_ci data->regs[regs_to_copy[i]] = temp >> 8; 13862306a36Sopenharmony_ci } 13962306a36Sopenharmony_ci 14062306a36Sopenharmony_ci data->sensors_last_updated = local_jiffies; 14162306a36Sopenharmony_ci data->sensors_valid = 1; 14262306a36Sopenharmony_ci 14362306a36Sopenharmony_ciout: 14462306a36Sopenharmony_ci mutex_unlock(&data->lock); 14562306a36Sopenharmony_ci return data; 14662306a36Sopenharmony_ci} 14762306a36Sopenharmony_ci 14862306a36Sopenharmony_cistatic ssize_t show_spread_enabled(struct device *dev, 14962306a36Sopenharmony_ci struct device_attribute *devattr, 15062306a36Sopenharmony_ci char *buf) 15162306a36Sopenharmony_ci{ 15262306a36Sopenharmony_ci struct ics932s401_data *data = ics932s401_update_device(dev); 15362306a36Sopenharmony_ci 15462306a36Sopenharmony_ci if (data->regs[ICS932S401_REG_CFG2] & ICS932S401_CFG1_SPREAD) 15562306a36Sopenharmony_ci return sprintf(buf, "1\n"); 15662306a36Sopenharmony_ci 15762306a36Sopenharmony_ci return sprintf(buf, "0\n"); 15862306a36Sopenharmony_ci} 15962306a36Sopenharmony_ci 16062306a36Sopenharmony_ci/* bit to cpu khz map */ 16162306a36Sopenharmony_cistatic const int fs_speeds[] = { 16262306a36Sopenharmony_ci 266666, 16362306a36Sopenharmony_ci 133333, 16462306a36Sopenharmony_ci 200000, 16562306a36Sopenharmony_ci 166666, 16662306a36Sopenharmony_ci 333333, 16762306a36Sopenharmony_ci 100000, 16862306a36Sopenharmony_ci 400000, 16962306a36Sopenharmony_ci 0, 17062306a36Sopenharmony_ci}; 17162306a36Sopenharmony_ci 17262306a36Sopenharmony_ci/* clock divisor map */ 17362306a36Sopenharmony_cistatic const int divisors[] = {2, 3, 5, 15, 4, 6, 10, 30, 8, 12, 20, 60, 16, 17462306a36Sopenharmony_ci 24, 40, 120}; 17562306a36Sopenharmony_ci 17662306a36Sopenharmony_ci/* Calculate CPU frequency from the M/N registers. */ 17762306a36Sopenharmony_cistatic int calculate_cpu_freq(struct ics932s401_data *data) 17862306a36Sopenharmony_ci{ 17962306a36Sopenharmony_ci int m, n, freq; 18062306a36Sopenharmony_ci 18162306a36Sopenharmony_ci m = data->regs[ICS932S401_REG_CPU_M_CTRL] & ICS932S401_M_MASK; 18262306a36Sopenharmony_ci n = data->regs[ICS932S401_REG_CPU_N_CTRL]; 18362306a36Sopenharmony_ci 18462306a36Sopenharmony_ci /* Pull in bits 8 & 9 from the M register */ 18562306a36Sopenharmony_ci n |= ((int)data->regs[ICS932S401_REG_CPU_M_CTRL] & 0x80) << 1; 18662306a36Sopenharmony_ci n |= ((int)data->regs[ICS932S401_REG_CPU_M_CTRL] & 0x40) << 3; 18762306a36Sopenharmony_ci 18862306a36Sopenharmony_ci freq = BASE_CLOCK * (n + 8) / (m + 2); 18962306a36Sopenharmony_ci freq /= divisors[data->regs[ICS932S401_REG_CPU_DIVISOR] >> 19062306a36Sopenharmony_ci ICS932S401_CPU_DIVISOR_SHIFT]; 19162306a36Sopenharmony_ci 19262306a36Sopenharmony_ci return freq; 19362306a36Sopenharmony_ci} 19462306a36Sopenharmony_ci 19562306a36Sopenharmony_cistatic ssize_t show_cpu_clock(struct device *dev, 19662306a36Sopenharmony_ci struct device_attribute *devattr, 19762306a36Sopenharmony_ci char *buf) 19862306a36Sopenharmony_ci{ 19962306a36Sopenharmony_ci struct ics932s401_data *data = ics932s401_update_device(dev); 20062306a36Sopenharmony_ci 20162306a36Sopenharmony_ci return sprintf(buf, "%d\n", calculate_cpu_freq(data)); 20262306a36Sopenharmony_ci} 20362306a36Sopenharmony_ci 20462306a36Sopenharmony_cistatic ssize_t show_cpu_clock_sel(struct device *dev, 20562306a36Sopenharmony_ci struct device_attribute *devattr, 20662306a36Sopenharmony_ci char *buf) 20762306a36Sopenharmony_ci{ 20862306a36Sopenharmony_ci struct ics932s401_data *data = ics932s401_update_device(dev); 20962306a36Sopenharmony_ci int freq; 21062306a36Sopenharmony_ci 21162306a36Sopenharmony_ci if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED) 21262306a36Sopenharmony_ci freq = calculate_cpu_freq(data); 21362306a36Sopenharmony_ci else { 21462306a36Sopenharmony_ci /* Freq is neatly wrapped up for us */ 21562306a36Sopenharmony_ci int fid = data->regs[ICS932S401_REG_CFG7] & ICS932S401_FS_MASK; 21662306a36Sopenharmony_ci 21762306a36Sopenharmony_ci freq = fs_speeds[fid]; 21862306a36Sopenharmony_ci if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_CPU_ALT) { 21962306a36Sopenharmony_ci switch (freq) { 22062306a36Sopenharmony_ci case 166666: 22162306a36Sopenharmony_ci freq = 160000; 22262306a36Sopenharmony_ci break; 22362306a36Sopenharmony_ci case 333333: 22462306a36Sopenharmony_ci freq = 320000; 22562306a36Sopenharmony_ci break; 22662306a36Sopenharmony_ci } 22762306a36Sopenharmony_ci } 22862306a36Sopenharmony_ci } 22962306a36Sopenharmony_ci 23062306a36Sopenharmony_ci return sprintf(buf, "%d\n", freq); 23162306a36Sopenharmony_ci} 23262306a36Sopenharmony_ci 23362306a36Sopenharmony_ci/* Calculate SRC frequency from the M/N registers. */ 23462306a36Sopenharmony_cistatic int calculate_src_freq(struct ics932s401_data *data) 23562306a36Sopenharmony_ci{ 23662306a36Sopenharmony_ci int m, n, freq; 23762306a36Sopenharmony_ci 23862306a36Sopenharmony_ci m = data->regs[ICS932S401_REG_SRC_M_CTRL] & ICS932S401_M_MASK; 23962306a36Sopenharmony_ci n = data->regs[ICS932S401_REG_SRC_N_CTRL]; 24062306a36Sopenharmony_ci 24162306a36Sopenharmony_ci /* Pull in bits 8 & 9 from the M register */ 24262306a36Sopenharmony_ci n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x80) << 1; 24362306a36Sopenharmony_ci n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x40) << 3; 24462306a36Sopenharmony_ci 24562306a36Sopenharmony_ci freq = BASE_CLOCK * (n + 8) / (m + 2); 24662306a36Sopenharmony_ci freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] & 24762306a36Sopenharmony_ci ICS932S401_SRC_DIVISOR_MASK]; 24862306a36Sopenharmony_ci 24962306a36Sopenharmony_ci return freq; 25062306a36Sopenharmony_ci} 25162306a36Sopenharmony_ci 25262306a36Sopenharmony_cistatic ssize_t show_src_clock(struct device *dev, 25362306a36Sopenharmony_ci struct device_attribute *devattr, 25462306a36Sopenharmony_ci char *buf) 25562306a36Sopenharmony_ci{ 25662306a36Sopenharmony_ci struct ics932s401_data *data = ics932s401_update_device(dev); 25762306a36Sopenharmony_ci 25862306a36Sopenharmony_ci return sprintf(buf, "%d\n", calculate_src_freq(data)); 25962306a36Sopenharmony_ci} 26062306a36Sopenharmony_ci 26162306a36Sopenharmony_cistatic ssize_t show_src_clock_sel(struct device *dev, 26262306a36Sopenharmony_ci struct device_attribute *devattr, 26362306a36Sopenharmony_ci char *buf) 26462306a36Sopenharmony_ci{ 26562306a36Sopenharmony_ci struct ics932s401_data *data = ics932s401_update_device(dev); 26662306a36Sopenharmony_ci int freq; 26762306a36Sopenharmony_ci 26862306a36Sopenharmony_ci if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED) 26962306a36Sopenharmony_ci freq = calculate_src_freq(data); 27062306a36Sopenharmony_ci else 27162306a36Sopenharmony_ci /* Freq is neatly wrapped up for us */ 27262306a36Sopenharmony_ci if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_CPU_ALT && 27362306a36Sopenharmony_ci data->regs[ICS932S401_REG_CTRL] & ICS932S401_SRC_ALT) 27462306a36Sopenharmony_ci freq = 96000; 27562306a36Sopenharmony_ci else 27662306a36Sopenharmony_ci freq = 100000; 27762306a36Sopenharmony_ci 27862306a36Sopenharmony_ci return sprintf(buf, "%d\n", freq); 27962306a36Sopenharmony_ci} 28062306a36Sopenharmony_ci 28162306a36Sopenharmony_ci/* Calculate PCI frequency from the SRC M/N registers. */ 28262306a36Sopenharmony_cistatic int calculate_pci_freq(struct ics932s401_data *data) 28362306a36Sopenharmony_ci{ 28462306a36Sopenharmony_ci int m, n, freq; 28562306a36Sopenharmony_ci 28662306a36Sopenharmony_ci m = data->regs[ICS932S401_REG_SRC_M_CTRL] & ICS932S401_M_MASK; 28762306a36Sopenharmony_ci n = data->regs[ICS932S401_REG_SRC_N_CTRL]; 28862306a36Sopenharmony_ci 28962306a36Sopenharmony_ci /* Pull in bits 8 & 9 from the M register */ 29062306a36Sopenharmony_ci n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x80) << 1; 29162306a36Sopenharmony_ci n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x40) << 3; 29262306a36Sopenharmony_ci 29362306a36Sopenharmony_ci freq = BASE_CLOCK * (n + 8) / (m + 2); 29462306a36Sopenharmony_ci freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] >> 29562306a36Sopenharmony_ci ICS932S401_PCI_DIVISOR_SHIFT]; 29662306a36Sopenharmony_ci 29762306a36Sopenharmony_ci return freq; 29862306a36Sopenharmony_ci} 29962306a36Sopenharmony_ci 30062306a36Sopenharmony_cistatic ssize_t show_pci_clock(struct device *dev, 30162306a36Sopenharmony_ci struct device_attribute *devattr, 30262306a36Sopenharmony_ci char *buf) 30362306a36Sopenharmony_ci{ 30462306a36Sopenharmony_ci struct ics932s401_data *data = ics932s401_update_device(dev); 30562306a36Sopenharmony_ci 30662306a36Sopenharmony_ci return sprintf(buf, "%d\n", calculate_pci_freq(data)); 30762306a36Sopenharmony_ci} 30862306a36Sopenharmony_ci 30962306a36Sopenharmony_cistatic ssize_t show_pci_clock_sel(struct device *dev, 31062306a36Sopenharmony_ci struct device_attribute *devattr, 31162306a36Sopenharmony_ci char *buf) 31262306a36Sopenharmony_ci{ 31362306a36Sopenharmony_ci struct ics932s401_data *data = ics932s401_update_device(dev); 31462306a36Sopenharmony_ci int freq; 31562306a36Sopenharmony_ci 31662306a36Sopenharmony_ci if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED) 31762306a36Sopenharmony_ci freq = calculate_pci_freq(data); 31862306a36Sopenharmony_ci else 31962306a36Sopenharmony_ci freq = 33333; 32062306a36Sopenharmony_ci 32162306a36Sopenharmony_ci return sprintf(buf, "%d\n", freq); 32262306a36Sopenharmony_ci} 32362306a36Sopenharmony_ci 32462306a36Sopenharmony_cistatic ssize_t show_value(struct device *dev, 32562306a36Sopenharmony_ci struct device_attribute *devattr, 32662306a36Sopenharmony_ci char *buf); 32762306a36Sopenharmony_ci 32862306a36Sopenharmony_cistatic ssize_t show_spread(struct device *dev, 32962306a36Sopenharmony_ci struct device_attribute *devattr, 33062306a36Sopenharmony_ci char *buf); 33162306a36Sopenharmony_ci 33262306a36Sopenharmony_cistatic DEVICE_ATTR(spread_enabled, S_IRUGO, show_spread_enabled, NULL); 33362306a36Sopenharmony_cistatic DEVICE_ATTR(cpu_clock_selection, S_IRUGO, show_cpu_clock_sel, NULL); 33462306a36Sopenharmony_cistatic DEVICE_ATTR(cpu_clock, S_IRUGO, show_cpu_clock, NULL); 33562306a36Sopenharmony_cistatic DEVICE_ATTR(src_clock_selection, S_IRUGO, show_src_clock_sel, NULL); 33662306a36Sopenharmony_cistatic DEVICE_ATTR(src_clock, S_IRUGO, show_src_clock, NULL); 33762306a36Sopenharmony_cistatic DEVICE_ATTR(pci_clock_selection, S_IRUGO, show_pci_clock_sel, NULL); 33862306a36Sopenharmony_cistatic DEVICE_ATTR(pci_clock, S_IRUGO, show_pci_clock, NULL); 33962306a36Sopenharmony_cistatic DEVICE_ATTR(usb_clock, S_IRUGO, show_value, NULL); 34062306a36Sopenharmony_cistatic DEVICE_ATTR(ref_clock, S_IRUGO, show_value, NULL); 34162306a36Sopenharmony_cistatic DEVICE_ATTR(cpu_spread, S_IRUGO, show_spread, NULL); 34262306a36Sopenharmony_cistatic DEVICE_ATTR(src_spread, S_IRUGO, show_spread, NULL); 34362306a36Sopenharmony_ci 34462306a36Sopenharmony_cistatic struct attribute *ics932s401_attr[] = { 34562306a36Sopenharmony_ci &dev_attr_spread_enabled.attr, 34662306a36Sopenharmony_ci &dev_attr_cpu_clock_selection.attr, 34762306a36Sopenharmony_ci &dev_attr_cpu_clock.attr, 34862306a36Sopenharmony_ci &dev_attr_src_clock_selection.attr, 34962306a36Sopenharmony_ci &dev_attr_src_clock.attr, 35062306a36Sopenharmony_ci &dev_attr_pci_clock_selection.attr, 35162306a36Sopenharmony_ci &dev_attr_pci_clock.attr, 35262306a36Sopenharmony_ci &dev_attr_usb_clock.attr, 35362306a36Sopenharmony_ci &dev_attr_ref_clock.attr, 35462306a36Sopenharmony_ci &dev_attr_cpu_spread.attr, 35562306a36Sopenharmony_ci &dev_attr_src_spread.attr, 35662306a36Sopenharmony_ci NULL 35762306a36Sopenharmony_ci}; 35862306a36Sopenharmony_ci 35962306a36Sopenharmony_cistatic ssize_t show_value(struct device *dev, 36062306a36Sopenharmony_ci struct device_attribute *devattr, 36162306a36Sopenharmony_ci char *buf) 36262306a36Sopenharmony_ci{ 36362306a36Sopenharmony_ci int x; 36462306a36Sopenharmony_ci 36562306a36Sopenharmony_ci if (devattr == &dev_attr_usb_clock) 36662306a36Sopenharmony_ci x = 48000; 36762306a36Sopenharmony_ci else if (devattr == &dev_attr_ref_clock) 36862306a36Sopenharmony_ci x = BASE_CLOCK; 36962306a36Sopenharmony_ci else 37062306a36Sopenharmony_ci BUG(); 37162306a36Sopenharmony_ci 37262306a36Sopenharmony_ci return sprintf(buf, "%d\n", x); 37362306a36Sopenharmony_ci} 37462306a36Sopenharmony_ci 37562306a36Sopenharmony_cistatic ssize_t show_spread(struct device *dev, 37662306a36Sopenharmony_ci struct device_attribute *devattr, 37762306a36Sopenharmony_ci char *buf) 37862306a36Sopenharmony_ci{ 37962306a36Sopenharmony_ci struct ics932s401_data *data = ics932s401_update_device(dev); 38062306a36Sopenharmony_ci int reg; 38162306a36Sopenharmony_ci unsigned long val; 38262306a36Sopenharmony_ci 38362306a36Sopenharmony_ci if (!(data->regs[ICS932S401_REG_CFG2] & ICS932S401_CFG1_SPREAD)) 38462306a36Sopenharmony_ci return sprintf(buf, "0%%\n"); 38562306a36Sopenharmony_ci 38662306a36Sopenharmony_ci if (devattr == &dev_attr_src_spread) 38762306a36Sopenharmony_ci reg = ICS932S401_REG_SRC_SPREAD1; 38862306a36Sopenharmony_ci else if (devattr == &dev_attr_cpu_spread) 38962306a36Sopenharmony_ci reg = ICS932S401_REG_CPU_SPREAD1; 39062306a36Sopenharmony_ci else 39162306a36Sopenharmony_ci BUG(); 39262306a36Sopenharmony_ci 39362306a36Sopenharmony_ci val = data->regs[reg] | (data->regs[reg + 1] << 8); 39462306a36Sopenharmony_ci val &= ICS932S401_SPREAD_MASK; 39562306a36Sopenharmony_ci 39662306a36Sopenharmony_ci /* Scale 0..2^14 to -0.5. */ 39762306a36Sopenharmony_ci val = 500000 * val / 16384; 39862306a36Sopenharmony_ci return sprintf(buf, "-0.%lu%%\n", val); 39962306a36Sopenharmony_ci} 40062306a36Sopenharmony_ci 40162306a36Sopenharmony_ci/* Return 0 if detection is successful, -ENODEV otherwise */ 40262306a36Sopenharmony_cistatic int ics932s401_detect(struct i2c_client *client, 40362306a36Sopenharmony_ci struct i2c_board_info *info) 40462306a36Sopenharmony_ci{ 40562306a36Sopenharmony_ci struct i2c_adapter *adapter = client->adapter; 40662306a36Sopenharmony_ci int vendor, device, revision; 40762306a36Sopenharmony_ci 40862306a36Sopenharmony_ci if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 40962306a36Sopenharmony_ci return -ENODEV; 41062306a36Sopenharmony_ci 41162306a36Sopenharmony_ci vendor = i2c_smbus_read_word_data(client, ICS932S401_REG_VENDOR_REV); 41262306a36Sopenharmony_ci vendor >>= 8; 41362306a36Sopenharmony_ci revision = vendor >> ICS932S401_REV_SHIFT; 41462306a36Sopenharmony_ci vendor &= ICS932S401_VENDOR_MASK; 41562306a36Sopenharmony_ci if (vendor != ICS932S401_VENDOR) 41662306a36Sopenharmony_ci return -ENODEV; 41762306a36Sopenharmony_ci 41862306a36Sopenharmony_ci device = i2c_smbus_read_word_data(client, ICS932S401_REG_DEVICE); 41962306a36Sopenharmony_ci device >>= 8; 42062306a36Sopenharmony_ci if (device != ICS932S401_DEVICE) 42162306a36Sopenharmony_ci return -ENODEV; 42262306a36Sopenharmony_ci 42362306a36Sopenharmony_ci if (revision != ICS932S401_REV) 42462306a36Sopenharmony_ci dev_info(&adapter->dev, "Unknown revision %d\n", revision); 42562306a36Sopenharmony_ci 42662306a36Sopenharmony_ci strscpy(info->type, "ics932s401", I2C_NAME_SIZE); 42762306a36Sopenharmony_ci 42862306a36Sopenharmony_ci return 0; 42962306a36Sopenharmony_ci} 43062306a36Sopenharmony_ci 43162306a36Sopenharmony_cistatic int ics932s401_probe(struct i2c_client *client) 43262306a36Sopenharmony_ci{ 43362306a36Sopenharmony_ci struct ics932s401_data *data; 43462306a36Sopenharmony_ci int err; 43562306a36Sopenharmony_ci 43662306a36Sopenharmony_ci data = kzalloc(sizeof(struct ics932s401_data), GFP_KERNEL); 43762306a36Sopenharmony_ci if (!data) { 43862306a36Sopenharmony_ci err = -ENOMEM; 43962306a36Sopenharmony_ci goto exit; 44062306a36Sopenharmony_ci } 44162306a36Sopenharmony_ci 44262306a36Sopenharmony_ci i2c_set_clientdata(client, data); 44362306a36Sopenharmony_ci mutex_init(&data->lock); 44462306a36Sopenharmony_ci 44562306a36Sopenharmony_ci dev_info(&client->dev, "%s chip found\n", client->name); 44662306a36Sopenharmony_ci 44762306a36Sopenharmony_ci /* Register sysfs hooks */ 44862306a36Sopenharmony_ci data->attrs.attrs = ics932s401_attr; 44962306a36Sopenharmony_ci err = sysfs_create_group(&client->dev.kobj, &data->attrs); 45062306a36Sopenharmony_ci if (err) 45162306a36Sopenharmony_ci goto exit_free; 45262306a36Sopenharmony_ci 45362306a36Sopenharmony_ci return 0; 45462306a36Sopenharmony_ci 45562306a36Sopenharmony_ciexit_free: 45662306a36Sopenharmony_ci kfree(data); 45762306a36Sopenharmony_ciexit: 45862306a36Sopenharmony_ci return err; 45962306a36Sopenharmony_ci} 46062306a36Sopenharmony_ci 46162306a36Sopenharmony_cistatic void ics932s401_remove(struct i2c_client *client) 46262306a36Sopenharmony_ci{ 46362306a36Sopenharmony_ci struct ics932s401_data *data = i2c_get_clientdata(client); 46462306a36Sopenharmony_ci 46562306a36Sopenharmony_ci sysfs_remove_group(&client->dev.kobj, &data->attrs); 46662306a36Sopenharmony_ci kfree(data); 46762306a36Sopenharmony_ci} 46862306a36Sopenharmony_ci 46962306a36Sopenharmony_cimodule_i2c_driver(ics932s401_driver); 47062306a36Sopenharmony_ci 47162306a36Sopenharmony_ciMODULE_AUTHOR("Darrick J. Wong <darrick.wong@oracle.com>"); 47262306a36Sopenharmony_ciMODULE_DESCRIPTION("ICS932S401 driver"); 47362306a36Sopenharmony_ciMODULE_LICENSE("GPL"); 47462306a36Sopenharmony_ci 47562306a36Sopenharmony_ci/* IBM IntelliStation Z30 */ 47662306a36Sopenharmony_ciMODULE_ALIAS("dmi:bvnIBM:*:rn9228:*"); 47762306a36Sopenharmony_ciMODULE_ALIAS("dmi:bvnIBM:*:rn9232:*"); 47862306a36Sopenharmony_ci 47962306a36Sopenharmony_ci/* IBM x3650/x3550 */ 48062306a36Sopenharmony_ciMODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3650*"); 48162306a36Sopenharmony_ciMODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3550*"); 482