162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only
262306a36Sopenharmony_ci#
362306a36Sopenharmony_ci# Memory devices
462306a36Sopenharmony_ci#
562306a36Sopenharmony_ci
662306a36Sopenharmony_cimenuconfig MEMORY
762306a36Sopenharmony_ci	bool "Memory Controller drivers"
862306a36Sopenharmony_ci	help
962306a36Sopenharmony_ci	  This option allows to enable specific memory controller drivers,
1062306a36Sopenharmony_ci	  useful mostly on embedded systems.  These could be controllers
1162306a36Sopenharmony_ci	  for DRAM (SDR, DDR), ROM, SRAM and others.  The drivers features
1262306a36Sopenharmony_ci	  vary from memory tuning and frequency scaling to enabling
1362306a36Sopenharmony_ci	  access to attached peripherals through memory bus.
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ciif MEMORY
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ciconfig DDR
1862306a36Sopenharmony_ci	bool
1962306a36Sopenharmony_ci	help
2062306a36Sopenharmony_ci	  Data from JEDEC specs for DDR SDRAM memories,
2162306a36Sopenharmony_ci	  particularly the AC timing parameters and addressing
2262306a36Sopenharmony_ci	  information. This data is useful for drivers handling
2362306a36Sopenharmony_ci	  DDR SDRAM controllers.
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ciconfig ARM_PL172_MPMC
2662306a36Sopenharmony_ci	tristate "ARM PL172 MPMC driver"
2762306a36Sopenharmony_ci	depends on ARM_AMBA && OF
2862306a36Sopenharmony_ci	help
2962306a36Sopenharmony_ci	  This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
3062306a36Sopenharmony_ci	  If you have an embedded system with an AMBA bus and a PL172
3162306a36Sopenharmony_ci	  controller, say Y or M here.
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ciconfig ATMEL_EBI
3462306a36Sopenharmony_ci	bool "Atmel EBI driver"
3562306a36Sopenharmony_ci	default y if ARCH_AT91
3662306a36Sopenharmony_ci	depends on ARCH_AT91 || COMPILE_TEST
3762306a36Sopenharmony_ci	depends on OF
3862306a36Sopenharmony_ci	select MFD_SYSCON
3962306a36Sopenharmony_ci	select MFD_ATMEL_SMC
4062306a36Sopenharmony_ci	help
4162306a36Sopenharmony_ci	  Driver for Atmel EBI controller.
4262306a36Sopenharmony_ci	  Used to configure the EBI (external bus interface) when the device-
4362306a36Sopenharmony_ci	  tree is used. This bus supports NANDs, external ethernet controller,
4462306a36Sopenharmony_ci	  SRAMs, ATA devices, etc.
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ciconfig BRCMSTB_DPFE
4762306a36Sopenharmony_ci	tristate "Broadcom STB DPFE driver"
4862306a36Sopenharmony_ci	default ARCH_BRCMSTB
4962306a36Sopenharmony_ci	depends on ARCH_BRCMSTB || COMPILE_TEST
5062306a36Sopenharmony_ci	help
5162306a36Sopenharmony_ci	  This driver provides access to the DPFE interface of Broadcom
5262306a36Sopenharmony_ci	  STB SoCs. The firmware running on the DCPU inside the DDR PHY can
5362306a36Sopenharmony_ci	  provide current information about the system's RAM, for instance
5462306a36Sopenharmony_ci	  the DRAM refresh rate. This can be used as an indirect indicator
5562306a36Sopenharmony_ci	  for the DRAM's temperature. Slower refresh rate means cooler RAM,
5662306a36Sopenharmony_ci	  higher refresh rate means hotter RAM.
5762306a36Sopenharmony_ci
5862306a36Sopenharmony_ciconfig BRCMSTB_MEMC
5962306a36Sopenharmony_ci	tristate "Broadcom STB MEMC driver"
6062306a36Sopenharmony_ci	default ARCH_BRCMSTB
6162306a36Sopenharmony_ci	depends on ARCH_BRCMSTB || COMPILE_TEST
6262306a36Sopenharmony_ci	help
6362306a36Sopenharmony_ci	  This driver provides a way to configure the Broadcom STB memory
6462306a36Sopenharmony_ci	  controller and specifically control the Self Refresh Power Down
6562306a36Sopenharmony_ci	  (SRPD) inactivity timeout.
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ciconfig BT1_L2_CTL
6862306a36Sopenharmony_ci	bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
6962306a36Sopenharmony_ci	depends on MIPS_BAIKAL_T1 || COMPILE_TEST
7062306a36Sopenharmony_ci	select MFD_SYSCON
7162306a36Sopenharmony_ci	help
7262306a36Sopenharmony_ci	  Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
7362306a36Sopenharmony_ci	  resides Coherency Manager v2 with embedded 1MB L2-cache. It's
7462306a36Sopenharmony_ci	  possible to tune the L2 cache performance up by setting the data,
7562306a36Sopenharmony_ci	  tags and way-select latencies of RAM access. This driver provides a
7662306a36Sopenharmony_ci	  dt properties-based and sysfs interface for it.
7762306a36Sopenharmony_ci
7862306a36Sopenharmony_ciconfig TI_AEMIF
7962306a36Sopenharmony_ci	tristate "Texas Instruments AEMIF driver"
8062306a36Sopenharmony_ci	depends on ARCH_DAVINCI || ARCH_KEYSTONE || COMPILE_TEST
8162306a36Sopenharmony_ci	depends on OF
8262306a36Sopenharmony_ci	help
8362306a36Sopenharmony_ci	  This driver is for the AEMIF module available in Texas Instruments
8462306a36Sopenharmony_ci	  SoCs. AEMIF stands for Asynchronous External Memory Interface and
8562306a36Sopenharmony_ci	  is intended to provide a glue-less interface to a variety of
8662306a36Sopenharmony_ci	  asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
8762306a36Sopenharmony_ci	  of 256M bytes of any of these memories can be accessed at a given
8862306a36Sopenharmony_ci	  time via four chip selects with 64M byte access per chip select.
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ciconfig TI_EMIF
9162306a36Sopenharmony_ci	tristate "Texas Instruments EMIF driver"
9262306a36Sopenharmony_ci	depends on ARCH_OMAP2PLUS || COMPILE_TEST
9362306a36Sopenharmony_ci	select DDR
9462306a36Sopenharmony_ci	help
9562306a36Sopenharmony_ci	  This driver is for the EMIF module available in Texas Instruments
9662306a36Sopenharmony_ci	  SoCs. EMIF is an SDRAM controller that, based on its revision,
9762306a36Sopenharmony_ci	  supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
9862306a36Sopenharmony_ci	  This driver takes care of only LPDDR2 memories presently. The
9962306a36Sopenharmony_ci	  functions of the driver includes re-configuring AC timing
10062306a36Sopenharmony_ci	  parameters and other settings during frequency, voltage and
10162306a36Sopenharmony_ci	  temperature changes
10262306a36Sopenharmony_ci
10362306a36Sopenharmony_ciconfig OMAP_GPMC
10462306a36Sopenharmony_ci	tristate "Texas Instruments OMAP SoC GPMC driver"
10562306a36Sopenharmony_ci	depends on OF_ADDRESS
10662306a36Sopenharmony_ci	depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
10762306a36Sopenharmony_ci	select GPIOLIB
10862306a36Sopenharmony_ci	help
10962306a36Sopenharmony_ci	  This driver is for the General Purpose Memory Controller (GPMC)
11062306a36Sopenharmony_ci	  present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
11162306a36Sopenharmony_ci	  interfacing to a variety of asynchronous as well as synchronous
11262306a36Sopenharmony_ci	  memory drives like NOR, NAND, OneNAND, SRAM.
11362306a36Sopenharmony_ci
11462306a36Sopenharmony_ciconfig OMAP_GPMC_DEBUG
11562306a36Sopenharmony_ci	bool "Enable GPMC debug output and skip reset of GPMC during init"
11662306a36Sopenharmony_ci	depends on OMAP_GPMC
11762306a36Sopenharmony_ci	help
11862306a36Sopenharmony_ci	  Enables verbose debugging mostly to decode the bootloader provided
11962306a36Sopenharmony_ci	  timings. To preserve the bootloader provided timings, the reset
12062306a36Sopenharmony_ci	  of GPMC is skipped during init. Enable this during development to
12162306a36Sopenharmony_ci	  configure devices connected to the GPMC bus.
12262306a36Sopenharmony_ci
12362306a36Sopenharmony_ci	  NOTE: In addition to matching the register setup with the bootloader
12462306a36Sopenharmony_ci	  you also need to match the GPMC FCLK frequency used by the
12562306a36Sopenharmony_ci	  bootloader or else the GPMC timings won't be identical with the
12662306a36Sopenharmony_ci	  bootloader timings.
12762306a36Sopenharmony_ci
12862306a36Sopenharmony_ciconfig TI_EMIF_SRAM
12962306a36Sopenharmony_ci	tristate "Texas Instruments EMIF SRAM driver"
13062306a36Sopenharmony_ci	depends on SOC_AM33XX || SOC_AM43XX || (ARM && CPU_V7 && COMPILE_TEST)
13162306a36Sopenharmony_ci	depends on SRAM
13262306a36Sopenharmony_ci	help
13362306a36Sopenharmony_ci	  This driver is for the EMIF module available on Texas Instruments
13462306a36Sopenharmony_ci	  AM33XX and AM43XX SoCs and is required for PM. Certain parts of
13562306a36Sopenharmony_ci	  the EMIF PM code must run from on-chip SRAM late in the suspend
13662306a36Sopenharmony_ci	  sequence so this driver provides several relocatable PM functions
13762306a36Sopenharmony_ci	  for the SoC PM code to use.
13862306a36Sopenharmony_ci
13962306a36Sopenharmony_ciconfig FPGA_DFL_EMIF
14062306a36Sopenharmony_ci	tristate "FPGA DFL EMIF Driver"
14162306a36Sopenharmony_ci	depends on FPGA_DFL && HAS_IOMEM
14262306a36Sopenharmony_ci	help
14362306a36Sopenharmony_ci	  This driver is for the EMIF private feature implemented under
14462306a36Sopenharmony_ci	  FPGA Device Feature List (DFL) framework. It is used to expose
14562306a36Sopenharmony_ci	  memory interface status information as well as memory clearing
14662306a36Sopenharmony_ci	  control.
14762306a36Sopenharmony_ci
14862306a36Sopenharmony_ciconfig MVEBU_DEVBUS
14962306a36Sopenharmony_ci	bool "Marvell EBU Device Bus Controller"
15062306a36Sopenharmony_ci	default y if PLAT_ORION
15162306a36Sopenharmony_ci	depends on PLAT_ORION || COMPILE_TEST
15262306a36Sopenharmony_ci	depends on OF
15362306a36Sopenharmony_ci	help
15462306a36Sopenharmony_ci	  This driver is for the Device Bus controller available in some
15562306a36Sopenharmony_ci	  Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
15662306a36Sopenharmony_ci	  Armada 370 and Armada XP. This controller allows to handle flash
15762306a36Sopenharmony_ci	  devices such as NOR, NAND, SRAM, and FPGA.
15862306a36Sopenharmony_ci
15962306a36Sopenharmony_ciconfig FSL_CORENET_CF
16062306a36Sopenharmony_ci	tristate "Freescale CoreNet Error Reporting"
16162306a36Sopenharmony_ci	depends on FSL_SOC_BOOKE || COMPILE_TEST
16262306a36Sopenharmony_ci	help
16362306a36Sopenharmony_ci	  Say Y for reporting of errors from the Freescale CoreNet
16462306a36Sopenharmony_ci	  Coherency Fabric.  Errors reported include accesses to
16562306a36Sopenharmony_ci	  physical addresses that mapped by no local access window
16662306a36Sopenharmony_ci	  (LAW) or an invalid LAW, as well as bad cache state that
16762306a36Sopenharmony_ci	  represents a coherency violation.
16862306a36Sopenharmony_ci
16962306a36Sopenharmony_ciconfig FSL_IFC
17062306a36Sopenharmony_ci	bool "Freescale IFC driver" if COMPILE_TEST
17162306a36Sopenharmony_ci	depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
17262306a36Sopenharmony_ci	depends on HAS_IOMEM
17362306a36Sopenharmony_ci
17462306a36Sopenharmony_ciconfig JZ4780_NEMC
17562306a36Sopenharmony_ci	bool "Ingenic JZ4780 SoC NEMC driver"
17662306a36Sopenharmony_ci	depends on MIPS || COMPILE_TEST
17762306a36Sopenharmony_ci	depends on HAS_IOMEM && OF
17862306a36Sopenharmony_ci	help
17962306a36Sopenharmony_ci	  This driver is for the NAND/External Memory Controller (NEMC) in
18062306a36Sopenharmony_ci	  the Ingenic JZ4780. This controller is used to handle external
18162306a36Sopenharmony_ci	  memory devices such as NAND and SRAM.
18262306a36Sopenharmony_ci
18362306a36Sopenharmony_ciconfig MTK_SMI
18462306a36Sopenharmony_ci	tristate "MediaTek SoC Memory Controller driver" if COMPILE_TEST
18562306a36Sopenharmony_ci	depends on ARCH_MEDIATEK || COMPILE_TEST
18662306a36Sopenharmony_ci	help
18762306a36Sopenharmony_ci	  This driver is for the Memory Controller module in MediaTek SoCs,
18862306a36Sopenharmony_ci	  mainly help enable/disable iommu and control the power domain and
18962306a36Sopenharmony_ci	  clocks for each local arbiter.
19062306a36Sopenharmony_ci
19162306a36Sopenharmony_ciconfig DA8XX_DDRCTL
19262306a36Sopenharmony_ci	bool "Texas Instruments da8xx DDR2/mDDR driver"
19362306a36Sopenharmony_ci	depends on ARCH_DAVINCI_DA8XX || COMPILE_TEST
19462306a36Sopenharmony_ci	help
19562306a36Sopenharmony_ci	  This driver is for the DDR2/mDDR Memory Controller present on
19662306a36Sopenharmony_ci	  Texas Instruments da8xx SoCs. It's used to tweak various memory
19762306a36Sopenharmony_ci	  controller configuration options.
19862306a36Sopenharmony_ci
19962306a36Sopenharmony_ciconfig PL353_SMC
20062306a36Sopenharmony_ci	tristate "ARM PL35X Static Memory Controller(SMC) driver"
20162306a36Sopenharmony_ci	default y if ARM
20262306a36Sopenharmony_ci	depends on ARM || COMPILE_TEST
20362306a36Sopenharmony_ci	depends on ARM_AMBA
20462306a36Sopenharmony_ci	help
20562306a36Sopenharmony_ci	  This driver is for the ARM PL351/PL353 Static Memory
20662306a36Sopenharmony_ci	  Controller(SMC) module.
20762306a36Sopenharmony_ci
20862306a36Sopenharmony_ciconfig RENESAS_RPCIF
20962306a36Sopenharmony_ci	tristate "Renesas RPC-IF driver"
21062306a36Sopenharmony_ci	depends on ARCH_RENESAS || COMPILE_TEST
21162306a36Sopenharmony_ci	select REGMAP_MMIO
21262306a36Sopenharmony_ci	select RESET_CONTROLLER
21362306a36Sopenharmony_ci	help
21462306a36Sopenharmony_ci	  This supports Renesas R-Car Gen3 or RZ/G2 RPC-IF which provides
21562306a36Sopenharmony_ci	  either SPI host or HyperFlash. You'll have to select individual
21662306a36Sopenharmony_ci	  components under the corresponding menu.
21762306a36Sopenharmony_ci
21862306a36Sopenharmony_ciconfig STM32_FMC2_EBI
21962306a36Sopenharmony_ci	tristate "Support for FMC2 External Bus Interface on STM32MP SoCs"
22062306a36Sopenharmony_ci	depends on ARCH_STM32 || COMPILE_TEST
22162306a36Sopenharmony_ci	select MFD_SYSCON
22262306a36Sopenharmony_ci	help
22362306a36Sopenharmony_ci	  Select this option to enable the STM32 FMC2 External Bus Interface
22462306a36Sopenharmony_ci	  controller. This driver configures the transactions with external
22562306a36Sopenharmony_ci	  devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on
22662306a36Sopenharmony_ci	  SOCs containing the FMC2 External Bus Interface.
22762306a36Sopenharmony_ci
22862306a36Sopenharmony_cisource "drivers/memory/samsung/Kconfig"
22962306a36Sopenharmony_cisource "drivers/memory/tegra/Kconfig"
23062306a36Sopenharmony_ci
23162306a36Sopenharmony_ciendif
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