162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Xilinx Video Timing Controller 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2013-2015 Ideas on Board 662306a36Sopenharmony_ci * Copyright (C) 2013-2015 Xilinx, Inc. 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * Contacts: Hyun Kwon <hyun.kwon@xilinx.com> 962306a36Sopenharmony_ci * Laurent Pinchart <laurent.pinchart@ideasonboard.com> 1062306a36Sopenharmony_ci */ 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#ifndef __XILINX_VTC_H__ 1362306a36Sopenharmony_ci#define __XILINX_VTC_H__ 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_cistruct device_node; 1662306a36Sopenharmony_cistruct xvtc_device; 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci#define XVTC_MAX_HSIZE 8191 1962306a36Sopenharmony_ci#define XVTC_MAX_VSIZE 8191 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_cistruct xvtc_config { 2262306a36Sopenharmony_ci unsigned int hblank_start; 2362306a36Sopenharmony_ci unsigned int hsync_start; 2462306a36Sopenharmony_ci unsigned int hsync_end; 2562306a36Sopenharmony_ci unsigned int hsize; 2662306a36Sopenharmony_ci unsigned int vblank_start; 2762306a36Sopenharmony_ci unsigned int vsync_start; 2862306a36Sopenharmony_ci unsigned int vsync_end; 2962306a36Sopenharmony_ci unsigned int vsize; 3062306a36Sopenharmony_ci}; 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_cistruct xvtc_device *xvtc_of_get(struct device_node *np); 3362306a36Sopenharmony_civoid xvtc_put(struct xvtc_device *xvtc); 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ciint xvtc_generator_start(struct xvtc_device *xvtc, 3662306a36Sopenharmony_ci const struct xvtc_config *config); 3762306a36Sopenharmony_ciint xvtc_generator_stop(struct xvtc_device *xvtc); 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci#endif /* __XILINX_VTC_H__ */ 40