1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * TI VPFE capture Driver 4 * 5 * Copyright (C) 2013 - 2014 Texas Instruments, Inc. 6 * 7 * Benoit Parrot <bparrot@ti.com> 8 * Lad, Prabhakar <prabhakar.csengg@gmail.com> 9 */ 10 11#include <linux/delay.h> 12#include <linux/err.h> 13#include <linux/init.h> 14#include <linux/interrupt.h> 15#include <linux/io.h> 16#include <linux/module.h> 17#include <linux/of_graph.h> 18#include <linux/pinctrl/consumer.h> 19#include <linux/platform_device.h> 20#include <linux/pm_runtime.h> 21#include <linux/slab.h> 22#include <linux/uaccess.h> 23#include <linux/videodev2.h> 24 25#include <media/v4l2-common.h> 26#include <media/v4l2-ctrls.h> 27#include <media/v4l2-event.h> 28#include <media/v4l2-fwnode.h> 29#include <media/v4l2-rect.h> 30 31#include "am437x-vpfe.h" 32 33#define VPFE_MODULE_NAME "vpfe" 34#define VPFE_VERSION "0.1.0" 35 36static int debug; 37module_param(debug, int, 0644); 38MODULE_PARM_DESC(debug, "Debug level 0-8"); 39 40#define vpfe_dbg(level, dev, fmt, arg...) \ 41 v4l2_dbg(level, debug, &dev->v4l2_dev, fmt, ##arg) 42#define vpfe_info(dev, fmt, arg...) \ 43 v4l2_info(&dev->v4l2_dev, fmt, ##arg) 44#define vpfe_err(dev, fmt, arg...) \ 45 v4l2_err(&dev->v4l2_dev, fmt, ##arg) 46 47/* standard information */ 48struct vpfe_standard { 49 v4l2_std_id std_id; 50 unsigned int width; 51 unsigned int height; 52 struct v4l2_fract pixelaspect; 53 int frame_format; 54}; 55 56static const struct vpfe_standard vpfe_standards[] = { 57 {V4L2_STD_525_60, 720, 480, {11, 10}, 1}, 58 {V4L2_STD_625_50, 720, 576, {54, 59}, 1}, 59}; 60 61static struct vpfe_fmt formats[VPFE_NUM_FORMATS] = { 62 { 63 .fourcc = V4L2_PIX_FMT_YUYV, 64 .code = MEDIA_BUS_FMT_YUYV8_2X8, 65 .bitsperpixel = 16, 66 }, { 67 .fourcc = V4L2_PIX_FMT_UYVY, 68 .code = MEDIA_BUS_FMT_UYVY8_2X8, 69 .bitsperpixel = 16, 70 }, { 71 .fourcc = V4L2_PIX_FMT_YVYU, 72 .code = MEDIA_BUS_FMT_YVYU8_2X8, 73 .bitsperpixel = 16, 74 }, { 75 .fourcc = V4L2_PIX_FMT_VYUY, 76 .code = MEDIA_BUS_FMT_VYUY8_2X8, 77 .bitsperpixel = 16, 78 }, { 79 .fourcc = V4L2_PIX_FMT_SBGGR8, 80 .code = MEDIA_BUS_FMT_SBGGR8_1X8, 81 .bitsperpixel = 8, 82 }, { 83 .fourcc = V4L2_PIX_FMT_SGBRG8, 84 .code = MEDIA_BUS_FMT_SGBRG8_1X8, 85 .bitsperpixel = 8, 86 }, { 87 .fourcc = V4L2_PIX_FMT_SGRBG8, 88 .code = MEDIA_BUS_FMT_SGRBG8_1X8, 89 .bitsperpixel = 8, 90 }, { 91 .fourcc = V4L2_PIX_FMT_SRGGB8, 92 .code = MEDIA_BUS_FMT_SRGGB8_1X8, 93 .bitsperpixel = 8, 94 }, { 95 .fourcc = V4L2_PIX_FMT_RGB565, 96 .code = MEDIA_BUS_FMT_RGB565_2X8_LE, 97 .bitsperpixel = 16, 98 }, { 99 .fourcc = V4L2_PIX_FMT_RGB565X, 100 .code = MEDIA_BUS_FMT_RGB565_2X8_BE, 101 .bitsperpixel = 16, 102 }, 103}; 104 105static int __subdev_get_format(struct vpfe_device *vpfe, 106 struct v4l2_mbus_framefmt *fmt); 107static int vpfe_calc_format_size(struct vpfe_device *vpfe, 108 const struct vpfe_fmt *fmt, 109 struct v4l2_format *f); 110 111static struct vpfe_fmt *find_format_by_code(struct vpfe_device *vpfe, 112 unsigned int code) 113{ 114 struct vpfe_fmt *fmt; 115 unsigned int k; 116 117 for (k = 0; k < vpfe->num_active_fmt; k++) { 118 fmt = vpfe->active_fmt[k]; 119 if (fmt->code == code) 120 return fmt; 121 } 122 123 return NULL; 124} 125 126static struct vpfe_fmt *find_format_by_pix(struct vpfe_device *vpfe, 127 unsigned int pixelformat) 128{ 129 struct vpfe_fmt *fmt; 130 unsigned int k; 131 132 for (k = 0; k < vpfe->num_active_fmt; k++) { 133 fmt = vpfe->active_fmt[k]; 134 if (fmt->fourcc == pixelformat) 135 return fmt; 136 } 137 138 return NULL; 139} 140 141static unsigned int __get_bytesperpixel(struct vpfe_device *vpfe, 142 const struct vpfe_fmt *fmt) 143{ 144 struct vpfe_subdev_info *sdinfo = vpfe->current_subdev; 145 unsigned int bus_width = sdinfo->vpfe_param.bus_width; 146 u32 bpp, bus_width_bytes, clocksperpixel; 147 148 bus_width_bytes = ALIGN(bus_width, 8) >> 3; 149 clocksperpixel = DIV_ROUND_UP(fmt->bitsperpixel, bus_width); 150 bpp = clocksperpixel * bus_width_bytes; 151 152 return bpp; 153} 154 155/* Print Four-character-code (FOURCC) */ 156static char *print_fourcc(u32 fmt) 157{ 158 static char code[5]; 159 160 code[0] = (unsigned char)(fmt & 0xff); 161 code[1] = (unsigned char)((fmt >> 8) & 0xff); 162 code[2] = (unsigned char)((fmt >> 16) & 0xff); 163 code[3] = (unsigned char)((fmt >> 24) & 0xff); 164 code[4] = '\0'; 165 166 return code; 167} 168 169static inline u32 vpfe_reg_read(struct vpfe_ccdc *ccdc, u32 offset) 170{ 171 return ioread32(ccdc->ccdc_cfg.base_addr + offset); 172} 173 174static inline void vpfe_reg_write(struct vpfe_ccdc *ccdc, u32 val, u32 offset) 175{ 176 iowrite32(val, ccdc->ccdc_cfg.base_addr + offset); 177} 178 179static inline struct vpfe_device *to_vpfe(struct vpfe_ccdc *ccdc) 180{ 181 return container_of(ccdc, struct vpfe_device, ccdc); 182} 183 184static inline 185struct vpfe_cap_buffer *to_vpfe_buffer(struct vb2_v4l2_buffer *vb) 186{ 187 return container_of(vb, struct vpfe_cap_buffer, vb); 188} 189 190static inline void vpfe_pcr_enable(struct vpfe_ccdc *ccdc, int flag) 191{ 192 vpfe_reg_write(ccdc, !!flag, VPFE_PCR); 193} 194 195static void vpfe_config_enable(struct vpfe_ccdc *ccdc, int flag) 196{ 197 unsigned int cfg; 198 199 if (!flag) { 200 cfg = vpfe_reg_read(ccdc, VPFE_CONFIG); 201 cfg &= ~(VPFE_CONFIG_EN_ENABLE << VPFE_CONFIG_EN_SHIFT); 202 } else { 203 cfg = VPFE_CONFIG_EN_ENABLE << VPFE_CONFIG_EN_SHIFT; 204 } 205 206 vpfe_reg_write(ccdc, cfg, VPFE_CONFIG); 207} 208 209static void vpfe_ccdc_setwin(struct vpfe_ccdc *ccdc, 210 struct v4l2_rect *image_win, 211 enum ccdc_frmfmt frm_fmt, 212 int bpp) 213{ 214 int horz_start, horz_nr_pixels; 215 int vert_start, vert_nr_lines; 216 int val, mid_img; 217 218 /* 219 * ppc - per pixel count. indicates how many pixels per cell 220 * output to SDRAM. example, for ycbcr, it is one y and one c, so 2. 221 * raw capture this is 1 222 */ 223 horz_start = image_win->left * bpp; 224 horz_nr_pixels = (image_win->width * bpp) - 1; 225 vpfe_reg_write(ccdc, (horz_start << VPFE_HORZ_INFO_SPH_SHIFT) | 226 horz_nr_pixels, VPFE_HORZ_INFO); 227 228 vert_start = image_win->top; 229 230 if (frm_fmt == CCDC_FRMFMT_INTERLACED) { 231 vert_nr_lines = (image_win->height >> 1) - 1; 232 vert_start >>= 1; 233 /* configure VDINT0 */ 234 val = (vert_start << VPFE_VDINT_VDINT0_SHIFT); 235 } else { 236 vert_nr_lines = image_win->height - 1; 237 /* 238 * configure VDINT0 and VDINT1. VDINT1 will be at half 239 * of image height 240 */ 241 mid_img = vert_start + (image_win->height / 2); 242 val = (vert_start << VPFE_VDINT_VDINT0_SHIFT) | 243 (mid_img & VPFE_VDINT_VDINT1_MASK); 244 } 245 246 vpfe_reg_write(ccdc, val, VPFE_VDINT); 247 248 vpfe_reg_write(ccdc, (vert_start << VPFE_VERT_START_SLV0_SHIFT) | 249 vert_start, VPFE_VERT_START); 250 vpfe_reg_write(ccdc, vert_nr_lines, VPFE_VERT_LINES); 251} 252 253static void vpfe_reg_dump(struct vpfe_ccdc *ccdc) 254{ 255 struct vpfe_device *vpfe = to_vpfe(ccdc); 256 257 vpfe_dbg(3, vpfe, "ALAW: 0x%x\n", vpfe_reg_read(ccdc, VPFE_ALAW)); 258 vpfe_dbg(3, vpfe, "CLAMP: 0x%x\n", vpfe_reg_read(ccdc, VPFE_CLAMP)); 259 vpfe_dbg(3, vpfe, "DCSUB: 0x%x\n", vpfe_reg_read(ccdc, VPFE_DCSUB)); 260 vpfe_dbg(3, vpfe, "BLKCMP: 0x%x\n", vpfe_reg_read(ccdc, VPFE_BLKCMP)); 261 vpfe_dbg(3, vpfe, "COLPTN: 0x%x\n", vpfe_reg_read(ccdc, VPFE_COLPTN)); 262 vpfe_dbg(3, vpfe, "SDOFST: 0x%x\n", vpfe_reg_read(ccdc, VPFE_SDOFST)); 263 vpfe_dbg(3, vpfe, "SYN_MODE: 0x%x\n", 264 vpfe_reg_read(ccdc, VPFE_SYNMODE)); 265 vpfe_dbg(3, vpfe, "HSIZE_OFF: 0x%x\n", 266 vpfe_reg_read(ccdc, VPFE_HSIZE_OFF)); 267 vpfe_dbg(3, vpfe, "HORZ_INFO: 0x%x\n", 268 vpfe_reg_read(ccdc, VPFE_HORZ_INFO)); 269 vpfe_dbg(3, vpfe, "VERT_START: 0x%x\n", 270 vpfe_reg_read(ccdc, VPFE_VERT_START)); 271 vpfe_dbg(3, vpfe, "VERT_LINES: 0x%x\n", 272 vpfe_reg_read(ccdc, VPFE_VERT_LINES)); 273} 274 275static int 276vpfe_ccdc_validate_param(struct vpfe_ccdc *ccdc, 277 struct vpfe_ccdc_config_params_raw *ccdcparam) 278{ 279 struct vpfe_device *vpfe = to_vpfe(ccdc); 280 u8 max_gamma, max_data; 281 282 if (!ccdcparam->alaw.enable) 283 return 0; 284 285 max_gamma = ccdc_gamma_width_max_bit(ccdcparam->alaw.gamma_wd); 286 max_data = ccdc_data_size_max_bit(ccdcparam->data_sz); 287 288 if (ccdcparam->alaw.gamma_wd > VPFE_CCDC_GAMMA_BITS_09_0 || 289 ccdcparam->data_sz > VPFE_CCDC_DATA_8BITS || 290 max_gamma > max_data) { 291 vpfe_dbg(1, vpfe, "Invalid data line select\n"); 292 return -EINVAL; 293 } 294 295 return 0; 296} 297 298static void 299vpfe_ccdc_update_raw_params(struct vpfe_ccdc *ccdc, 300 struct vpfe_ccdc_config_params_raw *raw_params) 301{ 302 struct vpfe_ccdc_config_params_raw *config_params = 303 &ccdc->ccdc_cfg.bayer.config_params; 304 305 *config_params = *raw_params; 306} 307 308/* 309 * vpfe_ccdc_restore_defaults() 310 * This function will write defaults to all CCDC registers 311 */ 312static void vpfe_ccdc_restore_defaults(struct vpfe_ccdc *ccdc) 313{ 314 int i; 315 316 /* Disable CCDC */ 317 vpfe_pcr_enable(ccdc, 0); 318 319 /* set all registers to default value */ 320 for (i = 4; i <= 0x94; i += 4) 321 vpfe_reg_write(ccdc, 0, i); 322 323 vpfe_reg_write(ccdc, VPFE_NO_CULLING, VPFE_CULLING); 324 vpfe_reg_write(ccdc, VPFE_CCDC_GAMMA_BITS_11_2, VPFE_ALAW); 325} 326 327static int vpfe_ccdc_close(struct vpfe_ccdc *ccdc, struct device *dev) 328{ 329 struct vpfe_device *vpfe = to_vpfe(ccdc); 330 u32 dma_cntl, pcr; 331 332 pcr = vpfe_reg_read(ccdc, VPFE_PCR); 333 if (pcr) 334 vpfe_dbg(1, vpfe, "VPFE_PCR is still set (%x)", pcr); 335 336 dma_cntl = vpfe_reg_read(ccdc, VPFE_DMA_CNTL); 337 if ((dma_cntl & VPFE_DMA_CNTL_OVERFLOW)) 338 vpfe_dbg(1, vpfe, "VPFE_DMA_CNTL_OVERFLOW is still set (%x)", 339 dma_cntl); 340 341 /* Disable CCDC by resetting all register to default POR values */ 342 vpfe_ccdc_restore_defaults(ccdc); 343 344 /* Disabled the module at the CONFIG level */ 345 vpfe_config_enable(ccdc, 0); 346 347 pm_runtime_put_sync(dev); 348 return 0; 349} 350 351static int vpfe_ccdc_set_params(struct vpfe_ccdc *ccdc, void __user *params) 352{ 353 struct vpfe_device *vpfe = to_vpfe(ccdc); 354 struct vpfe_ccdc_config_params_raw raw_params; 355 int x; 356 357 if (ccdc->ccdc_cfg.if_type != VPFE_RAW_BAYER) 358 return -EINVAL; 359 360 x = copy_from_user(&raw_params, params, sizeof(raw_params)); 361 if (x) { 362 vpfe_dbg(1, vpfe, 363 "%s: error in copying ccdc params, %d\n", 364 __func__, x); 365 return -EFAULT; 366 } 367 368 if (!vpfe_ccdc_validate_param(ccdc, &raw_params)) { 369 vpfe_ccdc_update_raw_params(ccdc, &raw_params); 370 return 0; 371 } 372 373 return -EINVAL; 374} 375 376/* 377 * vpfe_ccdc_config_ycbcr() 378 * This function will configure CCDC for YCbCr video capture 379 */ 380static void vpfe_ccdc_config_ycbcr(struct vpfe_ccdc *ccdc) 381{ 382 struct ccdc_params_ycbcr *params = &ccdc->ccdc_cfg.ycbcr; 383 u32 syn_mode; 384 385 /* 386 * first restore the CCDC registers to default values 387 * This is important since we assume default values to be set in 388 * a lot of registers that we didn't touch 389 */ 390 vpfe_ccdc_restore_defaults(ccdc); 391 392 /* 393 * configure pixel format, frame format, configure video frame 394 * format, enable output to SDRAM, enable internal timing generator 395 * and 8bit pack mode 396 */ 397 syn_mode = (((params->pix_fmt & VPFE_SYN_MODE_INPMOD_MASK) << 398 VPFE_SYN_MODE_INPMOD_SHIFT) | 399 ((params->frm_fmt & VPFE_SYN_FLDMODE_MASK) << 400 VPFE_SYN_FLDMODE_SHIFT) | VPFE_VDHDEN_ENABLE | 401 VPFE_WEN_ENABLE | VPFE_DATA_PACK_ENABLE); 402 403 /* setup BT.656 sync mode */ 404 if (params->bt656_enable) { 405 vpfe_reg_write(ccdc, VPFE_REC656IF_BT656_EN, VPFE_REC656IF); 406 407 /* 408 * configure the FID, VD, HD pin polarity, 409 * fld,hd pol positive, vd negative, 8-bit data 410 */ 411 syn_mode |= VPFE_SYN_MODE_VD_POL_NEGATIVE; 412 if (ccdc->ccdc_cfg.if_type == VPFE_BT656_10BIT) 413 syn_mode |= VPFE_SYN_MODE_10BITS; 414 else 415 syn_mode |= VPFE_SYN_MODE_8BITS; 416 } else { 417 /* y/c external sync mode */ 418 syn_mode |= (((params->fid_pol & VPFE_FID_POL_MASK) << 419 VPFE_FID_POL_SHIFT) | 420 ((params->hd_pol & VPFE_HD_POL_MASK) << 421 VPFE_HD_POL_SHIFT) | 422 ((params->vd_pol & VPFE_VD_POL_MASK) << 423 VPFE_VD_POL_SHIFT)); 424 } 425 vpfe_reg_write(ccdc, syn_mode, VPFE_SYNMODE); 426 427 /* configure video window */ 428 vpfe_ccdc_setwin(ccdc, ¶ms->win, 429 params->frm_fmt, params->bytesperpixel); 430 431 /* 432 * configure the order of y cb cr in SDRAM, and disable latch 433 * internal register on vsync 434 */ 435 if (ccdc->ccdc_cfg.if_type == VPFE_BT656_10BIT) 436 vpfe_reg_write(ccdc, 437 (params->pix_order << VPFE_CCDCFG_Y8POS_SHIFT) | 438 VPFE_LATCH_ON_VSYNC_DISABLE | 439 VPFE_CCDCFG_BW656_10BIT, VPFE_CCDCFG); 440 else 441 vpfe_reg_write(ccdc, 442 (params->pix_order << VPFE_CCDCFG_Y8POS_SHIFT) | 443 VPFE_LATCH_ON_VSYNC_DISABLE, VPFE_CCDCFG); 444 445 /* 446 * configure the horizontal line offset. This should be a 447 * on 32 byte boundary. So clear LSB 5 bits 448 */ 449 vpfe_reg_write(ccdc, params->bytesperline, VPFE_HSIZE_OFF); 450 451 /* configure the memory line offset */ 452 if (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED) 453 /* two fields are interleaved in memory */ 454 vpfe_reg_write(ccdc, VPFE_SDOFST_FIELD_INTERLEAVED, 455 VPFE_SDOFST); 456} 457 458static void 459vpfe_ccdc_config_black_clamp(struct vpfe_ccdc *ccdc, 460 struct vpfe_ccdc_black_clamp *bclamp) 461{ 462 u32 val; 463 464 if (!bclamp->enable) { 465 /* configure DCSub */ 466 val = (bclamp->dc_sub) & VPFE_BLK_DC_SUB_MASK; 467 vpfe_reg_write(ccdc, val, VPFE_DCSUB); 468 vpfe_reg_write(ccdc, VPFE_CLAMP_DEFAULT_VAL, VPFE_CLAMP); 469 return; 470 } 471 /* 472 * Configure gain, Start pixel, No of line to be avg, 473 * No of pixel/line to be avg, & Enable the Black clamping 474 */ 475 val = ((bclamp->sgain & VPFE_BLK_SGAIN_MASK) | 476 ((bclamp->start_pixel & VPFE_BLK_ST_PXL_MASK) << 477 VPFE_BLK_ST_PXL_SHIFT) | 478 ((bclamp->sample_ln & VPFE_BLK_SAMPLE_LINE_MASK) << 479 VPFE_BLK_SAMPLE_LINE_SHIFT) | 480 ((bclamp->sample_pixel & VPFE_BLK_SAMPLE_LN_MASK) << 481 VPFE_BLK_SAMPLE_LN_SHIFT) | VPFE_BLK_CLAMP_ENABLE); 482 vpfe_reg_write(ccdc, val, VPFE_CLAMP); 483 /* If Black clamping is enable then make dcsub 0 */ 484 vpfe_reg_write(ccdc, VPFE_DCSUB_DEFAULT_VAL, VPFE_DCSUB); 485} 486 487static void 488vpfe_ccdc_config_black_compense(struct vpfe_ccdc *ccdc, 489 struct vpfe_ccdc_black_compensation *bcomp) 490{ 491 u32 val; 492 493 val = ((bcomp->b & VPFE_BLK_COMP_MASK) | 494 ((bcomp->gb & VPFE_BLK_COMP_MASK) << 495 VPFE_BLK_COMP_GB_COMP_SHIFT) | 496 ((bcomp->gr & VPFE_BLK_COMP_MASK) << 497 VPFE_BLK_COMP_GR_COMP_SHIFT) | 498 ((bcomp->r & VPFE_BLK_COMP_MASK) << 499 VPFE_BLK_COMP_R_COMP_SHIFT)); 500 vpfe_reg_write(ccdc, val, VPFE_BLKCMP); 501} 502 503/* 504 * vpfe_ccdc_config_raw() 505 * This function will configure CCDC for Raw capture mode 506 */ 507static void vpfe_ccdc_config_raw(struct vpfe_ccdc *ccdc) 508{ 509 struct vpfe_device *vpfe = to_vpfe(ccdc); 510 struct vpfe_ccdc_config_params_raw *config_params = 511 &ccdc->ccdc_cfg.bayer.config_params; 512 struct ccdc_params_raw *params = &ccdc->ccdc_cfg.bayer; 513 unsigned int syn_mode; 514 unsigned int val; 515 516 /* Reset CCDC */ 517 vpfe_ccdc_restore_defaults(ccdc); 518 519 /* Disable latching function registers on VSYNC */ 520 vpfe_reg_write(ccdc, VPFE_LATCH_ON_VSYNC_DISABLE, VPFE_CCDCFG); 521 522 /* 523 * Configure the vertical sync polarity(SYN_MODE.VDPOL), 524 * horizontal sync polarity (SYN_MODE.HDPOL), frame id polarity 525 * (SYN_MODE.FLDPOL), frame format(progressive or interlace), 526 * data size(SYNMODE.DATSIZ), &pixel format (Input mode), output 527 * SDRAM, enable internal timing generator 528 */ 529 syn_mode = (((params->vd_pol & VPFE_VD_POL_MASK) << VPFE_VD_POL_SHIFT) | 530 ((params->hd_pol & VPFE_HD_POL_MASK) << VPFE_HD_POL_SHIFT) | 531 ((params->fid_pol & VPFE_FID_POL_MASK) << 532 VPFE_FID_POL_SHIFT) | ((params->frm_fmt & 533 VPFE_FRM_FMT_MASK) << VPFE_FRM_FMT_SHIFT) | 534 ((config_params->data_sz & VPFE_DATA_SZ_MASK) << 535 VPFE_DATA_SZ_SHIFT) | ((params->pix_fmt & 536 VPFE_PIX_FMT_MASK) << VPFE_PIX_FMT_SHIFT) | 537 VPFE_WEN_ENABLE | VPFE_VDHDEN_ENABLE); 538 539 /* Enable and configure aLaw register if needed */ 540 if (config_params->alaw.enable) { 541 val = ((config_params->alaw.gamma_wd & 542 VPFE_ALAW_GAMMA_WD_MASK) | VPFE_ALAW_ENABLE); 543 vpfe_reg_write(ccdc, val, VPFE_ALAW); 544 vpfe_dbg(3, vpfe, "\nWriting 0x%x to ALAW...\n", val); 545 } 546 547 /* Configure video window */ 548 vpfe_ccdc_setwin(ccdc, ¶ms->win, params->frm_fmt, 549 params->bytesperpixel); 550 551 /* Configure Black Clamp */ 552 vpfe_ccdc_config_black_clamp(ccdc, &config_params->blk_clamp); 553 554 /* Configure Black level compensation */ 555 vpfe_ccdc_config_black_compense(ccdc, &config_params->blk_comp); 556 557 /* If data size is 8 bit then pack the data */ 558 if ((config_params->data_sz == VPFE_CCDC_DATA_8BITS) || 559 config_params->alaw.enable) 560 syn_mode |= VPFE_DATA_PACK_ENABLE; 561 562 /* 563 * Configure Horizontal offset register. If pack 8 is enabled then 564 * 1 pixel will take 1 byte 565 */ 566 vpfe_reg_write(ccdc, params->bytesperline, VPFE_HSIZE_OFF); 567 568 vpfe_dbg(3, vpfe, "Writing %d (%x) to HSIZE_OFF\n", 569 params->bytesperline, params->bytesperline); 570 571 /* Set value for SDOFST */ 572 if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) { 573 if (params->image_invert_enable) { 574 /* For interlace inverse mode */ 575 vpfe_reg_write(ccdc, VPFE_INTERLACED_IMAGE_INVERT, 576 VPFE_SDOFST); 577 } else { 578 /* For interlace non inverse mode */ 579 vpfe_reg_write(ccdc, VPFE_INTERLACED_NO_IMAGE_INVERT, 580 VPFE_SDOFST); 581 } 582 } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) { 583 vpfe_reg_write(ccdc, VPFE_PROGRESSIVE_NO_IMAGE_INVERT, 584 VPFE_SDOFST); 585 } 586 587 vpfe_reg_write(ccdc, syn_mode, VPFE_SYNMODE); 588 589 vpfe_reg_dump(ccdc); 590} 591 592static inline int 593vpfe_ccdc_set_buftype(struct vpfe_ccdc *ccdc, 594 enum ccdc_buftype buf_type) 595{ 596 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) 597 ccdc->ccdc_cfg.bayer.buf_type = buf_type; 598 else 599 ccdc->ccdc_cfg.ycbcr.buf_type = buf_type; 600 601 return 0; 602} 603 604static inline enum ccdc_buftype vpfe_ccdc_get_buftype(struct vpfe_ccdc *ccdc) 605{ 606 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) 607 return ccdc->ccdc_cfg.bayer.buf_type; 608 609 return ccdc->ccdc_cfg.ycbcr.buf_type; 610} 611 612static int vpfe_ccdc_set_pixel_format(struct vpfe_ccdc *ccdc, u32 pixfmt) 613{ 614 struct vpfe_device *vpfe = to_vpfe(ccdc); 615 616 vpfe_dbg(1, vpfe, "%s: if_type: %d, pixfmt:%s\n", 617 __func__, ccdc->ccdc_cfg.if_type, print_fourcc(pixfmt)); 618 619 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) { 620 ccdc->ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW; 621 /* 622 * Need to clear it in case it was left on 623 * after the last capture. 624 */ 625 ccdc->ccdc_cfg.bayer.config_params.alaw.enable = 0; 626 627 switch (pixfmt) { 628 case V4L2_PIX_FMT_SBGGR8: 629 ccdc->ccdc_cfg.bayer.config_params.alaw.enable = 1; 630 break; 631 632 case V4L2_PIX_FMT_YUYV: 633 case V4L2_PIX_FMT_UYVY: 634 case V4L2_PIX_FMT_YUV420: 635 case V4L2_PIX_FMT_NV12: 636 case V4L2_PIX_FMT_RGB565X: 637 break; 638 639 case V4L2_PIX_FMT_SBGGR16: 640 default: 641 return -EINVAL; 642 } 643 } else { 644 switch (pixfmt) { 645 case V4L2_PIX_FMT_YUYV: 646 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR; 647 break; 648 649 case V4L2_PIX_FMT_UYVY: 650 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY; 651 break; 652 653 default: 654 return -EINVAL; 655 } 656 } 657 658 return 0; 659} 660 661static u32 vpfe_ccdc_get_pixel_format(struct vpfe_ccdc *ccdc) 662{ 663 u32 pixfmt; 664 665 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) { 666 pixfmt = V4L2_PIX_FMT_YUYV; 667 } else { 668 if (ccdc->ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR) 669 pixfmt = V4L2_PIX_FMT_YUYV; 670 else 671 pixfmt = V4L2_PIX_FMT_UYVY; 672 } 673 674 return pixfmt; 675} 676 677static int 678vpfe_ccdc_set_image_window(struct vpfe_ccdc *ccdc, 679 struct v4l2_rect *win, unsigned int bpp) 680{ 681 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) { 682 ccdc->ccdc_cfg.bayer.win = *win; 683 ccdc->ccdc_cfg.bayer.bytesperpixel = bpp; 684 ccdc->ccdc_cfg.bayer.bytesperline = ALIGN(win->width * bpp, 32); 685 } else { 686 ccdc->ccdc_cfg.ycbcr.win = *win; 687 ccdc->ccdc_cfg.ycbcr.bytesperpixel = bpp; 688 ccdc->ccdc_cfg.ycbcr.bytesperline = ALIGN(win->width * bpp, 32); 689 } 690 691 return 0; 692} 693 694static inline void 695vpfe_ccdc_get_image_window(struct vpfe_ccdc *ccdc, 696 struct v4l2_rect *win) 697{ 698 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) 699 *win = ccdc->ccdc_cfg.bayer.win; 700 else 701 *win = ccdc->ccdc_cfg.ycbcr.win; 702} 703 704static inline unsigned int vpfe_ccdc_get_line_length(struct vpfe_ccdc *ccdc) 705{ 706 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) 707 return ccdc->ccdc_cfg.bayer.bytesperline; 708 709 return ccdc->ccdc_cfg.ycbcr.bytesperline; 710} 711 712static inline int 713vpfe_ccdc_set_frame_format(struct vpfe_ccdc *ccdc, 714 enum ccdc_frmfmt frm_fmt) 715{ 716 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) 717 ccdc->ccdc_cfg.bayer.frm_fmt = frm_fmt; 718 else 719 ccdc->ccdc_cfg.ycbcr.frm_fmt = frm_fmt; 720 721 return 0; 722} 723 724static inline enum ccdc_frmfmt 725vpfe_ccdc_get_frame_format(struct vpfe_ccdc *ccdc) 726{ 727 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) 728 return ccdc->ccdc_cfg.bayer.frm_fmt; 729 730 return ccdc->ccdc_cfg.ycbcr.frm_fmt; 731} 732 733static inline int vpfe_ccdc_getfid(struct vpfe_ccdc *ccdc) 734{ 735 return (vpfe_reg_read(ccdc, VPFE_SYNMODE) >> 15) & 1; 736} 737 738static inline void vpfe_set_sdr_addr(struct vpfe_ccdc *ccdc, unsigned long addr) 739{ 740 vpfe_reg_write(ccdc, addr & 0xffffffe0, VPFE_SDR_ADDR); 741} 742 743static int vpfe_ccdc_set_hw_if_params(struct vpfe_ccdc *ccdc, 744 struct vpfe_hw_if_param *params) 745{ 746 struct vpfe_device *vpfe = to_vpfe(ccdc); 747 748 ccdc->ccdc_cfg.if_type = params->if_type; 749 750 switch (params->if_type) { 751 case VPFE_BT656: 752 case VPFE_YCBCR_SYNC_16: 753 case VPFE_YCBCR_SYNC_8: 754 case VPFE_BT656_10BIT: 755 ccdc->ccdc_cfg.ycbcr.vd_pol = params->vdpol; 756 ccdc->ccdc_cfg.ycbcr.hd_pol = params->hdpol; 757 break; 758 759 case VPFE_RAW_BAYER: 760 ccdc->ccdc_cfg.bayer.vd_pol = params->vdpol; 761 ccdc->ccdc_cfg.bayer.hd_pol = params->hdpol; 762 if (params->bus_width == 10) 763 ccdc->ccdc_cfg.bayer.config_params.data_sz = 764 VPFE_CCDC_DATA_10BITS; 765 else 766 ccdc->ccdc_cfg.bayer.config_params.data_sz = 767 VPFE_CCDC_DATA_8BITS; 768 vpfe_dbg(1, vpfe, "params.bus_width: %d\n", 769 params->bus_width); 770 vpfe_dbg(1, vpfe, "config_params.data_sz: %d\n", 771 ccdc->ccdc_cfg.bayer.config_params.data_sz); 772 break; 773 774 default: 775 return -EINVAL; 776 } 777 778 return 0; 779} 780 781static void vpfe_clear_intr(struct vpfe_ccdc *ccdc, int vdint) 782{ 783 unsigned int vpfe_int_status; 784 785 vpfe_int_status = vpfe_reg_read(ccdc, VPFE_IRQ_STS); 786 787 switch (vdint) { 788 /* VD0 interrupt */ 789 case VPFE_VDINT0: 790 vpfe_int_status &= ~VPFE_VDINT0; 791 vpfe_int_status |= VPFE_VDINT0; 792 break; 793 794 /* VD1 interrupt */ 795 case VPFE_VDINT1: 796 vpfe_int_status &= ~VPFE_VDINT1; 797 vpfe_int_status |= VPFE_VDINT1; 798 break; 799 800 /* VD2 interrupt */ 801 case VPFE_VDINT2: 802 vpfe_int_status &= ~VPFE_VDINT2; 803 vpfe_int_status |= VPFE_VDINT2; 804 break; 805 806 /* Clear all interrupts */ 807 default: 808 vpfe_int_status &= ~(VPFE_VDINT0 | 809 VPFE_VDINT1 | 810 VPFE_VDINT2); 811 vpfe_int_status |= (VPFE_VDINT0 | 812 VPFE_VDINT1 | 813 VPFE_VDINT2); 814 break; 815 } 816 /* Clear specific VDINT from the status register */ 817 vpfe_reg_write(ccdc, vpfe_int_status, VPFE_IRQ_STS); 818 819 vpfe_int_status = vpfe_reg_read(ccdc, VPFE_IRQ_STS); 820 821 /* Acknowledge that we are done with all interrupts */ 822 vpfe_reg_write(ccdc, 1, VPFE_IRQ_EOI); 823} 824 825static void vpfe_ccdc_config_defaults(struct vpfe_ccdc *ccdc) 826{ 827 ccdc->ccdc_cfg.if_type = VPFE_RAW_BAYER; 828 829 ccdc->ccdc_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT; 830 ccdc->ccdc_cfg.ycbcr.frm_fmt = CCDC_FRMFMT_INTERLACED; 831 ccdc->ccdc_cfg.ycbcr.fid_pol = VPFE_PINPOL_POSITIVE; 832 ccdc->ccdc_cfg.ycbcr.vd_pol = VPFE_PINPOL_POSITIVE; 833 ccdc->ccdc_cfg.ycbcr.hd_pol = VPFE_PINPOL_POSITIVE; 834 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY; 835 ccdc->ccdc_cfg.ycbcr.buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED; 836 837 ccdc->ccdc_cfg.ycbcr.win.left = 0; 838 ccdc->ccdc_cfg.ycbcr.win.top = 0; 839 ccdc->ccdc_cfg.ycbcr.win.width = 720; 840 ccdc->ccdc_cfg.ycbcr.win.height = 576; 841 ccdc->ccdc_cfg.ycbcr.bt656_enable = 1; 842 843 ccdc->ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW; 844 ccdc->ccdc_cfg.bayer.frm_fmt = CCDC_FRMFMT_PROGRESSIVE; 845 ccdc->ccdc_cfg.bayer.fid_pol = VPFE_PINPOL_POSITIVE; 846 ccdc->ccdc_cfg.bayer.vd_pol = VPFE_PINPOL_POSITIVE; 847 ccdc->ccdc_cfg.bayer.hd_pol = VPFE_PINPOL_POSITIVE; 848 849 ccdc->ccdc_cfg.bayer.win.left = 0; 850 ccdc->ccdc_cfg.bayer.win.top = 0; 851 ccdc->ccdc_cfg.bayer.win.width = 800; 852 ccdc->ccdc_cfg.bayer.win.height = 600; 853 ccdc->ccdc_cfg.bayer.config_params.data_sz = VPFE_CCDC_DATA_8BITS; 854 ccdc->ccdc_cfg.bayer.config_params.alaw.gamma_wd = 855 VPFE_CCDC_GAMMA_BITS_09_0; 856} 857 858/* 859 * vpfe_get_ccdc_image_format - Get image parameters based on CCDC settings 860 */ 861static int vpfe_get_ccdc_image_format(struct vpfe_device *vpfe, 862 struct v4l2_format *f) 863{ 864 struct v4l2_rect image_win; 865 enum ccdc_buftype buf_type; 866 enum ccdc_frmfmt frm_fmt; 867 868 memset(f, 0, sizeof(*f)); 869 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 870 vpfe_ccdc_get_image_window(&vpfe->ccdc, &image_win); 871 f->fmt.pix.width = image_win.width; 872 f->fmt.pix.height = image_win.height; 873 f->fmt.pix.bytesperline = vpfe_ccdc_get_line_length(&vpfe->ccdc); 874 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * 875 f->fmt.pix.height; 876 buf_type = vpfe_ccdc_get_buftype(&vpfe->ccdc); 877 f->fmt.pix.pixelformat = vpfe_ccdc_get_pixel_format(&vpfe->ccdc); 878 frm_fmt = vpfe_ccdc_get_frame_format(&vpfe->ccdc); 879 880 if (frm_fmt == CCDC_FRMFMT_PROGRESSIVE) { 881 f->fmt.pix.field = V4L2_FIELD_NONE; 882 } else if (frm_fmt == CCDC_FRMFMT_INTERLACED) { 883 if (buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED) { 884 f->fmt.pix.field = V4L2_FIELD_INTERLACED; 885 } else if (buf_type == CCDC_BUFTYPE_FLD_SEPARATED) { 886 f->fmt.pix.field = V4L2_FIELD_SEQ_TB; 887 } else { 888 vpfe_err(vpfe, "Invalid buf_type\n"); 889 return -EINVAL; 890 } 891 } else { 892 vpfe_err(vpfe, "Invalid frm_fmt\n"); 893 return -EINVAL; 894 } 895 return 0; 896} 897 898static int vpfe_config_ccdc_image_format(struct vpfe_device *vpfe) 899{ 900 enum ccdc_frmfmt frm_fmt = CCDC_FRMFMT_INTERLACED; 901 u32 bpp; 902 int ret = 0; 903 904 vpfe_dbg(1, vpfe, "pixelformat: %s\n", 905 print_fourcc(vpfe->fmt.fmt.pix.pixelformat)); 906 907 if (vpfe_ccdc_set_pixel_format(&vpfe->ccdc, 908 vpfe->fmt.fmt.pix.pixelformat) < 0) { 909 vpfe_err(vpfe, "couldn't set pix format in ccdc\n"); 910 return -EINVAL; 911 } 912 913 /* configure the image window */ 914 bpp = __get_bytesperpixel(vpfe, vpfe->current_vpfe_fmt); 915 vpfe_ccdc_set_image_window(&vpfe->ccdc, &vpfe->crop, bpp); 916 917 switch (vpfe->fmt.fmt.pix.field) { 918 case V4L2_FIELD_INTERLACED: 919 /* do nothing, since it is default */ 920 ret = vpfe_ccdc_set_buftype( 921 &vpfe->ccdc, 922 CCDC_BUFTYPE_FLD_INTERLEAVED); 923 break; 924 925 case V4L2_FIELD_NONE: 926 frm_fmt = CCDC_FRMFMT_PROGRESSIVE; 927 /* buffer type only applicable for interlaced scan */ 928 break; 929 930 case V4L2_FIELD_SEQ_TB: 931 ret = vpfe_ccdc_set_buftype( 932 &vpfe->ccdc, 933 CCDC_BUFTYPE_FLD_SEPARATED); 934 break; 935 936 default: 937 return -EINVAL; 938 } 939 940 if (ret) 941 return ret; 942 943 return vpfe_ccdc_set_frame_format(&vpfe->ccdc, frm_fmt); 944} 945 946/* 947 * vpfe_config_image_format() 948 * For a given standard, this functions sets up the default 949 * pix format & crop values in the vpfe device and ccdc. It first 950 * starts with defaults based values from the standard table. 951 * It then checks if sub device supports get_fmt and then override the 952 * values based on that.Sets crop values to match with scan resolution 953 * starting at 0,0. It calls vpfe_config_ccdc_image_format() set the 954 * values in ccdc 955 */ 956static int vpfe_config_image_format(struct vpfe_device *vpfe, 957 v4l2_std_id std_id) 958{ 959 struct vpfe_fmt *fmt; 960 struct v4l2_mbus_framefmt mbus_fmt; 961 int i, ret; 962 963 for (i = 0; i < ARRAY_SIZE(vpfe_standards); i++) { 964 if (vpfe_standards[i].std_id & std_id) { 965 vpfe->std_info.active_pixels = 966 vpfe_standards[i].width; 967 vpfe->std_info.active_lines = 968 vpfe_standards[i].height; 969 vpfe->std_info.frame_format = 970 vpfe_standards[i].frame_format; 971 vpfe->std_index = i; 972 973 break; 974 } 975 } 976 977 if (i == ARRAY_SIZE(vpfe_standards)) { 978 vpfe_err(vpfe, "standard not supported\n"); 979 return -EINVAL; 980 } 981 982 ret = __subdev_get_format(vpfe, &mbus_fmt); 983 if (ret) 984 return ret; 985 986 fmt = find_format_by_code(vpfe, mbus_fmt.code); 987 if (!fmt) { 988 vpfe_dbg(3, vpfe, "mbus code format (0x%08x) not found.\n", 989 mbus_fmt.code); 990 return -EINVAL; 991 } 992 993 /* Save current subdev format */ 994 v4l2_fill_pix_format(&vpfe->fmt.fmt.pix, &mbus_fmt); 995 vpfe->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 996 vpfe->fmt.fmt.pix.pixelformat = fmt->fourcc; 997 vpfe_calc_format_size(vpfe, fmt, &vpfe->fmt); 998 vpfe->current_vpfe_fmt = fmt; 999 1000 /* Update the crop window based on found values */ 1001 vpfe->crop.top = 0; 1002 vpfe->crop.left = 0; 1003 vpfe->crop.width = mbus_fmt.width; 1004 vpfe->crop.height = mbus_fmt.height; 1005 1006 return vpfe_config_ccdc_image_format(vpfe); 1007} 1008 1009static int vpfe_initialize_device(struct vpfe_device *vpfe) 1010{ 1011 struct vpfe_subdev_info *sdinfo; 1012 int ret; 1013 1014 sdinfo = &vpfe->cfg->sub_devs[0]; 1015 sdinfo->sd = vpfe->sd[0]; 1016 vpfe->current_input = 0; 1017 vpfe->std_index = 0; 1018 /* Configure the default format information */ 1019 ret = vpfe_config_image_format(vpfe, 1020 vpfe_standards[vpfe->std_index].std_id); 1021 if (ret) 1022 return ret; 1023 1024 ret = pm_runtime_resume_and_get(vpfe->pdev); 1025 if (ret < 0) 1026 return ret; 1027 1028 vpfe_config_enable(&vpfe->ccdc, 1); 1029 1030 vpfe_ccdc_restore_defaults(&vpfe->ccdc); 1031 1032 /* Clear all VPFE interrupts */ 1033 vpfe_clear_intr(&vpfe->ccdc, -1); 1034 1035 return ret; 1036} 1037 1038/* 1039 * vpfe_release : This function is based on the vb2_fop_release 1040 * helper function. 1041 * It has been augmented to handle module power management, 1042 * by disabling/enabling h/w module fcntl clock when necessary. 1043 */ 1044static int vpfe_release(struct file *file) 1045{ 1046 struct vpfe_device *vpfe = video_drvdata(file); 1047 bool fh_singular; 1048 int ret; 1049 1050 mutex_lock(&vpfe->lock); 1051 1052 /* Save the singular status before we call the clean-up helper */ 1053 fh_singular = v4l2_fh_is_singular_file(file); 1054 1055 /* the release helper will cleanup any on-going streaming */ 1056 ret = _vb2_fop_release(file, NULL); 1057 1058 /* 1059 * If this was the last open file. 1060 * Then de-initialize hw module. 1061 */ 1062 if (fh_singular) 1063 vpfe_ccdc_close(&vpfe->ccdc, vpfe->pdev); 1064 1065 mutex_unlock(&vpfe->lock); 1066 1067 return ret; 1068} 1069 1070/* 1071 * vpfe_open : This function is based on the v4l2_fh_open helper function. 1072 * It has been augmented to handle module power management, 1073 * by disabling/enabling h/w module fcntl clock when necessary. 1074 */ 1075static int vpfe_open(struct file *file) 1076{ 1077 struct vpfe_device *vpfe = video_drvdata(file); 1078 int ret; 1079 1080 mutex_lock(&vpfe->lock); 1081 1082 ret = v4l2_fh_open(file); 1083 if (ret) { 1084 vpfe_err(vpfe, "v4l2_fh_open failed\n"); 1085 goto unlock; 1086 } 1087 1088 if (!v4l2_fh_is_singular_file(file)) 1089 goto unlock; 1090 1091 if (vpfe_initialize_device(vpfe)) { 1092 v4l2_fh_release(file); 1093 ret = -ENODEV; 1094 } 1095 1096unlock: 1097 mutex_unlock(&vpfe->lock); 1098 return ret; 1099} 1100 1101/** 1102 * vpfe_schedule_next_buffer: set next buffer address for capture 1103 * @vpfe : ptr to vpfe device 1104 * 1105 * This function will get next buffer from the dma queue and 1106 * set the buffer address in the vpfe register for capture. 1107 * the buffer is marked active 1108 */ 1109static void vpfe_schedule_next_buffer(struct vpfe_device *vpfe) 1110{ 1111 dma_addr_t addr; 1112 1113 spin_lock(&vpfe->dma_queue_lock); 1114 if (list_empty(&vpfe->dma_queue)) { 1115 spin_unlock(&vpfe->dma_queue_lock); 1116 return; 1117 } 1118 1119 vpfe->next_frm = list_entry(vpfe->dma_queue.next, 1120 struct vpfe_cap_buffer, list); 1121 list_del(&vpfe->next_frm->list); 1122 spin_unlock(&vpfe->dma_queue_lock); 1123 1124 addr = vb2_dma_contig_plane_dma_addr(&vpfe->next_frm->vb.vb2_buf, 0); 1125 vpfe_set_sdr_addr(&vpfe->ccdc, addr); 1126} 1127 1128static inline void vpfe_schedule_bottom_field(struct vpfe_device *vpfe) 1129{ 1130 dma_addr_t addr; 1131 1132 addr = vb2_dma_contig_plane_dma_addr(&vpfe->next_frm->vb.vb2_buf, 0) + 1133 vpfe->field_off; 1134 1135 vpfe_set_sdr_addr(&vpfe->ccdc, addr); 1136} 1137 1138/* 1139 * vpfe_process_buffer_complete: process a completed buffer 1140 * @vpfe : ptr to vpfe device 1141 * 1142 * This function time stamp the buffer and mark it as DONE. It also 1143 * wake up any process waiting on the QUEUE and set the next buffer 1144 * as current 1145 */ 1146static inline void vpfe_process_buffer_complete(struct vpfe_device *vpfe) 1147{ 1148 vpfe->cur_frm->vb.vb2_buf.timestamp = ktime_get_ns(); 1149 vpfe->cur_frm->vb.field = vpfe->fmt.fmt.pix.field; 1150 vpfe->cur_frm->vb.sequence = vpfe->sequence++; 1151 vb2_buffer_done(&vpfe->cur_frm->vb.vb2_buf, VB2_BUF_STATE_DONE); 1152 vpfe->cur_frm = vpfe->next_frm; 1153} 1154 1155static void vpfe_handle_interlaced_irq(struct vpfe_device *vpfe, 1156 enum v4l2_field field) 1157{ 1158 int fid; 1159 1160 /* interlaced or TB capture check which field 1161 * we are in hardware 1162 */ 1163 fid = vpfe_ccdc_getfid(&vpfe->ccdc); 1164 1165 /* switch the software maintained field id */ 1166 vpfe->field ^= 1; 1167 if (fid == vpfe->field) { 1168 /* we are in-sync here,continue */ 1169 if (fid == 0) { 1170 /* 1171 * One frame is just being captured. If the 1172 * next frame is available, release the 1173 * current frame and move on 1174 */ 1175 if (vpfe->cur_frm != vpfe->next_frm) 1176 vpfe_process_buffer_complete(vpfe); 1177 1178 if (vpfe->stopping) 1179 return; 1180 1181 /* 1182 * based on whether the two fields are stored 1183 * interleave or separately in memory, 1184 * reconfigure the CCDC memory address 1185 */ 1186 if (field == V4L2_FIELD_SEQ_TB) 1187 vpfe_schedule_bottom_field(vpfe); 1188 } else { 1189 /* 1190 * if one field is just being captured configure 1191 * the next frame get the next frame from the empty 1192 * queue if no frame is available hold on to the 1193 * current buffer 1194 */ 1195 if (vpfe->cur_frm == vpfe->next_frm) 1196 vpfe_schedule_next_buffer(vpfe); 1197 } 1198 } else if (fid == 0) { 1199 /* 1200 * out of sync. Recover from any hardware out-of-sync. 1201 * May loose one frame 1202 */ 1203 vpfe->field = fid; 1204 } 1205} 1206 1207/* 1208 * vpfe_isr : ISR handler for vpfe capture (VINT0) 1209 * @irq: irq number 1210 * @dev_id: dev_id ptr 1211 * 1212 * It changes status of the captured buffer, takes next buffer from the queue 1213 * and sets its address in VPFE registers 1214 */ 1215static irqreturn_t vpfe_isr(int irq, void *dev) 1216{ 1217 struct vpfe_device *vpfe = (struct vpfe_device *)dev; 1218 enum v4l2_field field = vpfe->fmt.fmt.pix.field; 1219 int intr_status, stopping = vpfe->stopping; 1220 1221 intr_status = vpfe_reg_read(&vpfe->ccdc, VPFE_IRQ_STS); 1222 1223 if (intr_status & VPFE_VDINT0) { 1224 if (field == V4L2_FIELD_NONE) { 1225 if (vpfe->cur_frm != vpfe->next_frm) 1226 vpfe_process_buffer_complete(vpfe); 1227 } else { 1228 vpfe_handle_interlaced_irq(vpfe, field); 1229 } 1230 if (stopping) { 1231 vpfe->stopping = false; 1232 complete(&vpfe->capture_stop); 1233 } 1234 } 1235 1236 if (intr_status & VPFE_VDINT1 && !stopping) { 1237 if (field == V4L2_FIELD_NONE && 1238 vpfe->cur_frm == vpfe->next_frm) 1239 vpfe_schedule_next_buffer(vpfe); 1240 } 1241 1242 vpfe_clear_intr(&vpfe->ccdc, intr_status); 1243 1244 return IRQ_HANDLED; 1245} 1246 1247static inline void vpfe_detach_irq(struct vpfe_device *vpfe) 1248{ 1249 unsigned int intr = VPFE_VDINT0; 1250 enum ccdc_frmfmt frame_format; 1251 1252 frame_format = vpfe_ccdc_get_frame_format(&vpfe->ccdc); 1253 if (frame_format == CCDC_FRMFMT_PROGRESSIVE) 1254 intr |= VPFE_VDINT1; 1255 1256 vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_CLR); 1257} 1258 1259static inline void vpfe_attach_irq(struct vpfe_device *vpfe) 1260{ 1261 unsigned int intr = VPFE_VDINT0; 1262 enum ccdc_frmfmt frame_format; 1263 1264 frame_format = vpfe_ccdc_get_frame_format(&vpfe->ccdc); 1265 if (frame_format == CCDC_FRMFMT_PROGRESSIVE) 1266 intr |= VPFE_VDINT1; 1267 1268 vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_SET); 1269} 1270 1271static int vpfe_querycap(struct file *file, void *priv, 1272 struct v4l2_capability *cap) 1273{ 1274 struct vpfe_device *vpfe = video_drvdata(file); 1275 1276 strscpy(cap->driver, VPFE_MODULE_NAME, sizeof(cap->driver)); 1277 strscpy(cap->card, "TI AM437x VPFE", sizeof(cap->card)); 1278 snprintf(cap->bus_info, sizeof(cap->bus_info), 1279 "platform:%s", vpfe->v4l2_dev.name); 1280 return 0; 1281} 1282 1283/* get the format set at output pad of the adjacent subdev */ 1284static int __subdev_get_format(struct vpfe_device *vpfe, 1285 struct v4l2_mbus_framefmt *fmt) 1286{ 1287 struct v4l2_subdev *sd = vpfe->current_subdev->sd; 1288 struct v4l2_subdev_format sd_fmt = { 1289 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 1290 .pad = 0, 1291 }; 1292 struct v4l2_mbus_framefmt *mbus_fmt = &sd_fmt.format; 1293 int ret; 1294 1295 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sd_fmt); 1296 if (ret) 1297 return ret; 1298 1299 *fmt = *mbus_fmt; 1300 1301 vpfe_dbg(1, vpfe, "%s: %dx%d code:%04X\n", __func__, 1302 fmt->width, fmt->height, fmt->code); 1303 1304 return 0; 1305} 1306 1307/* set the format at output pad of the adjacent subdev */ 1308static int __subdev_set_format(struct vpfe_device *vpfe, 1309 struct v4l2_mbus_framefmt *fmt) 1310{ 1311 struct v4l2_subdev *sd = vpfe->current_subdev->sd; 1312 struct v4l2_subdev_format sd_fmt = { 1313 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 1314 .pad = 0, 1315 }; 1316 struct v4l2_mbus_framefmt *mbus_fmt = &sd_fmt.format; 1317 int ret; 1318 1319 *mbus_fmt = *fmt; 1320 1321 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sd_fmt); 1322 if (ret) 1323 return ret; 1324 1325 vpfe_dbg(1, vpfe, "%s %dx%d code:%04X\n", __func__, 1326 fmt->width, fmt->height, fmt->code); 1327 1328 return 0; 1329} 1330 1331static int vpfe_calc_format_size(struct vpfe_device *vpfe, 1332 const struct vpfe_fmt *fmt, 1333 struct v4l2_format *f) 1334{ 1335 u32 bpp; 1336 1337 if (!fmt) { 1338 vpfe_dbg(3, vpfe, "No vpfe_fmt provided!\n"); 1339 return -EINVAL; 1340 } 1341 1342 bpp = __get_bytesperpixel(vpfe, fmt); 1343 1344 /* pitch should be 32 bytes aligned */ 1345 f->fmt.pix.bytesperline = ALIGN(f->fmt.pix.width * bpp, 32); 1346 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * 1347 f->fmt.pix.height; 1348 1349 vpfe_dbg(3, vpfe, "%s: fourcc: %s size: %dx%d bpl:%d img_size:%d\n", 1350 __func__, print_fourcc(f->fmt.pix.pixelformat), 1351 f->fmt.pix.width, f->fmt.pix.height, 1352 f->fmt.pix.bytesperline, f->fmt.pix.sizeimage); 1353 1354 return 0; 1355} 1356 1357static int vpfe_g_fmt(struct file *file, void *priv, 1358 struct v4l2_format *fmt) 1359{ 1360 struct vpfe_device *vpfe = video_drvdata(file); 1361 1362 *fmt = vpfe->fmt; 1363 1364 return 0; 1365} 1366 1367static int vpfe_enum_fmt(struct file *file, void *priv, 1368 struct v4l2_fmtdesc *f) 1369{ 1370 struct vpfe_device *vpfe = video_drvdata(file); 1371 struct vpfe_subdev_info *sdinfo; 1372 struct vpfe_fmt *fmt; 1373 1374 sdinfo = vpfe->current_subdev; 1375 if (!sdinfo->sd) 1376 return -EINVAL; 1377 1378 if (f->index >= vpfe->num_active_fmt) 1379 return -EINVAL; 1380 1381 fmt = vpfe->active_fmt[f->index]; 1382 1383 f->pixelformat = fmt->fourcc; 1384 1385 vpfe_dbg(1, vpfe, "%s: mbus index: %d code: %x pixelformat: %s\n", 1386 __func__, f->index, fmt->code, print_fourcc(fmt->fourcc)); 1387 1388 return 0; 1389} 1390 1391static int vpfe_try_fmt(struct file *file, void *priv, 1392 struct v4l2_format *f) 1393{ 1394 struct vpfe_device *vpfe = video_drvdata(file); 1395 struct v4l2_subdev *sd = vpfe->current_subdev->sd; 1396 const struct vpfe_fmt *fmt; 1397 struct v4l2_subdev_frame_size_enum fse = { 1398 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 1399 }; 1400 int ret, found; 1401 1402 fmt = find_format_by_pix(vpfe, f->fmt.pix.pixelformat); 1403 if (!fmt) { 1404 /* default to first entry */ 1405 vpfe_dbg(3, vpfe, "Invalid pixel code: %x, default used instead\n", 1406 f->fmt.pix.pixelformat); 1407 fmt = vpfe->active_fmt[0]; 1408 f->fmt.pix.pixelformat = fmt->fourcc; 1409 } 1410 1411 f->fmt.pix.field = vpfe->fmt.fmt.pix.field; 1412 1413 /* check for/find a valid width/height */ 1414 ret = 0; 1415 found = false; 1416 fse.pad = 0; 1417 fse.code = fmt->code; 1418 for (fse.index = 0; ; fse.index++) { 1419 ret = v4l2_subdev_call(sd, pad, enum_frame_size, 1420 NULL, &fse); 1421 if (ret) 1422 break; 1423 1424 if (f->fmt.pix.width == fse.max_width && 1425 f->fmt.pix.height == fse.max_height) { 1426 found = true; 1427 break; 1428 } else if (f->fmt.pix.width >= fse.min_width && 1429 f->fmt.pix.width <= fse.max_width && 1430 f->fmt.pix.height >= fse.min_height && 1431 f->fmt.pix.height <= fse.max_height) { 1432 found = true; 1433 break; 1434 } 1435 } 1436 1437 if (!found) { 1438 /* use existing values as default */ 1439 f->fmt.pix.width = vpfe->fmt.fmt.pix.width; 1440 f->fmt.pix.height = vpfe->fmt.fmt.pix.height; 1441 } 1442 1443 /* 1444 * Use current colorspace for now, it will get 1445 * updated properly during s_fmt 1446 */ 1447 f->fmt.pix.colorspace = vpfe->fmt.fmt.pix.colorspace; 1448 return vpfe_calc_format_size(vpfe, fmt, f); 1449} 1450 1451static int vpfe_s_fmt(struct file *file, void *priv, 1452 struct v4l2_format *fmt) 1453{ 1454 struct vpfe_device *vpfe = video_drvdata(file); 1455 struct vpfe_fmt *f; 1456 struct v4l2_mbus_framefmt mbus_fmt; 1457 int ret; 1458 1459 /* If streaming is started, return error */ 1460 if (vb2_is_busy(&vpfe->buffer_queue)) { 1461 vpfe_err(vpfe, "%s device busy\n", __func__); 1462 return -EBUSY; 1463 } 1464 1465 ret = vpfe_try_fmt(file, priv, fmt); 1466 if (ret < 0) 1467 return ret; 1468 1469 f = find_format_by_pix(vpfe, fmt->fmt.pix.pixelformat); 1470 1471 v4l2_fill_mbus_format(&mbus_fmt, &fmt->fmt.pix, f->code); 1472 1473 ret = __subdev_set_format(vpfe, &mbus_fmt); 1474 if (ret) 1475 return ret; 1476 1477 /* Just double check nothing has gone wrong */ 1478 if (mbus_fmt.code != f->code) { 1479 vpfe_dbg(3, vpfe, 1480 "%s subdev changed format on us, this should not happen\n", 1481 __func__); 1482 return -EINVAL; 1483 } 1484 1485 v4l2_fill_pix_format(&vpfe->fmt.fmt.pix, &mbus_fmt); 1486 vpfe->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1487 vpfe->fmt.fmt.pix.pixelformat = f->fourcc; 1488 vpfe_calc_format_size(vpfe, f, &vpfe->fmt); 1489 *fmt = vpfe->fmt; 1490 vpfe->current_vpfe_fmt = f; 1491 1492 /* Update the crop window based on found values */ 1493 vpfe->crop.width = fmt->fmt.pix.width; 1494 vpfe->crop.height = fmt->fmt.pix.height; 1495 1496 /* set image capture parameters in the ccdc */ 1497 return vpfe_config_ccdc_image_format(vpfe); 1498} 1499 1500static int vpfe_enum_size(struct file *file, void *priv, 1501 struct v4l2_frmsizeenum *fsize) 1502{ 1503 struct vpfe_device *vpfe = video_drvdata(file); 1504 struct v4l2_subdev_frame_size_enum fse = { 1505 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 1506 }; 1507 struct v4l2_subdev *sd = vpfe->current_subdev->sd; 1508 struct vpfe_fmt *fmt; 1509 int ret; 1510 1511 /* check for valid format */ 1512 fmt = find_format_by_pix(vpfe, fsize->pixel_format); 1513 if (!fmt) { 1514 vpfe_dbg(3, vpfe, "Invalid pixel code: %x\n", 1515 fsize->pixel_format); 1516 return -EINVAL; 1517 } 1518 1519 memset(fsize->reserved, 0x0, sizeof(fsize->reserved)); 1520 1521 fse.index = fsize->index; 1522 fse.pad = 0; 1523 fse.code = fmt->code; 1524 ret = v4l2_subdev_call(sd, pad, enum_frame_size, NULL, &fse); 1525 if (ret) 1526 return ret; 1527 1528 vpfe_dbg(1, vpfe, "%s: index: %d code: %x W:[%d,%d] H:[%d,%d]\n", 1529 __func__, fse.index, fse.code, fse.min_width, fse.max_width, 1530 fse.min_height, fse.max_height); 1531 1532 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE; 1533 fsize->discrete.width = fse.max_width; 1534 fsize->discrete.height = fse.max_height; 1535 1536 vpfe_dbg(1, vpfe, "%s: index: %d pixformat: %s size: %dx%d\n", 1537 __func__, fsize->index, print_fourcc(fsize->pixel_format), 1538 fsize->discrete.width, fsize->discrete.height); 1539 1540 return 0; 1541} 1542 1543/* 1544 * vpfe_get_subdev_input_index - Get subdev index and subdev input index for a 1545 * given app input index 1546 */ 1547static int 1548vpfe_get_subdev_input_index(struct vpfe_device *vpfe, 1549 int *subdev_index, 1550 int *subdev_input_index, 1551 int app_input_index) 1552{ 1553 int i, j = 0; 1554 1555 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) { 1556 if (app_input_index < (j + 1)) { 1557 *subdev_index = i; 1558 *subdev_input_index = app_input_index - j; 1559 return 0; 1560 } 1561 j++; 1562 } 1563 return -EINVAL; 1564} 1565 1566/* 1567 * vpfe_get_app_input - Get app input index for a given subdev input index 1568 * driver stores the input index of the current sub device and translate it 1569 * when application request the current input 1570 */ 1571static int vpfe_get_app_input_index(struct vpfe_device *vpfe, 1572 int *app_input_index) 1573{ 1574 struct vpfe_config *cfg = vpfe->cfg; 1575 struct vpfe_subdev_info *sdinfo; 1576 struct i2c_client *client; 1577 struct i2c_client *curr_client; 1578 int i, j = 0; 1579 1580 curr_client = v4l2_get_subdevdata(vpfe->current_subdev->sd); 1581 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) { 1582 sdinfo = &cfg->sub_devs[i]; 1583 client = v4l2_get_subdevdata(sdinfo->sd); 1584 if (client->addr == curr_client->addr && 1585 client->adapter->nr == curr_client->adapter->nr) { 1586 if (vpfe->current_input >= 1) 1587 return -1; 1588 *app_input_index = j + vpfe->current_input; 1589 return 0; 1590 } 1591 j++; 1592 } 1593 return -EINVAL; 1594} 1595 1596static int vpfe_enum_input(struct file *file, void *priv, 1597 struct v4l2_input *inp) 1598{ 1599 struct vpfe_device *vpfe = video_drvdata(file); 1600 struct vpfe_subdev_info *sdinfo; 1601 int subdev, index; 1602 1603 if (vpfe_get_subdev_input_index(vpfe, &subdev, &index, 1604 inp->index) < 0) { 1605 vpfe_dbg(1, vpfe, 1606 "input information not found for the subdev\n"); 1607 return -EINVAL; 1608 } 1609 sdinfo = &vpfe->cfg->sub_devs[subdev]; 1610 *inp = sdinfo->inputs[index]; 1611 1612 return 0; 1613} 1614 1615static int vpfe_g_input(struct file *file, void *priv, unsigned int *index) 1616{ 1617 struct vpfe_device *vpfe = video_drvdata(file); 1618 1619 return vpfe_get_app_input_index(vpfe, index); 1620} 1621 1622/* Assumes caller is holding vpfe_dev->lock */ 1623static int vpfe_set_input(struct vpfe_device *vpfe, unsigned int index) 1624{ 1625 int subdev_index = 0, inp_index = 0; 1626 struct vpfe_subdev_info *sdinfo; 1627 struct vpfe_route *route; 1628 u32 input, output; 1629 int ret; 1630 1631 /* If streaming is started, return error */ 1632 if (vb2_is_busy(&vpfe->buffer_queue)) { 1633 vpfe_err(vpfe, "%s device busy\n", __func__); 1634 return -EBUSY; 1635 } 1636 ret = vpfe_get_subdev_input_index(vpfe, 1637 &subdev_index, 1638 &inp_index, 1639 index); 1640 if (ret < 0) { 1641 vpfe_err(vpfe, "invalid input index: %d\n", index); 1642 goto get_out; 1643 } 1644 1645 sdinfo = &vpfe->cfg->sub_devs[subdev_index]; 1646 sdinfo->sd = vpfe->sd[subdev_index]; 1647 route = &sdinfo->routes[inp_index]; 1648 if (route && sdinfo->can_route) { 1649 input = route->input; 1650 output = route->output; 1651 if (sdinfo->sd) { 1652 ret = v4l2_subdev_call(sdinfo->sd, video, 1653 s_routing, input, output, 0); 1654 if (ret) { 1655 vpfe_err(vpfe, "s_routing failed\n"); 1656 ret = -EINVAL; 1657 goto get_out; 1658 } 1659 } 1660 1661 } 1662 1663 vpfe->current_subdev = sdinfo; 1664 if (sdinfo->sd) 1665 vpfe->v4l2_dev.ctrl_handler = sdinfo->sd->ctrl_handler; 1666 vpfe->current_input = index; 1667 vpfe->std_index = 0; 1668 1669 /* set the bus/interface parameter for the sub device in ccdc */ 1670 ret = vpfe_ccdc_set_hw_if_params(&vpfe->ccdc, &sdinfo->vpfe_param); 1671 if (ret) 1672 return ret; 1673 1674 /* set the default image parameters in the device */ 1675 return vpfe_config_image_format(vpfe, 1676 vpfe_standards[vpfe->std_index].std_id); 1677 1678get_out: 1679 return ret; 1680} 1681 1682static int vpfe_s_input(struct file *file, void *priv, unsigned int index) 1683{ 1684 struct vpfe_device *vpfe = video_drvdata(file); 1685 1686 return vpfe_set_input(vpfe, index); 1687} 1688 1689static int vpfe_querystd(struct file *file, void *priv, v4l2_std_id *std_id) 1690{ 1691 struct vpfe_device *vpfe = video_drvdata(file); 1692 struct vpfe_subdev_info *sdinfo; 1693 1694 sdinfo = vpfe->current_subdev; 1695 if (!(sdinfo->inputs[0].capabilities & V4L2_IN_CAP_STD)) 1696 return -ENODATA; 1697 1698 /* Call querystd function of decoder device */ 1699 return v4l2_device_call_until_err(&vpfe->v4l2_dev, sdinfo->grp_id, 1700 video, querystd, std_id); 1701} 1702 1703static int vpfe_s_std(struct file *file, void *priv, v4l2_std_id std_id) 1704{ 1705 struct vpfe_device *vpfe = video_drvdata(file); 1706 struct vpfe_subdev_info *sdinfo; 1707 int ret; 1708 1709 sdinfo = vpfe->current_subdev; 1710 if (!(sdinfo->inputs[0].capabilities & V4L2_IN_CAP_STD)) 1711 return -ENODATA; 1712 1713 /* if trying to set the same std then nothing to do */ 1714 if (vpfe_standards[vpfe->std_index].std_id == std_id) 1715 return 0; 1716 1717 /* If streaming is started, return error */ 1718 if (vb2_is_busy(&vpfe->buffer_queue)) { 1719 vpfe_err(vpfe, "%s device busy\n", __func__); 1720 ret = -EBUSY; 1721 return ret; 1722 } 1723 1724 ret = v4l2_device_call_until_err(&vpfe->v4l2_dev, sdinfo->grp_id, 1725 video, s_std, std_id); 1726 if (ret < 0) { 1727 vpfe_err(vpfe, "Failed to set standard\n"); 1728 return ret; 1729 } 1730 ret = vpfe_config_image_format(vpfe, std_id); 1731 1732 return ret; 1733} 1734 1735static int vpfe_g_std(struct file *file, void *priv, v4l2_std_id *std_id) 1736{ 1737 struct vpfe_device *vpfe = video_drvdata(file); 1738 struct vpfe_subdev_info *sdinfo; 1739 1740 sdinfo = vpfe->current_subdev; 1741 if (sdinfo->inputs[0].capabilities != V4L2_IN_CAP_STD) 1742 return -ENODATA; 1743 1744 *std_id = vpfe_standards[vpfe->std_index].std_id; 1745 1746 return 0; 1747} 1748 1749/* 1750 * vpfe_calculate_offsets : This function calculates buffers offset 1751 * for top and bottom field 1752 */ 1753static void vpfe_calculate_offsets(struct vpfe_device *vpfe) 1754{ 1755 struct v4l2_rect image_win; 1756 1757 vpfe_ccdc_get_image_window(&vpfe->ccdc, &image_win); 1758 vpfe->field_off = image_win.height * image_win.width; 1759} 1760 1761/* 1762 * vpfe_queue_setup - Callback function for buffer setup. 1763 * @vq: vb2_queue ptr 1764 * @nbuffers: ptr to number of buffers requested by application 1765 * @nplanes:: contains number of distinct video planes needed to hold a frame 1766 * @sizes[]: contains the size (in bytes) of each plane. 1767 * @alloc_devs: ptr to allocation context 1768 * 1769 * This callback function is called when reqbuf() is called to adjust 1770 * the buffer count and buffer size 1771 */ 1772static int vpfe_queue_setup(struct vb2_queue *vq, 1773 unsigned int *nbuffers, unsigned int *nplanes, 1774 unsigned int sizes[], struct device *alloc_devs[]) 1775{ 1776 struct vpfe_device *vpfe = vb2_get_drv_priv(vq); 1777 unsigned size = vpfe->fmt.fmt.pix.sizeimage; 1778 1779 if (vq->num_buffers + *nbuffers < 3) 1780 *nbuffers = 3 - vq->num_buffers; 1781 1782 if (*nplanes) { 1783 if (sizes[0] < size) 1784 return -EINVAL; 1785 size = sizes[0]; 1786 } 1787 1788 *nplanes = 1; 1789 sizes[0] = size; 1790 1791 vpfe_dbg(1, vpfe, 1792 "nbuffers=%d, size=%u\n", *nbuffers, sizes[0]); 1793 1794 /* Calculate field offset */ 1795 vpfe_calculate_offsets(vpfe); 1796 1797 return 0; 1798} 1799 1800/* 1801 * vpfe_buffer_prepare : callback function for buffer prepare 1802 * @vb: ptr to vb2_buffer 1803 * 1804 * This is the callback function for buffer prepare when vb2_qbuf() 1805 * function is called. The buffer is prepared and user space virtual address 1806 * or user address is converted into physical address 1807 */ 1808static int vpfe_buffer_prepare(struct vb2_buffer *vb) 1809{ 1810 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 1811 struct vpfe_device *vpfe = vb2_get_drv_priv(vb->vb2_queue); 1812 1813 vb2_set_plane_payload(vb, 0, vpfe->fmt.fmt.pix.sizeimage); 1814 1815 if (vb2_get_plane_payload(vb, 0) > vb2_plane_size(vb, 0)) 1816 return -EINVAL; 1817 1818 vbuf->field = vpfe->fmt.fmt.pix.field; 1819 1820 return 0; 1821} 1822 1823/* 1824 * vpfe_buffer_queue : Callback function to add buffer to DMA queue 1825 * @vb: ptr to vb2_buffer 1826 */ 1827static void vpfe_buffer_queue(struct vb2_buffer *vb) 1828{ 1829 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 1830 struct vpfe_device *vpfe = vb2_get_drv_priv(vb->vb2_queue); 1831 struct vpfe_cap_buffer *buf = to_vpfe_buffer(vbuf); 1832 unsigned long flags = 0; 1833 1834 /* add the buffer to the DMA queue */ 1835 spin_lock_irqsave(&vpfe->dma_queue_lock, flags); 1836 list_add_tail(&buf->list, &vpfe->dma_queue); 1837 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags); 1838} 1839 1840static void vpfe_return_all_buffers(struct vpfe_device *vpfe, 1841 enum vb2_buffer_state state) 1842{ 1843 struct vpfe_cap_buffer *buf, *node; 1844 unsigned long flags; 1845 1846 spin_lock_irqsave(&vpfe->dma_queue_lock, flags); 1847 list_for_each_entry_safe(buf, node, &vpfe->dma_queue, list) { 1848 vb2_buffer_done(&buf->vb.vb2_buf, state); 1849 list_del(&buf->list); 1850 } 1851 1852 if (vpfe->cur_frm) 1853 vb2_buffer_done(&vpfe->cur_frm->vb.vb2_buf, state); 1854 1855 if (vpfe->next_frm && vpfe->next_frm != vpfe->cur_frm) 1856 vb2_buffer_done(&vpfe->next_frm->vb.vb2_buf, state); 1857 1858 vpfe->cur_frm = NULL; 1859 vpfe->next_frm = NULL; 1860 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags); 1861} 1862 1863/* 1864 * vpfe_start_streaming : Starts the DMA engine for streaming 1865 * @vb: ptr to vb2_buffer 1866 * @count: number of buffers 1867 */ 1868static int vpfe_start_streaming(struct vb2_queue *vq, unsigned int count) 1869{ 1870 struct vpfe_device *vpfe = vb2_get_drv_priv(vq); 1871 struct vpfe_subdev_info *sdinfo; 1872 unsigned long flags; 1873 unsigned long addr; 1874 int ret; 1875 1876 spin_lock_irqsave(&vpfe->dma_queue_lock, flags); 1877 1878 vpfe->field = 0; 1879 vpfe->sequence = 0; 1880 1881 sdinfo = vpfe->current_subdev; 1882 1883 vpfe_attach_irq(vpfe); 1884 1885 vpfe->stopping = false; 1886 init_completion(&vpfe->capture_stop); 1887 1888 if (vpfe->ccdc.ccdc_cfg.if_type == VPFE_RAW_BAYER) 1889 vpfe_ccdc_config_raw(&vpfe->ccdc); 1890 else 1891 vpfe_ccdc_config_ycbcr(&vpfe->ccdc); 1892 1893 /* Get the next frame from the buffer queue */ 1894 vpfe->next_frm = list_entry(vpfe->dma_queue.next, 1895 struct vpfe_cap_buffer, list); 1896 vpfe->cur_frm = vpfe->next_frm; 1897 /* Remove buffer from the buffer queue */ 1898 list_del(&vpfe->cur_frm->list); 1899 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags); 1900 1901 addr = vb2_dma_contig_plane_dma_addr(&vpfe->cur_frm->vb.vb2_buf, 0); 1902 1903 vpfe_set_sdr_addr(&vpfe->ccdc, (unsigned long)(addr)); 1904 1905 vpfe_pcr_enable(&vpfe->ccdc, 1); 1906 1907 ret = v4l2_subdev_call(sdinfo->sd, video, s_stream, 1); 1908 if (ret < 0) { 1909 vpfe_err(vpfe, "Error in attaching interrupt handle\n"); 1910 goto err; 1911 } 1912 1913 return 0; 1914 1915err: 1916 vpfe_return_all_buffers(vpfe, VB2_BUF_STATE_QUEUED); 1917 vpfe_pcr_enable(&vpfe->ccdc, 0); 1918 return ret; 1919} 1920 1921/* 1922 * vpfe_stop_streaming : Stop the DMA engine 1923 * @vq: ptr to vb2_queue 1924 * 1925 * This callback stops the DMA engine and any remaining buffers 1926 * in the DMA queue are released. 1927 */ 1928static void vpfe_stop_streaming(struct vb2_queue *vq) 1929{ 1930 struct vpfe_device *vpfe = vb2_get_drv_priv(vq); 1931 struct vpfe_subdev_info *sdinfo; 1932 int ret; 1933 1934 vpfe_pcr_enable(&vpfe->ccdc, 0); 1935 1936 /* Wait for the last frame to be captured */ 1937 vpfe->stopping = true; 1938 wait_for_completion_timeout(&vpfe->capture_stop, 1939 msecs_to_jiffies(250)); 1940 1941 vpfe_detach_irq(vpfe); 1942 1943 sdinfo = vpfe->current_subdev; 1944 ret = v4l2_subdev_call(sdinfo->sd, video, s_stream, 0); 1945 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV) 1946 vpfe_dbg(1, vpfe, "stream off failed in subdev\n"); 1947 1948 /* release all active buffers */ 1949 vpfe_return_all_buffers(vpfe, VB2_BUF_STATE_ERROR); 1950} 1951 1952static int vpfe_g_pixelaspect(struct file *file, void *priv, 1953 int type, struct v4l2_fract *f) 1954{ 1955 struct vpfe_device *vpfe = video_drvdata(file); 1956 1957 if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE || 1958 vpfe->std_index >= ARRAY_SIZE(vpfe_standards)) 1959 return -EINVAL; 1960 1961 *f = vpfe_standards[vpfe->std_index].pixelaspect; 1962 1963 return 0; 1964} 1965 1966static int 1967vpfe_g_selection(struct file *file, void *fh, struct v4l2_selection *s) 1968{ 1969 struct vpfe_device *vpfe = video_drvdata(file); 1970 1971 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE || 1972 vpfe->std_index >= ARRAY_SIZE(vpfe_standards)) 1973 return -EINVAL; 1974 1975 switch (s->target) { 1976 case V4L2_SEL_TGT_CROP_BOUNDS: 1977 case V4L2_SEL_TGT_CROP_DEFAULT: 1978 s->r.left = 0; 1979 s->r.top = 0; 1980 s->r.width = vpfe_standards[vpfe->std_index].width; 1981 s->r.height = vpfe_standards[vpfe->std_index].height; 1982 break; 1983 1984 case V4L2_SEL_TGT_CROP: 1985 s->r = vpfe->crop; 1986 break; 1987 1988 default: 1989 return -EINVAL; 1990 } 1991 1992 return 0; 1993} 1994 1995static int 1996vpfe_s_selection(struct file *file, void *fh, struct v4l2_selection *s) 1997{ 1998 struct vpfe_device *vpfe = video_drvdata(file); 1999 struct v4l2_rect cr = vpfe->crop; 2000 struct v4l2_rect r = s->r; 2001 u32 bpp; 2002 2003 /* If streaming is started, return error */ 2004 if (vb2_is_busy(&vpfe->buffer_queue)) { 2005 vpfe_err(vpfe, "%s device busy\n", __func__); 2006 return -EBUSY; 2007 } 2008 2009 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE || 2010 s->target != V4L2_SEL_TGT_CROP) 2011 return -EINVAL; 2012 2013 v4l_bound_align_image(&r.width, 0, cr.width, 0, 2014 &r.height, 0, cr.height, 0, 0); 2015 2016 r.left = clamp_t(unsigned int, r.left, 0, cr.width - r.width); 2017 r.top = clamp_t(unsigned int, r.top, 0, cr.height - r.height); 2018 2019 if (s->flags & V4L2_SEL_FLAG_LE && !v4l2_rect_enclosed(&r, &s->r)) 2020 return -ERANGE; 2021 2022 if (s->flags & V4L2_SEL_FLAG_GE && !v4l2_rect_enclosed(&s->r, &r)) 2023 return -ERANGE; 2024 2025 s->r = vpfe->crop = r; 2026 2027 bpp = __get_bytesperpixel(vpfe, vpfe->current_vpfe_fmt); 2028 vpfe_ccdc_set_image_window(&vpfe->ccdc, &r, bpp); 2029 vpfe->fmt.fmt.pix.width = r.width; 2030 vpfe->fmt.fmt.pix.height = r.height; 2031 vpfe->fmt.fmt.pix.bytesperline = 2032 vpfe_ccdc_get_line_length(&vpfe->ccdc); 2033 vpfe->fmt.fmt.pix.sizeimage = vpfe->fmt.fmt.pix.bytesperline * 2034 vpfe->fmt.fmt.pix.height; 2035 2036 vpfe_dbg(1, vpfe, "cropped (%d,%d)/%dx%d of %dx%d\n", 2037 r.left, r.top, r.width, r.height, cr.width, cr.height); 2038 2039 return 0; 2040} 2041 2042static long vpfe_ioctl_default(struct file *file, void *priv, 2043 bool valid_prio, unsigned int cmd, void *param) 2044{ 2045 struct vpfe_device *vpfe = video_drvdata(file); 2046 int ret; 2047 2048 if (!valid_prio) { 2049 vpfe_err(vpfe, "%s device busy\n", __func__); 2050 return -EBUSY; 2051 } 2052 2053 /* If streaming is started, return error */ 2054 if (vb2_is_busy(&vpfe->buffer_queue)) { 2055 vpfe_err(vpfe, "%s device busy\n", __func__); 2056 return -EBUSY; 2057 } 2058 2059 switch (cmd) { 2060 case VIDIOC_AM437X_CCDC_CFG: 2061 ret = vpfe_ccdc_set_params(&vpfe->ccdc, (void __user *)param); 2062 if (ret) { 2063 vpfe_dbg(2, vpfe, 2064 "Error setting parameters in CCDC\n"); 2065 return ret; 2066 } 2067 ret = vpfe_get_ccdc_image_format(vpfe, 2068 &vpfe->fmt); 2069 if (ret < 0) { 2070 vpfe_dbg(2, vpfe, 2071 "Invalid image format at CCDC\n"); 2072 return ret; 2073 } 2074 break; 2075 2076 default: 2077 ret = -ENOTTY; 2078 break; 2079 } 2080 2081 return ret; 2082} 2083 2084static const struct vb2_ops vpfe_video_qops = { 2085 .wait_prepare = vb2_ops_wait_prepare, 2086 .wait_finish = vb2_ops_wait_finish, 2087 .queue_setup = vpfe_queue_setup, 2088 .buf_prepare = vpfe_buffer_prepare, 2089 .buf_queue = vpfe_buffer_queue, 2090 .start_streaming = vpfe_start_streaming, 2091 .stop_streaming = vpfe_stop_streaming, 2092}; 2093 2094/* vpfe capture driver file operations */ 2095static const struct v4l2_file_operations vpfe_fops = { 2096 .owner = THIS_MODULE, 2097 .open = vpfe_open, 2098 .release = vpfe_release, 2099 .read = vb2_fop_read, 2100 .poll = vb2_fop_poll, 2101 .unlocked_ioctl = video_ioctl2, 2102 .mmap = vb2_fop_mmap, 2103}; 2104 2105/* vpfe capture ioctl operations */ 2106static const struct v4l2_ioctl_ops vpfe_ioctl_ops = { 2107 .vidioc_querycap = vpfe_querycap, 2108 .vidioc_enum_fmt_vid_cap = vpfe_enum_fmt, 2109 .vidioc_g_fmt_vid_cap = vpfe_g_fmt, 2110 .vidioc_s_fmt_vid_cap = vpfe_s_fmt, 2111 .vidioc_try_fmt_vid_cap = vpfe_try_fmt, 2112 2113 .vidioc_enum_framesizes = vpfe_enum_size, 2114 2115 .vidioc_enum_input = vpfe_enum_input, 2116 .vidioc_g_input = vpfe_g_input, 2117 .vidioc_s_input = vpfe_s_input, 2118 2119 .vidioc_querystd = vpfe_querystd, 2120 .vidioc_s_std = vpfe_s_std, 2121 .vidioc_g_std = vpfe_g_std, 2122 2123 .vidioc_reqbufs = vb2_ioctl_reqbufs, 2124 .vidioc_create_bufs = vb2_ioctl_create_bufs, 2125 .vidioc_prepare_buf = vb2_ioctl_prepare_buf, 2126 .vidioc_querybuf = vb2_ioctl_querybuf, 2127 .vidioc_qbuf = vb2_ioctl_qbuf, 2128 .vidioc_dqbuf = vb2_ioctl_dqbuf, 2129 .vidioc_expbuf = vb2_ioctl_expbuf, 2130 .vidioc_streamon = vb2_ioctl_streamon, 2131 .vidioc_streamoff = vb2_ioctl_streamoff, 2132 2133 .vidioc_log_status = v4l2_ctrl_log_status, 2134 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, 2135 .vidioc_unsubscribe_event = v4l2_event_unsubscribe, 2136 2137 .vidioc_g_pixelaspect = vpfe_g_pixelaspect, 2138 .vidioc_g_selection = vpfe_g_selection, 2139 .vidioc_s_selection = vpfe_s_selection, 2140 2141 .vidioc_default = vpfe_ioctl_default, 2142}; 2143 2144static int 2145vpfe_async_bound(struct v4l2_async_notifier *notifier, 2146 struct v4l2_subdev *subdev, 2147 struct v4l2_async_connection *asd) 2148{ 2149 struct vpfe_device *vpfe = container_of(notifier->v4l2_dev, 2150 struct vpfe_device, v4l2_dev); 2151 struct vpfe_subdev_info *sdinfo; 2152 struct vpfe_fmt *fmt; 2153 int ret = 0; 2154 bool found = false; 2155 int i, j, k; 2156 2157 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) { 2158 if (vpfe->cfg->asd[i]->match.fwnode == 2159 asd[i].match.fwnode) { 2160 sdinfo = &vpfe->cfg->sub_devs[i]; 2161 vpfe->sd[i] = subdev; 2162 vpfe->sd[i]->grp_id = sdinfo->grp_id; 2163 found = true; 2164 break; 2165 } 2166 } 2167 2168 if (!found) { 2169 vpfe_info(vpfe, "sub device (%s) not matched\n", subdev->name); 2170 return -EINVAL; 2171 } 2172 2173 vpfe->video_dev.tvnorms |= sdinfo->inputs[0].std; 2174 2175 vpfe->num_active_fmt = 0; 2176 for (j = 0, i = 0; (ret != -EINVAL); ++j) { 2177 struct v4l2_subdev_mbus_code_enum mbus_code = { 2178 .index = j, 2179 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 2180 }; 2181 2182 ret = v4l2_subdev_call(subdev, pad, enum_mbus_code, 2183 NULL, &mbus_code); 2184 if (ret) 2185 continue; 2186 2187 vpfe_dbg(3, vpfe, 2188 "subdev %s: code: %04x idx: %d\n", 2189 subdev->name, mbus_code.code, j); 2190 2191 for (k = 0; k < ARRAY_SIZE(formats); k++) { 2192 fmt = &formats[k]; 2193 if (mbus_code.code != fmt->code) 2194 continue; 2195 vpfe->active_fmt[i] = fmt; 2196 vpfe_dbg(3, vpfe, 2197 "matched fourcc: %s code: %04x idx: %d\n", 2198 print_fourcc(fmt->fourcc), mbus_code.code, i); 2199 vpfe->num_active_fmt = ++i; 2200 } 2201 } 2202 2203 if (!i) { 2204 vpfe_err(vpfe, "No suitable format reported by subdev %s\n", 2205 subdev->name); 2206 return -EINVAL; 2207 } 2208 return 0; 2209} 2210 2211static int vpfe_probe_complete(struct vpfe_device *vpfe) 2212{ 2213 struct video_device *vdev; 2214 struct vb2_queue *q; 2215 int err; 2216 2217 spin_lock_init(&vpfe->dma_queue_lock); 2218 mutex_init(&vpfe->lock); 2219 2220 vpfe->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 2221 2222 /* set first sub device as current one */ 2223 vpfe->current_subdev = &vpfe->cfg->sub_devs[0]; 2224 vpfe->v4l2_dev.ctrl_handler = vpfe->sd[0]->ctrl_handler; 2225 2226 err = vpfe_set_input(vpfe, 0); 2227 if (err) 2228 goto probe_out; 2229 2230 /* Initialize videobuf2 queue as per the buffer type */ 2231 q = &vpfe->buffer_queue; 2232 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 2233 q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ; 2234 q->drv_priv = vpfe; 2235 q->ops = &vpfe_video_qops; 2236 q->mem_ops = &vb2_dma_contig_memops; 2237 q->buf_struct_size = sizeof(struct vpfe_cap_buffer); 2238 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 2239 q->lock = &vpfe->lock; 2240 q->min_buffers_needed = 1; 2241 q->dev = vpfe->pdev; 2242 2243 err = vb2_queue_init(q); 2244 if (err) { 2245 vpfe_err(vpfe, "vb2_queue_init() failed\n"); 2246 goto probe_out; 2247 } 2248 2249 INIT_LIST_HEAD(&vpfe->dma_queue); 2250 2251 vdev = &vpfe->video_dev; 2252 strscpy(vdev->name, VPFE_MODULE_NAME, sizeof(vdev->name)); 2253 vdev->release = video_device_release_empty; 2254 vdev->fops = &vpfe_fops; 2255 vdev->ioctl_ops = &vpfe_ioctl_ops; 2256 vdev->v4l2_dev = &vpfe->v4l2_dev; 2257 vdev->vfl_dir = VFL_DIR_RX; 2258 vdev->queue = q; 2259 vdev->lock = &vpfe->lock; 2260 vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING | 2261 V4L2_CAP_READWRITE; 2262 video_set_drvdata(vdev, vpfe); 2263 err = video_register_device(&vpfe->video_dev, VFL_TYPE_VIDEO, -1); 2264 if (err) { 2265 vpfe_err(vpfe, 2266 "Unable to register video device.\n"); 2267 goto probe_out; 2268 } 2269 2270 return 0; 2271 2272probe_out: 2273 v4l2_device_unregister(&vpfe->v4l2_dev); 2274 return err; 2275} 2276 2277static int vpfe_async_complete(struct v4l2_async_notifier *notifier) 2278{ 2279 struct vpfe_device *vpfe = container_of(notifier->v4l2_dev, 2280 struct vpfe_device, v4l2_dev); 2281 2282 return vpfe_probe_complete(vpfe); 2283} 2284 2285static const struct v4l2_async_notifier_operations vpfe_async_ops = { 2286 .bound = vpfe_async_bound, 2287 .complete = vpfe_async_complete, 2288}; 2289 2290static struct vpfe_config * 2291vpfe_get_pdata(struct vpfe_device *vpfe) 2292{ 2293 struct device_node *endpoint = NULL; 2294 struct device *dev = vpfe->pdev; 2295 struct vpfe_subdev_info *sdinfo; 2296 struct vpfe_config *pdata; 2297 unsigned int flags; 2298 unsigned int i; 2299 int err; 2300 2301 dev_dbg(dev, "vpfe_get_pdata\n"); 2302 2303 v4l2_async_nf_init(&vpfe->notifier, &vpfe->v4l2_dev); 2304 2305 if (!IS_ENABLED(CONFIG_OF) || !dev->of_node) 2306 return dev->platform_data; 2307 2308 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 2309 if (!pdata) 2310 return NULL; 2311 2312 for (i = 0; ; i++) { 2313 struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 }; 2314 struct device_node *rem; 2315 2316 endpoint = of_graph_get_next_endpoint(dev->of_node, endpoint); 2317 if (!endpoint) 2318 break; 2319 2320 sdinfo = &pdata->sub_devs[i]; 2321 sdinfo->grp_id = 0; 2322 2323 /* we only support camera */ 2324 sdinfo->inputs[0].index = i; 2325 strscpy(sdinfo->inputs[0].name, "Camera", 2326 sizeof(sdinfo->inputs[0].name)); 2327 sdinfo->inputs[0].type = V4L2_INPUT_TYPE_CAMERA; 2328 sdinfo->inputs[0].std = V4L2_STD_ALL; 2329 sdinfo->inputs[0].capabilities = V4L2_IN_CAP_STD; 2330 2331 sdinfo->can_route = 0; 2332 sdinfo->routes = NULL; 2333 2334 of_property_read_u32(endpoint, "ti,am437x-vpfe-interface", 2335 &sdinfo->vpfe_param.if_type); 2336 if (sdinfo->vpfe_param.if_type < 0 || 2337 sdinfo->vpfe_param.if_type > 4) { 2338 sdinfo->vpfe_param.if_type = VPFE_RAW_BAYER; 2339 } 2340 2341 err = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), 2342 &bus_cfg); 2343 if (err) { 2344 dev_err(dev, "Could not parse the endpoint\n"); 2345 goto cleanup; 2346 } 2347 2348 sdinfo->vpfe_param.bus_width = bus_cfg.bus.parallel.bus_width; 2349 2350 if (sdinfo->vpfe_param.bus_width < 8 || 2351 sdinfo->vpfe_param.bus_width > 16) { 2352 dev_err(dev, "Invalid bus width.\n"); 2353 goto cleanup; 2354 } 2355 2356 flags = bus_cfg.bus.parallel.flags; 2357 2358 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) 2359 sdinfo->vpfe_param.hdpol = 1; 2360 2361 if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) 2362 sdinfo->vpfe_param.vdpol = 1; 2363 2364 rem = of_graph_get_remote_port_parent(endpoint); 2365 if (!rem) { 2366 dev_err(dev, "Remote device at %pOF not found\n", 2367 endpoint); 2368 goto cleanup; 2369 } 2370 2371 pdata->asd[i] = v4l2_async_nf_add_fwnode(&vpfe->notifier, 2372 of_fwnode_handle(rem), 2373 struct v4l2_async_connection); 2374 of_node_put(rem); 2375 if (IS_ERR(pdata->asd[i])) 2376 goto cleanup; 2377 } 2378 2379 of_node_put(endpoint); 2380 return pdata; 2381 2382cleanup: 2383 v4l2_async_nf_cleanup(&vpfe->notifier); 2384 of_node_put(endpoint); 2385 return NULL; 2386} 2387 2388/* 2389 * vpfe_probe : This function creates device entries by register 2390 * itself to the V4L2 driver and initializes fields of each 2391 * device objects 2392 */ 2393static int vpfe_probe(struct platform_device *pdev) 2394{ 2395 struct vpfe_config *vpfe_cfg; 2396 struct vpfe_device *vpfe; 2397 struct vpfe_ccdc *ccdc; 2398 int ret; 2399 2400 vpfe = devm_kzalloc(&pdev->dev, sizeof(*vpfe), GFP_KERNEL); 2401 if (!vpfe) 2402 return -ENOMEM; 2403 2404 vpfe->pdev = &pdev->dev; 2405 2406 ret = v4l2_device_register(&pdev->dev, &vpfe->v4l2_dev); 2407 if (ret) { 2408 vpfe_err(vpfe, "Unable to register v4l2 device.\n"); 2409 return ret; 2410 } 2411 2412 vpfe_cfg = vpfe_get_pdata(vpfe); 2413 if (!vpfe_cfg) { 2414 dev_err(&pdev->dev, "No platform data\n"); 2415 ret = -EINVAL; 2416 goto probe_out_cleanup; 2417 } 2418 2419 vpfe->cfg = vpfe_cfg; 2420 ccdc = &vpfe->ccdc; 2421 2422 ccdc->ccdc_cfg.base_addr = devm_platform_ioremap_resource(pdev, 0); 2423 if (IS_ERR(ccdc->ccdc_cfg.base_addr)) { 2424 ret = PTR_ERR(ccdc->ccdc_cfg.base_addr); 2425 goto probe_out_cleanup; 2426 } 2427 2428 ret = platform_get_irq(pdev, 0); 2429 if (ret < 0) 2430 goto probe_out_cleanup; 2431 vpfe->irq = ret; 2432 2433 ret = devm_request_irq(vpfe->pdev, vpfe->irq, vpfe_isr, 0, 2434 "vpfe_capture0", vpfe); 2435 if (ret) { 2436 dev_err(&pdev->dev, "Unable to request interrupt\n"); 2437 ret = -EINVAL; 2438 goto probe_out_cleanup; 2439 } 2440 2441 /* set the driver data in platform device */ 2442 platform_set_drvdata(pdev, vpfe); 2443 /* Enabling module functional clock */ 2444 pm_runtime_enable(&pdev->dev); 2445 2446 /* for now just enable it here instead of waiting for the open */ 2447 ret = pm_runtime_resume_and_get(&pdev->dev); 2448 if (ret < 0) { 2449 vpfe_err(vpfe, "Unable to resume device.\n"); 2450 goto probe_out_cleanup; 2451 } 2452 2453 vpfe_ccdc_config_defaults(ccdc); 2454 2455 pm_runtime_put_sync(&pdev->dev); 2456 2457 vpfe->sd = devm_kcalloc(&pdev->dev, 2458 ARRAY_SIZE(vpfe->cfg->asd), 2459 sizeof(struct v4l2_subdev *), 2460 GFP_KERNEL); 2461 if (!vpfe->sd) { 2462 ret = -ENOMEM; 2463 goto probe_out_cleanup; 2464 } 2465 2466 vpfe->notifier.ops = &vpfe_async_ops; 2467 ret = v4l2_async_nf_register(&vpfe->notifier); 2468 if (ret) { 2469 vpfe_err(vpfe, "Error registering async notifier\n"); 2470 ret = -EINVAL; 2471 goto probe_out_cleanup; 2472 } 2473 2474 return 0; 2475 2476probe_out_cleanup: 2477 v4l2_async_nf_cleanup(&vpfe->notifier); 2478 v4l2_device_unregister(&vpfe->v4l2_dev); 2479 return ret; 2480} 2481 2482/* 2483 * vpfe_remove : It un-register device from V4L2 driver 2484 */ 2485static void vpfe_remove(struct platform_device *pdev) 2486{ 2487 struct vpfe_device *vpfe = platform_get_drvdata(pdev); 2488 2489 pm_runtime_disable(&pdev->dev); 2490 2491 v4l2_async_nf_unregister(&vpfe->notifier); 2492 v4l2_async_nf_cleanup(&vpfe->notifier); 2493 video_unregister_device(&vpfe->video_dev); 2494 v4l2_device_unregister(&vpfe->v4l2_dev); 2495} 2496 2497#ifdef CONFIG_PM_SLEEP 2498 2499static void vpfe_save_context(struct vpfe_ccdc *ccdc) 2500{ 2501 ccdc->ccdc_ctx[VPFE_PCR >> 2] = vpfe_reg_read(ccdc, VPFE_PCR); 2502 ccdc->ccdc_ctx[VPFE_SYNMODE >> 2] = vpfe_reg_read(ccdc, VPFE_SYNMODE); 2503 ccdc->ccdc_ctx[VPFE_SDOFST >> 2] = vpfe_reg_read(ccdc, VPFE_SDOFST); 2504 ccdc->ccdc_ctx[VPFE_SDR_ADDR >> 2] = vpfe_reg_read(ccdc, VPFE_SDR_ADDR); 2505 ccdc->ccdc_ctx[VPFE_CLAMP >> 2] = vpfe_reg_read(ccdc, VPFE_CLAMP); 2506 ccdc->ccdc_ctx[VPFE_DCSUB >> 2] = vpfe_reg_read(ccdc, VPFE_DCSUB); 2507 ccdc->ccdc_ctx[VPFE_COLPTN >> 2] = vpfe_reg_read(ccdc, VPFE_COLPTN); 2508 ccdc->ccdc_ctx[VPFE_BLKCMP >> 2] = vpfe_reg_read(ccdc, VPFE_BLKCMP); 2509 ccdc->ccdc_ctx[VPFE_VDINT >> 2] = vpfe_reg_read(ccdc, VPFE_VDINT); 2510 ccdc->ccdc_ctx[VPFE_ALAW >> 2] = vpfe_reg_read(ccdc, VPFE_ALAW); 2511 ccdc->ccdc_ctx[VPFE_REC656IF >> 2] = vpfe_reg_read(ccdc, VPFE_REC656IF); 2512 ccdc->ccdc_ctx[VPFE_CCDCFG >> 2] = vpfe_reg_read(ccdc, VPFE_CCDCFG); 2513 ccdc->ccdc_ctx[VPFE_CULLING >> 2] = vpfe_reg_read(ccdc, VPFE_CULLING); 2514 ccdc->ccdc_ctx[VPFE_HD_VD_WID >> 2] = vpfe_reg_read(ccdc, 2515 VPFE_HD_VD_WID); 2516 ccdc->ccdc_ctx[VPFE_PIX_LINES >> 2] = vpfe_reg_read(ccdc, 2517 VPFE_PIX_LINES); 2518 ccdc->ccdc_ctx[VPFE_HORZ_INFO >> 2] = vpfe_reg_read(ccdc, 2519 VPFE_HORZ_INFO); 2520 ccdc->ccdc_ctx[VPFE_VERT_START >> 2] = vpfe_reg_read(ccdc, 2521 VPFE_VERT_START); 2522 ccdc->ccdc_ctx[VPFE_VERT_LINES >> 2] = vpfe_reg_read(ccdc, 2523 VPFE_VERT_LINES); 2524 ccdc->ccdc_ctx[VPFE_HSIZE_OFF >> 2] = vpfe_reg_read(ccdc, 2525 VPFE_HSIZE_OFF); 2526} 2527 2528static int vpfe_suspend(struct device *dev) 2529{ 2530 struct vpfe_device *vpfe = dev_get_drvdata(dev); 2531 struct vpfe_ccdc *ccdc = &vpfe->ccdc; 2532 2533 /* only do full suspend if streaming has started */ 2534 if (vb2_start_streaming_called(&vpfe->buffer_queue)) { 2535 /* 2536 * ignore RPM resume errors here, as it is already too late. 2537 * A check like that should happen earlier, either at 2538 * open() or just before start streaming. 2539 */ 2540 pm_runtime_get_sync(dev); 2541 vpfe_config_enable(ccdc, 1); 2542 2543 /* Save VPFE context */ 2544 vpfe_save_context(ccdc); 2545 2546 /* Disable CCDC */ 2547 vpfe_pcr_enable(ccdc, 0); 2548 vpfe_config_enable(ccdc, 0); 2549 2550 /* Disable both master and slave clock */ 2551 pm_runtime_put_sync(dev); 2552 } 2553 2554 /* Select sleep pin state */ 2555 pinctrl_pm_select_sleep_state(dev); 2556 2557 return 0; 2558} 2559 2560static void vpfe_restore_context(struct vpfe_ccdc *ccdc) 2561{ 2562 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SYNMODE >> 2], VPFE_SYNMODE); 2563 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CULLING >> 2], VPFE_CULLING); 2564 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SDOFST >> 2], VPFE_SDOFST); 2565 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SDR_ADDR >> 2], VPFE_SDR_ADDR); 2566 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CLAMP >> 2], VPFE_CLAMP); 2567 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_DCSUB >> 2], VPFE_DCSUB); 2568 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_COLPTN >> 2], VPFE_COLPTN); 2569 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_BLKCMP >> 2], VPFE_BLKCMP); 2570 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VDINT >> 2], VPFE_VDINT); 2571 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_ALAW >> 2], VPFE_ALAW); 2572 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_REC656IF >> 2], VPFE_REC656IF); 2573 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CCDCFG >> 2], VPFE_CCDCFG); 2574 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_PCR >> 2], VPFE_PCR); 2575 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HD_VD_WID >> 2], 2576 VPFE_HD_VD_WID); 2577 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_PIX_LINES >> 2], 2578 VPFE_PIX_LINES); 2579 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HORZ_INFO >> 2], 2580 VPFE_HORZ_INFO); 2581 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VERT_START >> 2], 2582 VPFE_VERT_START); 2583 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VERT_LINES >> 2], 2584 VPFE_VERT_LINES); 2585 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HSIZE_OFF >> 2], 2586 VPFE_HSIZE_OFF); 2587} 2588 2589static int vpfe_resume(struct device *dev) 2590{ 2591 struct vpfe_device *vpfe = dev_get_drvdata(dev); 2592 struct vpfe_ccdc *ccdc = &vpfe->ccdc; 2593 2594 /* only do full resume if streaming has started */ 2595 if (vb2_start_streaming_called(&vpfe->buffer_queue)) { 2596 /* Enable both master and slave clock */ 2597 pm_runtime_get_sync(dev); 2598 vpfe_config_enable(ccdc, 1); 2599 2600 /* Restore VPFE context */ 2601 vpfe_restore_context(ccdc); 2602 2603 vpfe_config_enable(ccdc, 0); 2604 pm_runtime_put_sync(dev); 2605 } 2606 2607 /* Select default pin state */ 2608 pinctrl_pm_select_default_state(dev); 2609 2610 return 0; 2611} 2612 2613#endif 2614 2615static SIMPLE_DEV_PM_OPS(vpfe_pm_ops, vpfe_suspend, vpfe_resume); 2616 2617static const struct of_device_id vpfe_of_match[] = { 2618 { .compatible = "ti,am437x-vpfe", }, 2619 { /* sentinel */ }, 2620}; 2621MODULE_DEVICE_TABLE(of, vpfe_of_match); 2622 2623static struct platform_driver vpfe_driver = { 2624 .probe = vpfe_probe, 2625 .remove_new = vpfe_remove, 2626 .driver = { 2627 .name = VPFE_MODULE_NAME, 2628 .pm = &vpfe_pm_ops, 2629 .of_match_table = vpfe_of_match, 2630 }, 2631}; 2632 2633module_platform_driver(vpfe_driver); 2634 2635MODULE_AUTHOR("Texas Instruments"); 2636MODULE_DESCRIPTION("TI AM437x VPFE driver"); 2637MODULE_LICENSE("GPL"); 2638MODULE_VERSION(VPFE_VERSION); 2639