162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* DMA controller registers */ 362306a36Sopenharmony_ci#define REG8_1(a0) ((const u16[8]) { a0, a0 + 1, a0 + 2, a0 + 3, \ 462306a36Sopenharmony_ci a0 + 4, a0 + 5, a0 + 6, a0 + 7}) 562306a36Sopenharmony_ci#define REG8_2(a0) ((const u16[8]) { a0, a0 + 2, a0 + 4, a0 + 6, \ 662306a36Sopenharmony_ci a0 + 8, a0 + 0xa, a0 + 0xc, a0 + 0xe}) 762306a36Sopenharmony_ci#define REG8_8(a0) ((const u16[8]) { a0, a0 + 8, a0 + 0x10, a0 + 0x18, \ 862306a36Sopenharmony_ci a0 + 0x20, a0 + 0x28, a0 + 0x30, \ 962306a36Sopenharmony_ci a0 + 0x38}) 1062306a36Sopenharmony_ci#define INT_STATUS 0x00 1162306a36Sopenharmony_ci#define PB_STATUS 0x01 1262306a36Sopenharmony_ci#define DMA_CMD 0x02 1362306a36Sopenharmony_ci#define VIDEO_FIFO_STATUS 0x03 1462306a36Sopenharmony_ci#define VIDEO_CHANNEL_ID 0x04 1562306a36Sopenharmony_ci#define VIDEO_PARSER_STATUS 0x05 1662306a36Sopenharmony_ci#define SYS_SOFT_RST 0x06 1762306a36Sopenharmony_ci#define DMA_PAGE_TABLE0_ADDR ((const u16[8]) { 0x08, 0xd0, 0xd2, 0xd4, \ 1862306a36Sopenharmony_ci 0xd6, 0xd8, 0xda, 0xdc }) 1962306a36Sopenharmony_ci#define DMA_PAGE_TABLE1_ADDR ((const u16[8]) { 0x09, 0xd1, 0xd3, 0xd5, \ 2062306a36Sopenharmony_ci 0xd7, 0xd9, 0xdb, 0xdd }) 2162306a36Sopenharmony_ci#define DMA_CHANNEL_ENABLE 0x0a 2262306a36Sopenharmony_ci#define DMA_CONFIG 0x0b 2362306a36Sopenharmony_ci#define DMA_TIMER_INTERVAL 0x0c 2462306a36Sopenharmony_ci#define DMA_CHANNEL_TIMEOUT 0x0d 2562306a36Sopenharmony_ci#define VDMA_CHANNEL_CONFIG REG8_1(0x10) 2662306a36Sopenharmony_ci#define ADMA_P_ADDR REG8_2(0x18) 2762306a36Sopenharmony_ci#define ADMA_B_ADDR REG8_2(0x19) 2862306a36Sopenharmony_ci#define DMA10_P_ADDR 0x28 2962306a36Sopenharmony_ci#define DMA10_B_ADDR 0x29 3062306a36Sopenharmony_ci#define VIDEO_CONTROL1 0x2a 3162306a36Sopenharmony_ci#define VIDEO_CONTROL2 0x2b 3262306a36Sopenharmony_ci#define AUDIO_CONTROL1 0x2c 3362306a36Sopenharmony_ci#define AUDIO_CONTROL2 0x2d 3462306a36Sopenharmony_ci#define PHASE_REF 0x2e 3562306a36Sopenharmony_ci#define GPIO_REG 0x2f 3662306a36Sopenharmony_ci#define INTL_HBAR_CTRL REG8_1(0x30) 3762306a36Sopenharmony_ci#define AUDIO_CONTROL3 0x38 3862306a36Sopenharmony_ci#define VIDEO_FIELD_CTRL REG8_1(0x39) 3962306a36Sopenharmony_ci#define HSCALER_CTRL REG8_1(0x42) 4062306a36Sopenharmony_ci#define VIDEO_SIZE REG8_1(0x4A) 4162306a36Sopenharmony_ci#define VIDEO_SIZE_F2 REG8_1(0x52) 4262306a36Sopenharmony_ci#define MD_CONF REG8_1(0x60) 4362306a36Sopenharmony_ci#define MD_INIT REG8_1(0x68) 4462306a36Sopenharmony_ci#define MD_MAP0 REG8_1(0x70) 4562306a36Sopenharmony_ci#define VDMA_P_ADDR REG8_8(0x80) /* not used in DMA SG mode */ 4662306a36Sopenharmony_ci#define VDMA_WHP REG8_8(0x81) 4762306a36Sopenharmony_ci#define VDMA_B_ADDR REG8_8(0x82) 4862306a36Sopenharmony_ci#define VDMA_F2_P_ADDR REG8_8(0x84) 4962306a36Sopenharmony_ci#define VDMA_F2_WHP REG8_8(0x85) 5062306a36Sopenharmony_ci#define VDMA_F2_B_ADDR REG8_8(0x86) 5162306a36Sopenharmony_ci#define EP_REG_ADDR 0xfe 5262306a36Sopenharmony_ci#define EP_REG_DATA 0xff 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci/* Video decoder registers */ 5562306a36Sopenharmony_ci#define VDREG8(a0) ((const u16[8]) { \ 5662306a36Sopenharmony_ci a0 + 0x000, a0 + 0x010, a0 + 0x020, a0 + 0x030, \ 5762306a36Sopenharmony_ci a0 + 0x100, a0 + 0x110, a0 + 0x120, a0 + 0x130}) 5862306a36Sopenharmony_ci#define VIDSTAT VDREG8(0x100) 5962306a36Sopenharmony_ci#define BRIGHT VDREG8(0x101) 6062306a36Sopenharmony_ci#define CONTRAST VDREG8(0x102) 6162306a36Sopenharmony_ci#define SHARPNESS VDREG8(0x103) 6262306a36Sopenharmony_ci#define SAT_U VDREG8(0x104) 6362306a36Sopenharmony_ci#define SAT_V VDREG8(0x105) 6462306a36Sopenharmony_ci#define HUE VDREG8(0x106) 6562306a36Sopenharmony_ci#define CROP_HI VDREG8(0x107) 6662306a36Sopenharmony_ci#define VDELAY_LO VDREG8(0x108) 6762306a36Sopenharmony_ci#define VACTIVE_LO VDREG8(0x109) 6862306a36Sopenharmony_ci#define HDELAY_LO VDREG8(0x10a) 6962306a36Sopenharmony_ci#define HACTIVE_LO VDREG8(0x10b) 7062306a36Sopenharmony_ci#define MVSN VDREG8(0x10c) 7162306a36Sopenharmony_ci#define STATUS2 VDREG8(0x10d) 7262306a36Sopenharmony_ci#define SDT VDREG8(0x10e) 7362306a36Sopenharmony_ci#define SDT_EN VDREG8(0x10f) 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ci#define VSCALE_LO VDREG8(0x144) 7662306a36Sopenharmony_ci#define SCALE_HI VDREG8(0x145) 7762306a36Sopenharmony_ci#define HSCALE_LO VDREG8(0x146) 7862306a36Sopenharmony_ci#define F2CROP_HI VDREG8(0x147) 7962306a36Sopenharmony_ci#define F2VDELAY_LO VDREG8(0x148) 8062306a36Sopenharmony_ci#define F2VACTIVE_LO VDREG8(0x149) 8162306a36Sopenharmony_ci#define F2HDELAY_LO VDREG8(0x14a) 8262306a36Sopenharmony_ci#define F2HACTIVE_LO VDREG8(0x14b) 8362306a36Sopenharmony_ci#define F2VSCALE_LO VDREG8(0x14c) 8462306a36Sopenharmony_ci#define F2SCALE_HI VDREG8(0x14d) 8562306a36Sopenharmony_ci#define F2HSCALE_LO VDREG8(0x14e) 8662306a36Sopenharmony_ci#define F2CNT VDREG8(0x14f) 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci#define VDREG2(a0) ((const u16[2]) { a0, a0 + 0x100 }) 8962306a36Sopenharmony_ci#define SRST VDREG2(0x180) 9062306a36Sopenharmony_ci#define ACNTL VDREG2(0x181) 9162306a36Sopenharmony_ci#define ACNTL2 VDREG2(0x182) 9262306a36Sopenharmony_ci#define CNTRL1 VDREG2(0x183) 9362306a36Sopenharmony_ci#define CKHY VDREG2(0x184) 9462306a36Sopenharmony_ci#define SHCOR VDREG2(0x185) 9562306a36Sopenharmony_ci#define CORING VDREG2(0x186) 9662306a36Sopenharmony_ci#define CLMPG VDREG2(0x187) 9762306a36Sopenharmony_ci#define IAGC VDREG2(0x188) 9862306a36Sopenharmony_ci#define VCTRL1 VDREG2(0x18f) 9962306a36Sopenharmony_ci#define MISC1 VDREG2(0x194) 10062306a36Sopenharmony_ci#define LOOP VDREG2(0x195) 10162306a36Sopenharmony_ci#define MISC2 VDREG2(0x196) 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci#define CLMD VDREG2(0x197) 10462306a36Sopenharmony_ci#define ANPWRDOWN VDREG2(0x1ce) 10562306a36Sopenharmony_ci#define AIGAIN ((const u16[8]) { 0x1d0, 0x1d1, 0x1d2, 0x1d3, \ 10662306a36Sopenharmony_ci 0x2d0, 0x2d1, 0x2d2, 0x2d3 }) 10762306a36Sopenharmony_ci 10862306a36Sopenharmony_ci#define SYS_MODE_DMA_SHIFT 13 10962306a36Sopenharmony_ci#define AUDIO_DMA_SIZE_SHIFT 19 11062306a36Sopenharmony_ci#define AUDIO_DMA_SIZE_MIN SZ_512 11162306a36Sopenharmony_ci#define AUDIO_DMA_SIZE_MAX SZ_4K 11262306a36Sopenharmony_ci#define AUDIO_DMA_SIZE_MASK (SZ_8K - 1) 11362306a36Sopenharmony_ci 11462306a36Sopenharmony_ci#define DMA_CMD_ENABLE BIT(31) 11562306a36Sopenharmony_ci#define INT_STATUS_DMA_TOUT BIT(17) 11662306a36Sopenharmony_ci#define TW686X_VIDSTAT_HLOCK BIT(6) 11762306a36Sopenharmony_ci#define TW686X_VIDSTAT_VDLOSS BIT(7) 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_ci#define TW686X_STD_NTSC_M 0 12062306a36Sopenharmony_ci#define TW686X_STD_PAL 1 12162306a36Sopenharmony_ci#define TW686X_STD_SECAM 2 12262306a36Sopenharmony_ci#define TW686X_STD_NTSC_443 3 12362306a36Sopenharmony_ci#define TW686X_STD_PAL_M 4 12462306a36Sopenharmony_ci#define TW686X_STD_PAL_CN 5 12562306a36Sopenharmony_ci#define TW686X_STD_PAL_60 6 12662306a36Sopenharmony_ci 12762306a36Sopenharmony_ci#define TW686X_FIELD_MODE 0x3 12862306a36Sopenharmony_ci#define TW686X_FRAME_MODE 0x2 12962306a36Sopenharmony_ci/* 0x1 is reserved */ 13062306a36Sopenharmony_ci#define TW686X_SG_MODE 0x0 13162306a36Sopenharmony_ci 13262306a36Sopenharmony_ci#define TW686X_FIFO_ERROR(x) (x & ~(0xff)) 133