162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2010-2013 Bluecherry, LLC <https://www.bluecherrydvr.com> 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Original author: 662306a36Sopenharmony_ci * Ben Collins <bcollins@ubuntu.com> 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * Additional work by: 962306a36Sopenharmony_ci * John Brooks <john.brooks@bluecherry.net> 1062306a36Sopenharmony_ci */ 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#include <linux/kernel.h> 1362306a36Sopenharmony_ci#include <linux/fs.h> 1462306a36Sopenharmony_ci#include <linux/delay.h> 1562306a36Sopenharmony_ci#include <linux/uaccess.h> 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci#include "solo6x10.h" 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_cistatic void solo_gpio_mode(struct solo_dev *solo_dev, 2062306a36Sopenharmony_ci unsigned int port_mask, unsigned int mode) 2162306a36Sopenharmony_ci{ 2262306a36Sopenharmony_ci int port; 2362306a36Sopenharmony_ci unsigned int ret; 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci ret = solo_reg_read(solo_dev, SOLO_GPIO_CONFIG_0); 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci /* To set gpio */ 2862306a36Sopenharmony_ci for (port = 0; port < 16; port++) { 2962306a36Sopenharmony_ci if (!((1 << port) & port_mask)) 3062306a36Sopenharmony_ci continue; 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci ret &= (~(3 << (port << 1))); 3362306a36Sopenharmony_ci ret |= ((mode & 3) << (port << 1)); 3462306a36Sopenharmony_ci } 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci solo_reg_write(solo_dev, SOLO_GPIO_CONFIG_0, ret); 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci /* To set extended gpio - sensor */ 3962306a36Sopenharmony_ci ret = solo_reg_read(solo_dev, SOLO_GPIO_CONFIG_1); 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci for (port = 0; port < 16; port++) { 4262306a36Sopenharmony_ci if (!((1UL << (port + 16)) & port_mask)) 4362306a36Sopenharmony_ci continue; 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci if (!mode) 4662306a36Sopenharmony_ci ret &= ~(1UL << port); 4762306a36Sopenharmony_ci else 4862306a36Sopenharmony_ci ret |= 1UL << port; 4962306a36Sopenharmony_ci } 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci /* Enable GPIO[31:16] */ 5262306a36Sopenharmony_ci ret |= 0xffff0000; 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci solo_reg_write(solo_dev, SOLO_GPIO_CONFIG_1, ret); 5562306a36Sopenharmony_ci} 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_cistatic void solo_gpio_set(struct solo_dev *solo_dev, unsigned int value) 5862306a36Sopenharmony_ci{ 5962306a36Sopenharmony_ci solo_reg_write(solo_dev, SOLO_GPIO_DATA_OUT, 6062306a36Sopenharmony_ci solo_reg_read(solo_dev, SOLO_GPIO_DATA_OUT) | value); 6162306a36Sopenharmony_ci} 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_cistatic void solo_gpio_clear(struct solo_dev *solo_dev, unsigned int value) 6462306a36Sopenharmony_ci{ 6562306a36Sopenharmony_ci solo_reg_write(solo_dev, SOLO_GPIO_DATA_OUT, 6662306a36Sopenharmony_ci solo_reg_read(solo_dev, SOLO_GPIO_DATA_OUT) & ~value); 6762306a36Sopenharmony_ci} 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_cistatic void solo_gpio_config(struct solo_dev *solo_dev) 7062306a36Sopenharmony_ci{ 7162306a36Sopenharmony_ci /* Video reset */ 7262306a36Sopenharmony_ci solo_gpio_mode(solo_dev, 0x30, 1); 7362306a36Sopenharmony_ci solo_gpio_clear(solo_dev, 0x30); 7462306a36Sopenharmony_ci udelay(100); 7562306a36Sopenharmony_ci solo_gpio_set(solo_dev, 0x30); 7662306a36Sopenharmony_ci udelay(100); 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ci /* Warning: Don't touch the next line unless you're sure of what 7962306a36Sopenharmony_ci * you're doing: first four gpio [0-3] are used for video. */ 8062306a36Sopenharmony_ci solo_gpio_mode(solo_dev, 0x0f, 2); 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_ci /* We use bit 8-15 of SOLO_GPIO_CONFIG_0 for relay purposes */ 8362306a36Sopenharmony_ci solo_gpio_mode(solo_dev, 0xff00, 1); 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci /* Initially set relay status to 0 */ 8662306a36Sopenharmony_ci solo_gpio_clear(solo_dev, 0xff00); 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci /* Set input pins direction */ 8962306a36Sopenharmony_ci solo_gpio_mode(solo_dev, 0xffff0000, 0); 9062306a36Sopenharmony_ci} 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ci#ifdef CONFIG_GPIOLIB 9362306a36Sopenharmony_ci/* Pins 0-7 are not exported, because it seems from code above they are 9462306a36Sopenharmony_ci * used for internal purposes. So offset 0 corresponds to pin 8, therefore 9562306a36Sopenharmony_ci * offsets 0-7 are relay GPIOs, 8-23 - input GPIOs. 9662306a36Sopenharmony_ci */ 9762306a36Sopenharmony_cistatic int solo_gpiochip_get_direction(struct gpio_chip *chip, 9862306a36Sopenharmony_ci unsigned int offset) 9962306a36Sopenharmony_ci{ 10062306a36Sopenharmony_ci int ret, mode; 10162306a36Sopenharmony_ci struct solo_dev *solo_dev = gpiochip_get_data(chip); 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci if (offset < 8) { 10462306a36Sopenharmony_ci ret = solo_reg_read(solo_dev, SOLO_GPIO_CONFIG_0); 10562306a36Sopenharmony_ci mode = 3 & (ret >> ((offset + 8) * 2)); 10662306a36Sopenharmony_ci } else { 10762306a36Sopenharmony_ci ret = solo_reg_read(solo_dev, SOLO_GPIO_CONFIG_1); 10862306a36Sopenharmony_ci mode = 1 & (ret >> (offset - 8)); 10962306a36Sopenharmony_ci } 11062306a36Sopenharmony_ci 11162306a36Sopenharmony_ci if (!mode) 11262306a36Sopenharmony_ci return 1; 11362306a36Sopenharmony_ci else if (mode == 1) 11462306a36Sopenharmony_ci return 0; 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_ci return -1; 11762306a36Sopenharmony_ci} 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_cistatic int solo_gpiochip_direction_input(struct gpio_chip *chip, 12062306a36Sopenharmony_ci unsigned int offset) 12162306a36Sopenharmony_ci{ 12262306a36Sopenharmony_ci return -1; 12362306a36Sopenharmony_ci} 12462306a36Sopenharmony_ci 12562306a36Sopenharmony_cistatic int solo_gpiochip_direction_output(struct gpio_chip *chip, 12662306a36Sopenharmony_ci unsigned int offset, int value) 12762306a36Sopenharmony_ci{ 12862306a36Sopenharmony_ci return -1; 12962306a36Sopenharmony_ci} 13062306a36Sopenharmony_ci 13162306a36Sopenharmony_cistatic int solo_gpiochip_get(struct gpio_chip *chip, 13262306a36Sopenharmony_ci unsigned int offset) 13362306a36Sopenharmony_ci{ 13462306a36Sopenharmony_ci int ret; 13562306a36Sopenharmony_ci struct solo_dev *solo_dev = gpiochip_get_data(chip); 13662306a36Sopenharmony_ci 13762306a36Sopenharmony_ci ret = solo_reg_read(solo_dev, SOLO_GPIO_DATA_IN); 13862306a36Sopenharmony_ci 13962306a36Sopenharmony_ci return 1 & (ret >> (offset + 8)); 14062306a36Sopenharmony_ci} 14162306a36Sopenharmony_ci 14262306a36Sopenharmony_cistatic void solo_gpiochip_set(struct gpio_chip *chip, 14362306a36Sopenharmony_ci unsigned int offset, int value) 14462306a36Sopenharmony_ci{ 14562306a36Sopenharmony_ci struct solo_dev *solo_dev = gpiochip_get_data(chip); 14662306a36Sopenharmony_ci 14762306a36Sopenharmony_ci if (value) 14862306a36Sopenharmony_ci solo_gpio_set(solo_dev, 1 << (offset + 8)); 14962306a36Sopenharmony_ci else 15062306a36Sopenharmony_ci solo_gpio_clear(solo_dev, 1 << (offset + 8)); 15162306a36Sopenharmony_ci} 15262306a36Sopenharmony_ci#endif 15362306a36Sopenharmony_ci 15462306a36Sopenharmony_ciint solo_gpio_init(struct solo_dev *solo_dev) 15562306a36Sopenharmony_ci{ 15662306a36Sopenharmony_ci#ifdef CONFIG_GPIOLIB 15762306a36Sopenharmony_ci int ret; 15862306a36Sopenharmony_ci#endif 15962306a36Sopenharmony_ci 16062306a36Sopenharmony_ci solo_gpio_config(solo_dev); 16162306a36Sopenharmony_ci#ifdef CONFIG_GPIOLIB 16262306a36Sopenharmony_ci solo_dev->gpio_dev.label = SOLO6X10_NAME"_gpio"; 16362306a36Sopenharmony_ci solo_dev->gpio_dev.parent = &solo_dev->pdev->dev; 16462306a36Sopenharmony_ci solo_dev->gpio_dev.owner = THIS_MODULE; 16562306a36Sopenharmony_ci solo_dev->gpio_dev.base = -1; 16662306a36Sopenharmony_ci solo_dev->gpio_dev.ngpio = 24; 16762306a36Sopenharmony_ci solo_dev->gpio_dev.can_sleep = 0; 16862306a36Sopenharmony_ci 16962306a36Sopenharmony_ci solo_dev->gpio_dev.get_direction = solo_gpiochip_get_direction; 17062306a36Sopenharmony_ci solo_dev->gpio_dev.direction_input = solo_gpiochip_direction_input; 17162306a36Sopenharmony_ci solo_dev->gpio_dev.direction_output = solo_gpiochip_direction_output; 17262306a36Sopenharmony_ci solo_dev->gpio_dev.get = solo_gpiochip_get; 17362306a36Sopenharmony_ci solo_dev->gpio_dev.set = solo_gpiochip_set; 17462306a36Sopenharmony_ci 17562306a36Sopenharmony_ci ret = gpiochip_add_data(&solo_dev->gpio_dev, solo_dev); 17662306a36Sopenharmony_ci 17762306a36Sopenharmony_ci if (ret) { 17862306a36Sopenharmony_ci solo_dev->gpio_dev.label = NULL; 17962306a36Sopenharmony_ci return -1; 18062306a36Sopenharmony_ci } 18162306a36Sopenharmony_ci#endif 18262306a36Sopenharmony_ci return 0; 18362306a36Sopenharmony_ci} 18462306a36Sopenharmony_ci 18562306a36Sopenharmony_civoid solo_gpio_exit(struct solo_dev *solo_dev) 18662306a36Sopenharmony_ci{ 18762306a36Sopenharmony_ci#ifdef CONFIG_GPIOLIB 18862306a36Sopenharmony_ci if (solo_dev->gpio_dev.label) { 18962306a36Sopenharmony_ci gpiochip_remove(&solo_dev->gpio_dev); 19062306a36Sopenharmony_ci solo_dev->gpio_dev.label = NULL; 19162306a36Sopenharmony_ci } 19262306a36Sopenharmony_ci#endif 19362306a36Sopenharmony_ci solo_gpio_clear(solo_dev, 0x30); 19462306a36Sopenharmony_ci solo_gpio_config(solo_dev); 19562306a36Sopenharmony_ci} 196