1// SPDX-License-Identifier: GPL-2.0 2/* 3 * ov4689 driver 4 * 5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd. 6 * Copyright (C) 2022 Mikhail Rudenko 7 */ 8 9#include <linux/clk.h> 10#include <linux/delay.h> 11#include <linux/gpio/consumer.h> 12#include <linux/i2c.h> 13#include <linux/module.h> 14#include <linux/pm_runtime.h> 15#include <linux/regulator/consumer.h> 16#include <media/media-entity.h> 17#include <media/v4l2-async.h> 18#include <media/v4l2-ctrls.h> 19#include <media/v4l2-subdev.h> 20#include <media/v4l2-fwnode.h> 21 22#define CHIP_ID 0x004688 23#define OV4689_REG_CHIP_ID 0x300a 24 25#define OV4689_XVCLK_FREQ 24000000 26 27#define OV4689_REG_CTRL_MODE 0x0100 28#define OV4689_MODE_SW_STANDBY 0x0 29#define OV4689_MODE_STREAMING BIT(0) 30 31#define OV4689_REG_EXPOSURE 0x3500 32#define OV4689_EXPOSURE_MIN 4 33#define OV4689_EXPOSURE_STEP 1 34#define OV4689_VTS_MAX 0x7fff 35 36#define OV4689_REG_GAIN_H 0x3508 37#define OV4689_REG_GAIN_L 0x3509 38#define OV4689_GAIN_H_MASK 0x07 39#define OV4689_GAIN_H_SHIFT 8 40#define OV4689_GAIN_L_MASK 0xff 41#define OV4689_GAIN_STEP 1 42#define OV4689_GAIN_DEFAULT 0x80 43 44#define OV4689_REG_TEST_PATTERN 0x5040 45#define OV4689_TEST_PATTERN_ENABLE 0x80 46#define OV4689_TEST_PATTERN_DISABLE 0x0 47 48#define OV4689_REG_VTS 0x380e 49 50#define REG_NULL 0xFFFF 51 52#define OV4689_REG_VALUE_08BIT 1 53#define OV4689_REG_VALUE_16BIT 2 54#define OV4689_REG_VALUE_24BIT 3 55 56#define OV4689_LANES 4 57 58static const char *const ov4689_supply_names[] = { 59 "avdd", /* Analog power */ 60 "dovdd", /* Digital I/O power */ 61 "dvdd", /* Digital core power */ 62}; 63 64struct regval { 65 u16 addr; 66 u8 val; 67}; 68 69enum ov4689_mode_id { 70 OV4689_MODE_2688_1520 = 0, 71 OV4689_NUM_MODES, 72}; 73 74struct ov4689_mode { 75 enum ov4689_mode_id id; 76 u32 width; 77 u32 height; 78 u32 max_fps; 79 u32 hts_def; 80 u32 vts_def; 81 u32 exp_def; 82 u32 pixel_rate; 83 u32 sensor_width; 84 u32 sensor_height; 85 u32 crop_top; 86 u32 crop_left; 87 const struct regval *reg_list; 88}; 89 90struct ov4689 { 91 struct i2c_client *client; 92 struct clk *xvclk; 93 struct gpio_desc *reset_gpio; 94 struct gpio_desc *pwdn_gpio; 95 struct regulator_bulk_data supplies[ARRAY_SIZE(ov4689_supply_names)]; 96 97 struct v4l2_subdev subdev; 98 struct media_pad pad; 99 100 u32 clock_rate; 101 102 struct mutex mutex; /* lock to protect streaming, ctrls and cur_mode */ 103 bool streaming; 104 struct v4l2_ctrl_handler ctrl_handler; 105 struct v4l2_ctrl *exposure; 106 107 const struct ov4689_mode *cur_mode; 108}; 109 110#define to_ov4689(sd) container_of(sd, struct ov4689, subdev) 111 112struct ov4689_gain_range { 113 u32 logical_min; 114 u32 logical_max; 115 u32 offset; 116 u32 divider; 117 u32 physical_min; 118 u32 physical_max; 119}; 120 121/* 122 * Xclk 24Mhz 123 * max_framerate 30fps 124 * mipi_datarate per lane 1008Mbps 125 */ 126static const struct regval ov4689_2688x1520_regs[] = { 127 {0x0103, 0x01}, {0x3638, 0x00}, {0x0300, 0x00}, 128 {0x0302, 0x2a}, {0x0303, 0x00}, {0x0304, 0x03}, 129 {0x030b, 0x00}, {0x030d, 0x1e}, {0x030e, 0x04}, 130 {0x030f, 0x01}, {0x0312, 0x01}, {0x031e, 0x00}, 131 {0x3000, 0x20}, {0x3002, 0x00}, {0x3018, 0x72}, 132 {0x3020, 0x93}, {0x3021, 0x03}, {0x3022, 0x01}, 133 {0x3031, 0x0a}, {0x303f, 0x0c}, {0x3305, 0xf1}, 134 {0x3307, 0x04}, {0x3309, 0x29}, {0x3500, 0x00}, 135 {0x3501, 0x60}, {0x3502, 0x00}, {0x3503, 0x04}, 136 {0x3504, 0x00}, {0x3505, 0x00}, {0x3506, 0x00}, 137 {0x3507, 0x00}, {0x3508, 0x00}, {0x3509, 0x80}, 138 {0x350a, 0x00}, {0x350b, 0x00}, {0x350c, 0x00}, 139 {0x350d, 0x00}, {0x350e, 0x00}, {0x350f, 0x80}, 140 {0x3510, 0x00}, {0x3511, 0x00}, {0x3512, 0x00}, 141 {0x3513, 0x00}, {0x3514, 0x00}, {0x3515, 0x80}, 142 {0x3516, 0x00}, {0x3517, 0x00}, {0x3518, 0x00}, 143 {0x3519, 0x00}, {0x351a, 0x00}, {0x351b, 0x80}, 144 {0x351c, 0x00}, {0x351d, 0x00}, {0x351e, 0x00}, 145 {0x351f, 0x00}, {0x3520, 0x00}, {0x3521, 0x80}, 146 {0x3522, 0x08}, {0x3524, 0x08}, {0x3526, 0x08}, 147 {0x3528, 0x08}, {0x352a, 0x08}, {0x3602, 0x00}, 148 {0x3603, 0x40}, {0x3604, 0x02}, {0x3605, 0x00}, 149 {0x3606, 0x00}, {0x3607, 0x00}, {0x3609, 0x12}, 150 {0x360a, 0x40}, {0x360c, 0x08}, {0x360f, 0xe5}, 151 {0x3608, 0x8f}, {0x3611, 0x00}, {0x3613, 0xf7}, 152 {0x3616, 0x58}, {0x3619, 0x99}, {0x361b, 0x60}, 153 {0x361c, 0x7a}, {0x361e, 0x79}, {0x361f, 0x02}, 154 {0x3632, 0x00}, {0x3633, 0x10}, {0x3634, 0x10}, 155 {0x3635, 0x10}, {0x3636, 0x15}, {0x3646, 0x86}, 156 {0x364a, 0x0b}, {0x3700, 0x17}, {0x3701, 0x22}, 157 {0x3703, 0x10}, {0x370a, 0x37}, {0x3705, 0x00}, 158 {0x3706, 0x63}, {0x3709, 0x3c}, {0x370b, 0x01}, 159 {0x370c, 0x30}, {0x3710, 0x24}, {0x3711, 0x0c}, 160 {0x3716, 0x00}, {0x3720, 0x28}, {0x3729, 0x7b}, 161 {0x372a, 0x84}, {0x372b, 0xbd}, {0x372c, 0xbc}, 162 {0x372e, 0x52}, {0x373c, 0x0e}, {0x373e, 0x33}, 163 {0x3743, 0x10}, {0x3744, 0x88}, {0x3745, 0xc0}, 164 {0x374a, 0x43}, {0x374c, 0x00}, {0x374e, 0x23}, 165 {0x3751, 0x7b}, {0x3752, 0x84}, {0x3753, 0xbd}, 166 {0x3754, 0xbc}, {0x3756, 0x52}, {0x375c, 0x00}, 167 {0x3760, 0x00}, {0x3761, 0x00}, {0x3762, 0x00}, 168 {0x3763, 0x00}, {0x3764, 0x00}, {0x3767, 0x04}, 169 {0x3768, 0x04}, {0x3769, 0x08}, {0x376a, 0x08}, 170 {0x376b, 0x20}, {0x376c, 0x00}, {0x376d, 0x00}, 171 {0x376e, 0x00}, {0x3773, 0x00}, {0x3774, 0x51}, 172 {0x3776, 0xbd}, {0x3777, 0xbd}, {0x3781, 0x18}, 173 {0x3783, 0x25}, {0x3798, 0x1b}, {0x3800, 0x00}, 174 {0x3801, 0x08}, {0x3802, 0x00}, {0x3803, 0x04}, 175 {0x3804, 0x0a}, {0x3805, 0x97}, {0x3806, 0x05}, 176 {0x3807, 0xfb}, {0x3808, 0x0a}, {0x3809, 0x80}, 177 {0x380a, 0x05}, {0x380b, 0xf0}, {0x380c, 0x0a}, 178 {0x380d, 0x0e}, {0x380e, 0x06}, {0x380f, 0x12}, 179 {0x3810, 0x00}, {0x3811, 0x08}, {0x3812, 0x00}, 180 {0x3813, 0x04}, {0x3814, 0x01}, {0x3815, 0x01}, 181 {0x3819, 0x01}, {0x3820, 0x00}, {0x3821, 0x06}, 182 {0x3829, 0x00}, {0x382a, 0x01}, {0x382b, 0x01}, 183 {0x382d, 0x7f}, {0x3830, 0x04}, {0x3836, 0x01}, 184 {0x3837, 0x00}, {0x3841, 0x02}, {0x3846, 0x08}, 185 {0x3847, 0x07}, {0x3d85, 0x36}, {0x3d8c, 0x71}, 186 {0x3d8d, 0xcb}, {0x3f0a, 0x00}, {0x4000, 0xf1}, 187 {0x4001, 0x40}, {0x4002, 0x04}, {0x4003, 0x14}, 188 {0x400e, 0x00}, {0x4011, 0x00}, {0x401a, 0x00}, 189 {0x401b, 0x00}, {0x401c, 0x00}, {0x401d, 0x00}, 190 {0x401f, 0x00}, {0x4020, 0x00}, {0x4021, 0x10}, 191 {0x4022, 0x07}, {0x4023, 0xcf}, {0x4024, 0x09}, 192 {0x4025, 0x60}, {0x4026, 0x09}, {0x4027, 0x6f}, 193 {0x4028, 0x00}, {0x4029, 0x02}, {0x402a, 0x06}, 194 {0x402b, 0x04}, {0x402c, 0x02}, {0x402d, 0x02}, 195 {0x402e, 0x0e}, {0x402f, 0x04}, {0x4302, 0xff}, 196 {0x4303, 0xff}, {0x4304, 0x00}, {0x4305, 0x00}, 197 {0x4306, 0x00}, {0x4308, 0x02}, {0x4500, 0x6c}, 198 {0x4501, 0xc4}, {0x4502, 0x40}, {0x4503, 0x01}, 199 {0x4601, 0xa7}, {0x4800, 0x04}, {0x4813, 0x08}, 200 {0x481f, 0x40}, {0x4829, 0x78}, {0x4837, 0x10}, 201 {0x4b00, 0x2a}, {0x4b0d, 0x00}, {0x4d00, 0x04}, 202 {0x4d01, 0x42}, {0x4d02, 0xd1}, {0x4d03, 0x93}, 203 {0x4d04, 0xf5}, {0x4d05, 0xc1}, {0x5000, 0xf3}, 204 {0x5001, 0x11}, {0x5004, 0x00}, {0x500a, 0x00}, 205 {0x500b, 0x00}, {0x5032, 0x00}, {0x5040, 0x00}, 206 {0x5050, 0x0c}, {0x5500, 0x00}, {0x5501, 0x10}, 207 {0x5502, 0x01}, {0x5503, 0x0f}, {0x8000, 0x00}, 208 {0x8001, 0x00}, {0x8002, 0x00}, {0x8003, 0x00}, 209 {0x8004, 0x00}, {0x8005, 0x00}, {0x8006, 0x00}, 210 {0x8007, 0x00}, {0x8008, 0x00}, {0x3638, 0x00}, 211 {REG_NULL, 0x00}, 212}; 213 214static const struct ov4689_mode supported_modes[] = { 215 { 216 .id = OV4689_MODE_2688_1520, 217 .width = 2688, 218 .height = 1520, 219 .sensor_width = 2720, 220 .sensor_height = 1536, 221 .crop_top = 8, 222 .crop_left = 16, 223 .max_fps = 30, 224 .exp_def = 1536, 225 .hts_def = 4 * 2574, 226 .vts_def = 1554, 227 .pixel_rate = 480000000, 228 .reg_list = ov4689_2688x1520_regs, 229 }, 230}; 231 232static const u64 link_freq_menu_items[] = { 504000000 }; 233 234static const char *const ov4689_test_pattern_menu[] = { 235 "Disabled", 236 "Vertical Color Bar Type 1", 237 "Vertical Color Bar Type 2", 238 "Vertical Color Bar Type 3", 239 "Vertical Color Bar Type 4" 240}; 241 242/* 243 * These coefficients are based on those used in Rockchip's camera 244 * engine, with minor tweaks for continuity. 245 */ 246static const struct ov4689_gain_range ov4689_gain_ranges[] = { 247 { 248 .logical_min = 0, 249 .logical_max = 255, 250 .offset = 0, 251 .divider = 1, 252 .physical_min = 0, 253 .physical_max = 255, 254 }, 255 { 256 .logical_min = 256, 257 .logical_max = 511, 258 .offset = 252, 259 .divider = 2, 260 .physical_min = 376, 261 .physical_max = 504, 262 }, 263 { 264 .logical_min = 512, 265 .logical_max = 1023, 266 .offset = 758, 267 .divider = 4, 268 .physical_min = 884, 269 .physical_max = 1012, 270 }, 271 { 272 .logical_min = 1024, 273 .logical_max = 2047, 274 .offset = 1788, 275 .divider = 8, 276 .physical_min = 1912, 277 .physical_max = 2047, 278 }, 279}; 280 281/* Write registers up to 4 at a time */ 282static int ov4689_write_reg(struct i2c_client *client, u16 reg, u32 len, 283 u32 val) 284{ 285 u32 buf_i, val_i; 286 __be32 val_be; 287 u8 *val_p; 288 u8 buf[6]; 289 290 if (len > 4) 291 return -EINVAL; 292 293 buf[0] = reg >> 8; 294 buf[1] = reg & 0xff; 295 296 val_be = cpu_to_be32(val); 297 val_p = (u8 *)&val_be; 298 buf_i = 2; 299 val_i = 4 - len; 300 301 while (val_i < 4) 302 buf[buf_i++] = val_p[val_i++]; 303 304 if (i2c_master_send(client, buf, len + 2) != len + 2) 305 return -EIO; 306 307 return 0; 308} 309 310static int ov4689_write_array(struct i2c_client *client, 311 const struct regval *regs) 312{ 313 int ret = 0; 314 u32 i; 315 316 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) 317 ret = ov4689_write_reg(client, regs[i].addr, 318 OV4689_REG_VALUE_08BIT, regs[i].val); 319 320 return ret; 321} 322 323/* Read registers up to 4 at a time */ 324static int ov4689_read_reg(struct i2c_client *client, u16 reg, unsigned int len, 325 u32 *val) 326{ 327 __be16 reg_addr_be = cpu_to_be16(reg); 328 struct i2c_msg msgs[2]; 329 __be32 data_be = 0; 330 u8 *data_be_p; 331 int ret; 332 333 if (len > 4 || !len) 334 return -EINVAL; 335 336 data_be_p = (u8 *)&data_be; 337 /* Write register address */ 338 msgs[0].addr = client->addr; 339 msgs[0].flags = 0; 340 msgs[0].len = 2; 341 msgs[0].buf = (u8 *)®_addr_be; 342 343 /* Read data from register */ 344 msgs[1].addr = client->addr; 345 msgs[1].flags = I2C_M_RD; 346 msgs[1].len = len; 347 msgs[1].buf = &data_be_p[4 - len]; 348 349 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 350 if (ret != ARRAY_SIZE(msgs)) 351 return -EIO; 352 353 *val = be32_to_cpu(data_be); 354 355 return 0; 356} 357 358static void ov4689_fill_fmt(const struct ov4689_mode *mode, 359 struct v4l2_mbus_framefmt *fmt) 360{ 361 fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; 362 fmt->width = mode->width; 363 fmt->height = mode->height; 364 fmt->field = V4L2_FIELD_NONE; 365} 366 367static int ov4689_set_fmt(struct v4l2_subdev *sd, 368 struct v4l2_subdev_state *sd_state, 369 struct v4l2_subdev_format *fmt) 370{ 371 struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format; 372 struct ov4689 *ov4689 = to_ov4689(sd); 373 374 /* only one mode supported for now */ 375 ov4689_fill_fmt(ov4689->cur_mode, mbus_fmt); 376 377 return 0; 378} 379 380static int ov4689_get_fmt(struct v4l2_subdev *sd, 381 struct v4l2_subdev_state *sd_state, 382 struct v4l2_subdev_format *fmt) 383{ 384 struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format; 385 struct ov4689 *ov4689 = to_ov4689(sd); 386 387 /* only one mode supported for now */ 388 ov4689_fill_fmt(ov4689->cur_mode, mbus_fmt); 389 390 return 0; 391} 392 393static int ov4689_enum_mbus_code(struct v4l2_subdev *sd, 394 struct v4l2_subdev_state *sd_state, 395 struct v4l2_subdev_mbus_code_enum *code) 396{ 397 if (code->index != 0) 398 return -EINVAL; 399 code->code = MEDIA_BUS_FMT_SBGGR10_1X10; 400 401 return 0; 402} 403 404static int ov4689_enum_frame_sizes(struct v4l2_subdev *sd, 405 struct v4l2_subdev_state *sd_state, 406 struct v4l2_subdev_frame_size_enum *fse) 407{ 408 if (fse->index >= ARRAY_SIZE(supported_modes)) 409 return -EINVAL; 410 411 if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10) 412 return -EINVAL; 413 414 fse->min_width = supported_modes[fse->index].width; 415 fse->max_width = supported_modes[fse->index].width; 416 fse->max_height = supported_modes[fse->index].height; 417 fse->min_height = supported_modes[fse->index].height; 418 419 return 0; 420} 421 422static int ov4689_enable_test_pattern(struct ov4689 *ov4689, u32 pattern) 423{ 424 u32 val; 425 426 if (pattern) 427 val = (pattern - 1) | OV4689_TEST_PATTERN_ENABLE; 428 else 429 val = OV4689_TEST_PATTERN_DISABLE; 430 431 return ov4689_write_reg(ov4689->client, OV4689_REG_TEST_PATTERN, 432 OV4689_REG_VALUE_08BIT, val); 433} 434 435static int ov4689_get_selection(struct v4l2_subdev *sd, 436 struct v4l2_subdev_state *state, 437 struct v4l2_subdev_selection *sel) 438{ 439 const struct ov4689_mode *mode = to_ov4689(sd)->cur_mode; 440 441 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) 442 return -EINVAL; 443 444 switch (sel->target) { 445 case V4L2_SEL_TGT_CROP_BOUNDS: 446 sel->r.top = 0; 447 sel->r.left = 0; 448 sel->r.width = mode->sensor_width; 449 sel->r.height = mode->sensor_height; 450 return 0; 451 case V4L2_SEL_TGT_CROP: 452 case V4L2_SEL_TGT_CROP_DEFAULT: 453 sel->r.top = mode->crop_top; 454 sel->r.left = mode->crop_left; 455 sel->r.width = mode->width; 456 sel->r.height = mode->height; 457 return 0; 458 } 459 460 return -EINVAL; 461} 462 463static int ov4689_s_stream(struct v4l2_subdev *sd, int on) 464{ 465 struct ov4689 *ov4689 = to_ov4689(sd); 466 struct i2c_client *client = ov4689->client; 467 int ret = 0; 468 469 mutex_lock(&ov4689->mutex); 470 471 on = !!on; 472 if (on == ov4689->streaming) 473 goto unlock_and_return; 474 475 if (on) { 476 ret = pm_runtime_resume_and_get(&client->dev); 477 if (ret < 0) 478 goto unlock_and_return; 479 480 ret = ov4689_write_array(ov4689->client, 481 ov4689->cur_mode->reg_list); 482 if (ret) { 483 pm_runtime_put(&client->dev); 484 goto unlock_and_return; 485 } 486 487 ret = __v4l2_ctrl_handler_setup(&ov4689->ctrl_handler); 488 if (ret) { 489 pm_runtime_put(&client->dev); 490 goto unlock_and_return; 491 } 492 493 ret = ov4689_write_reg(ov4689->client, OV4689_REG_CTRL_MODE, 494 OV4689_REG_VALUE_08BIT, 495 OV4689_MODE_STREAMING); 496 if (ret) { 497 pm_runtime_put(&client->dev); 498 goto unlock_and_return; 499 } 500 } else { 501 ov4689_write_reg(ov4689->client, OV4689_REG_CTRL_MODE, 502 OV4689_REG_VALUE_08BIT, 503 OV4689_MODE_SW_STANDBY); 504 pm_runtime_put(&client->dev); 505 } 506 507 ov4689->streaming = on; 508 509unlock_and_return: 510 mutex_unlock(&ov4689->mutex); 511 512 return ret; 513} 514 515/* Calculate the delay in us by clock rate and clock cycles */ 516static inline u32 ov4689_cal_delay(struct ov4689 *ov4689, u32 cycles) 517{ 518 return DIV_ROUND_UP(cycles * 1000, 519 DIV_ROUND_UP(ov4689->clock_rate, 1000)); 520} 521 522static int __maybe_unused ov4689_power_on(struct device *dev) 523{ 524 struct v4l2_subdev *sd = dev_get_drvdata(dev); 525 struct ov4689 *ov4689 = to_ov4689(sd); 526 u32 delay_us; 527 int ret; 528 529 ret = clk_prepare_enable(ov4689->xvclk); 530 if (ret < 0) { 531 dev_err(dev, "Failed to enable xvclk\n"); 532 return ret; 533 } 534 535 gpiod_set_value_cansleep(ov4689->reset_gpio, 1); 536 537 ret = regulator_bulk_enable(ARRAY_SIZE(ov4689_supply_names), 538 ov4689->supplies); 539 if (ret < 0) { 540 dev_err(dev, "Failed to enable regulators\n"); 541 goto disable_clk; 542 } 543 544 gpiod_set_value_cansleep(ov4689->reset_gpio, 0); 545 usleep_range(500, 1000); 546 gpiod_set_value_cansleep(ov4689->pwdn_gpio, 0); 547 548 /* 8192 cycles prior to first SCCB transaction */ 549 delay_us = ov4689_cal_delay(ov4689, 8192); 550 usleep_range(delay_us, delay_us * 2); 551 552 return 0; 553 554disable_clk: 555 clk_disable_unprepare(ov4689->xvclk); 556 557 return ret; 558} 559 560static int __maybe_unused ov4689_power_off(struct device *dev) 561{ 562 struct v4l2_subdev *sd = dev_get_drvdata(dev); 563 struct ov4689 *ov4689 = to_ov4689(sd); 564 565 gpiod_set_value_cansleep(ov4689->pwdn_gpio, 1); 566 clk_disable_unprepare(ov4689->xvclk); 567 gpiod_set_value_cansleep(ov4689->reset_gpio, 1); 568 regulator_bulk_disable(ARRAY_SIZE(ov4689_supply_names), 569 ov4689->supplies); 570 return 0; 571} 572 573static int ov4689_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) 574{ 575 struct ov4689 *ov4689 = to_ov4689(sd); 576 struct v4l2_mbus_framefmt *try_fmt; 577 578 mutex_lock(&ov4689->mutex); 579 580 try_fmt = v4l2_subdev_get_try_format(sd, fh->state, 0); 581 /* Initialize try_fmt */ 582 ov4689_fill_fmt(&supported_modes[OV4689_MODE_2688_1520], try_fmt); 583 584 mutex_unlock(&ov4689->mutex); 585 586 return 0; 587} 588 589static const struct dev_pm_ops ov4689_pm_ops = { 590 SET_RUNTIME_PM_OPS(ov4689_power_off, ov4689_power_on, NULL) 591}; 592 593static const struct v4l2_subdev_internal_ops ov4689_internal_ops = { 594 .open = ov4689_open, 595}; 596 597static const struct v4l2_subdev_video_ops ov4689_video_ops = { 598 .s_stream = ov4689_s_stream, 599}; 600 601static const struct v4l2_subdev_pad_ops ov4689_pad_ops = { 602 .enum_mbus_code = ov4689_enum_mbus_code, 603 .enum_frame_size = ov4689_enum_frame_sizes, 604 .get_fmt = ov4689_get_fmt, 605 .set_fmt = ov4689_set_fmt, 606 .get_selection = ov4689_get_selection, 607}; 608 609static const struct v4l2_subdev_ops ov4689_subdev_ops = { 610 .video = &ov4689_video_ops, 611 .pad = &ov4689_pad_ops, 612}; 613 614/* 615 * Map userspace (logical) gain to sensor (physical) gain using 616 * ov4689_gain_ranges table. 617 */ 618static int ov4689_map_gain(struct ov4689 *ov4689, int logical_gain, int *result) 619{ 620 const struct device *dev = &ov4689->client->dev; 621 const struct ov4689_gain_range *range; 622 unsigned int n; 623 624 for (n = 0; n < ARRAY_SIZE(ov4689_gain_ranges); n++) { 625 if (logical_gain >= ov4689_gain_ranges[n].logical_min && 626 logical_gain <= ov4689_gain_ranges[n].logical_max) 627 break; 628 } 629 630 if (n == ARRAY_SIZE(ov4689_gain_ranges)) { 631 dev_warn_ratelimited(dev, "no mapping found for gain %d\n", 632 logical_gain); 633 return -EINVAL; 634 } 635 636 range = &ov4689_gain_ranges[n]; 637 638 *result = clamp(range->offset + (logical_gain) / range->divider, 639 range->physical_min, range->physical_max); 640 return 0; 641} 642 643static int ov4689_set_ctrl(struct v4l2_ctrl *ctrl) 644{ 645 struct ov4689 *ov4689 = 646 container_of(ctrl->handler, struct ov4689, ctrl_handler); 647 struct i2c_client *client = ov4689->client; 648 int sensor_gain; 649 s64 max_expo; 650 int ret; 651 652 /* Propagate change of current control to all related controls */ 653 switch (ctrl->id) { 654 case V4L2_CID_VBLANK: 655 /* Update max exposure while meeting expected vblanking */ 656 max_expo = ov4689->cur_mode->height + ctrl->val - 4; 657 __v4l2_ctrl_modify_range(ov4689->exposure, 658 ov4689->exposure->minimum, max_expo, 659 ov4689->exposure->step, 660 ov4689->exposure->default_value); 661 break; 662 } 663 664 if (!pm_runtime_get_if_in_use(&client->dev)) 665 return 0; 666 667 switch (ctrl->id) { 668 case V4L2_CID_EXPOSURE: 669 /* 4 least significant bits of expsoure are fractional part */ 670 ret = ov4689_write_reg(ov4689->client, OV4689_REG_EXPOSURE, 671 OV4689_REG_VALUE_24BIT, ctrl->val << 4); 672 break; 673 case V4L2_CID_ANALOGUE_GAIN: 674 ret = ov4689_map_gain(ov4689, ctrl->val, &sensor_gain); 675 676 ret = ret ?: 677 ov4689_write_reg(ov4689->client, OV4689_REG_GAIN_H, 678 OV4689_REG_VALUE_08BIT, 679 (sensor_gain >> OV4689_GAIN_H_SHIFT) & 680 OV4689_GAIN_H_MASK); 681 ret = ret ?: 682 ov4689_write_reg(ov4689->client, OV4689_REG_GAIN_L, 683 OV4689_REG_VALUE_08BIT, 684 sensor_gain & OV4689_GAIN_L_MASK); 685 break; 686 case V4L2_CID_VBLANK: 687 ret = ov4689_write_reg(ov4689->client, OV4689_REG_VTS, 688 OV4689_REG_VALUE_16BIT, 689 ctrl->val + ov4689->cur_mode->height); 690 break; 691 case V4L2_CID_TEST_PATTERN: 692 ret = ov4689_enable_test_pattern(ov4689, ctrl->val); 693 break; 694 default: 695 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n", 696 __func__, ctrl->id, ctrl->val); 697 ret = -EINVAL; 698 break; 699 } 700 701 pm_runtime_put(&client->dev); 702 703 return ret; 704} 705 706static const struct v4l2_ctrl_ops ov4689_ctrl_ops = { 707 .s_ctrl = ov4689_set_ctrl, 708}; 709 710static int ov4689_initialize_controls(struct ov4689 *ov4689) 711{ 712 struct i2c_client *client = v4l2_get_subdevdata(&ov4689->subdev); 713 struct v4l2_fwnode_device_properties props; 714 struct v4l2_ctrl_handler *handler; 715 const struct ov4689_mode *mode; 716 s64 exposure_max, vblank_def; 717 struct v4l2_ctrl *ctrl; 718 s64 h_blank_def; 719 int ret; 720 721 handler = &ov4689->ctrl_handler; 722 mode = ov4689->cur_mode; 723 ret = v4l2_ctrl_handler_init(handler, 10); 724 if (ret) 725 return ret; 726 handler->lock = &ov4689->mutex; 727 728 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ, 0, 0, 729 link_freq_menu_items); 730 if (ctrl) 731 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; 732 733 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, 0, 734 mode->pixel_rate, 1, mode->pixel_rate); 735 736 h_blank_def = mode->hts_def - mode->width; 737 ctrl = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK, h_blank_def, 738 h_blank_def, 1, h_blank_def); 739 if (ctrl) 740 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; 741 742 vblank_def = mode->vts_def - mode->height; 743 v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_VBLANK, 744 vblank_def, OV4689_VTS_MAX - mode->height, 1, 745 vblank_def); 746 747 exposure_max = mode->vts_def - 4; 748 ov4689->exposure = 749 v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_EXPOSURE, 750 OV4689_EXPOSURE_MIN, exposure_max, 751 OV4689_EXPOSURE_STEP, mode->exp_def); 752 753 v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, 754 ov4689_gain_ranges[0].logical_min, 755 ov4689_gain_ranges[ARRAY_SIZE(ov4689_gain_ranges) - 1] 756 .logical_max, 757 OV4689_GAIN_STEP, OV4689_GAIN_DEFAULT); 758 759 v4l2_ctrl_new_std_menu_items(handler, &ov4689_ctrl_ops, 760 V4L2_CID_TEST_PATTERN, 761 ARRAY_SIZE(ov4689_test_pattern_menu) - 1, 762 0, 0, ov4689_test_pattern_menu); 763 764 if (handler->error) { 765 ret = handler->error; 766 dev_err(&ov4689->client->dev, "Failed to init controls(%d)\n", 767 ret); 768 goto err_free_handler; 769 } 770 771 ret = v4l2_fwnode_device_parse(&client->dev, &props); 772 if (ret) 773 goto err_free_handler; 774 775 ret = v4l2_ctrl_new_fwnode_properties(handler, &ov4689_ctrl_ops, 776 &props); 777 if (ret) 778 goto err_free_handler; 779 780 ov4689->subdev.ctrl_handler = handler; 781 782 return 0; 783 784err_free_handler: 785 v4l2_ctrl_handler_free(handler); 786 787 return ret; 788} 789 790static int ov4689_check_sensor_id(struct ov4689 *ov4689, 791 struct i2c_client *client) 792{ 793 struct device *dev = &ov4689->client->dev; 794 u32 id = 0; 795 int ret; 796 797 ret = ov4689_read_reg(client, OV4689_REG_CHIP_ID, 798 OV4689_REG_VALUE_16BIT, &id); 799 if (ret) { 800 dev_err(dev, "Cannot read sensor ID\n"); 801 return ret; 802 } 803 804 if (id != CHIP_ID) { 805 dev_err(dev, "Unexpected sensor ID %06x, expected %06x\n", 806 id, CHIP_ID); 807 return -ENODEV; 808 } 809 810 dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID); 811 812 return 0; 813} 814 815static int ov4689_configure_regulators(struct ov4689 *ov4689) 816{ 817 unsigned int i; 818 819 for (i = 0; i < ARRAY_SIZE(ov4689_supply_names); i++) 820 ov4689->supplies[i].supply = ov4689_supply_names[i]; 821 822 return devm_regulator_bulk_get(&ov4689->client->dev, 823 ARRAY_SIZE(ov4689_supply_names), 824 ov4689->supplies); 825} 826 827static u64 ov4689_check_link_frequency(struct v4l2_fwnode_endpoint *ep) 828{ 829 const u64 *freqs = link_freq_menu_items; 830 unsigned int i, j; 831 832 for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) { 833 for (j = 0; j < ep->nr_of_link_frequencies; j++) 834 if (freqs[i] == ep->link_frequencies[j]) 835 return freqs[i]; 836 } 837 838 return 0; 839} 840 841static int ov4689_check_hwcfg(struct device *dev) 842{ 843 struct fwnode_handle *fwnode = dev_fwnode(dev); 844 struct v4l2_fwnode_endpoint bus_cfg = { 845 .bus_type = V4L2_MBUS_CSI2_DPHY, 846 }; 847 struct fwnode_handle *endpoint; 848 int ret; 849 850 endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL); 851 if (!endpoint) 852 return -EINVAL; 853 854 ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg); 855 fwnode_handle_put(endpoint); 856 if (ret) 857 return ret; 858 859 if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV4689_LANES) { 860 dev_err(dev, "Only a 4-lane CSI2 config is supported"); 861 ret = -EINVAL; 862 goto out_free_bus_cfg; 863 } 864 865 if (!ov4689_check_link_frequency(&bus_cfg)) { 866 dev_err(dev, "No supported link frequency found\n"); 867 ret = -EINVAL; 868 } 869 870out_free_bus_cfg: 871 v4l2_fwnode_endpoint_free(&bus_cfg); 872 873 return ret; 874} 875 876static int ov4689_probe(struct i2c_client *client) 877{ 878 struct device *dev = &client->dev; 879 struct v4l2_subdev *sd; 880 struct ov4689 *ov4689; 881 int ret; 882 883 ret = ov4689_check_hwcfg(dev); 884 if (ret) 885 return ret; 886 887 ov4689 = devm_kzalloc(dev, sizeof(*ov4689), GFP_KERNEL); 888 if (!ov4689) 889 return -ENOMEM; 890 891 ov4689->client = client; 892 ov4689->cur_mode = &supported_modes[OV4689_MODE_2688_1520]; 893 894 ov4689->xvclk = devm_clk_get_optional(dev, NULL); 895 if (IS_ERR(ov4689->xvclk)) 896 return dev_err_probe(dev, PTR_ERR(ov4689->xvclk), 897 "Failed to get external clock\n"); 898 899 if (!ov4689->xvclk) { 900 dev_dbg(dev, 901 "No clock provided, using clock-frequency property\n"); 902 device_property_read_u32(dev, "clock-frequency", 903 &ov4689->clock_rate); 904 } else { 905 ov4689->clock_rate = clk_get_rate(ov4689->xvclk); 906 } 907 908 if (ov4689->clock_rate != OV4689_XVCLK_FREQ) { 909 dev_err(dev, 910 "External clock rate mismatch: got %d Hz, expected %d Hz\n", 911 ov4689->clock_rate, OV4689_XVCLK_FREQ); 912 return -EINVAL; 913 } 914 915 ov4689->reset_gpio = devm_gpiod_get_optional(dev, "reset", 916 GPIOD_OUT_LOW); 917 if (IS_ERR(ov4689->reset_gpio)) { 918 dev_err(dev, "Failed to get reset-gpios\n"); 919 return PTR_ERR(ov4689->reset_gpio); 920 } 921 922 ov4689->pwdn_gpio = devm_gpiod_get_optional(dev, "pwdn", GPIOD_OUT_LOW); 923 if (IS_ERR(ov4689->pwdn_gpio)) { 924 dev_err(dev, "Failed to get pwdn-gpios\n"); 925 return PTR_ERR(ov4689->pwdn_gpio); 926 } 927 928 ret = ov4689_configure_regulators(ov4689); 929 if (ret) 930 return dev_err_probe(dev, ret, 931 "Failed to get power regulators\n"); 932 933 mutex_init(&ov4689->mutex); 934 935 sd = &ov4689->subdev; 936 v4l2_i2c_subdev_init(sd, client, &ov4689_subdev_ops); 937 ret = ov4689_initialize_controls(ov4689); 938 if (ret) 939 goto err_destroy_mutex; 940 941 ret = ov4689_power_on(dev); 942 if (ret) 943 goto err_free_handler; 944 945 ret = ov4689_check_sensor_id(ov4689, client); 946 if (ret) 947 goto err_power_off; 948 949 sd->internal_ops = &ov4689_internal_ops; 950 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 951 952 ov4689->pad.flags = MEDIA_PAD_FL_SOURCE; 953 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR; 954 ret = media_entity_pads_init(&sd->entity, 1, &ov4689->pad); 955 if (ret < 0) 956 goto err_power_off; 957 958 ret = v4l2_async_register_subdev_sensor(sd); 959 if (ret) { 960 dev_err(dev, "v4l2 async register subdev failed\n"); 961 goto err_clean_entity; 962 } 963 964 pm_runtime_set_active(dev); 965 pm_runtime_enable(dev); 966 pm_runtime_idle(dev); 967 968 return 0; 969 970err_clean_entity: 971 media_entity_cleanup(&sd->entity); 972err_power_off: 973 ov4689_power_off(dev); 974err_free_handler: 975 v4l2_ctrl_handler_free(&ov4689->ctrl_handler); 976err_destroy_mutex: 977 mutex_destroy(&ov4689->mutex); 978 979 return ret; 980} 981 982static void ov4689_remove(struct i2c_client *client) 983{ 984 struct v4l2_subdev *sd = i2c_get_clientdata(client); 985 struct ov4689 *ov4689 = to_ov4689(sd); 986 987 v4l2_async_unregister_subdev(sd); 988 media_entity_cleanup(&sd->entity); 989 990 v4l2_ctrl_handler_free(&ov4689->ctrl_handler); 991 mutex_destroy(&ov4689->mutex); 992 993 pm_runtime_disable(&client->dev); 994 if (!pm_runtime_status_suspended(&client->dev)) 995 ov4689_power_off(&client->dev); 996 pm_runtime_set_suspended(&client->dev); 997} 998 999static const struct of_device_id ov4689_of_match[] = { 1000 { .compatible = "ovti,ov4689" }, 1001 {}, 1002}; 1003MODULE_DEVICE_TABLE(of, ov4689_of_match); 1004 1005static struct i2c_driver ov4689_i2c_driver = { 1006 .driver = { 1007 .name = "ov4689", 1008 .pm = &ov4689_pm_ops, 1009 .of_match_table = ov4689_of_match, 1010 }, 1011 .probe = ov4689_probe, 1012 .remove = ov4689_remove, 1013}; 1014 1015module_i2c_driver(ov4689_i2c_driver); 1016 1017MODULE_DESCRIPTION("OmniVision ov4689 sensor driver"); 1018MODULE_LICENSE("GPL"); 1019