1// SPDX-License-Identifier: GPL-2.0
2/*
3 * ov2685 driver
4 *
5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
6 */
7
8#include <linux/clk.h>
9#include <linux/device.h>
10#include <linux/delay.h>
11#include <linux/gpio/consumer.h>
12#include <linux/i2c.h>
13#include <linux/module.h>
14#include <linux/pm_runtime.h>
15#include <linux/regulator/consumer.h>
16#include <linux/sysfs.h>
17#include <media/media-entity.h>
18#include <media/v4l2-async.h>
19#include <media/v4l2-ctrls.h>
20#include <media/v4l2-fwnode.h>
21#include <media/v4l2-subdev.h>
22
23#define CHIP_ID				0x2685
24#define OV2685_REG_CHIP_ID		0x300a
25
26#define OV2685_XVCLK_FREQ		24000000
27
28#define REG_SC_CTRL_MODE		0x0100
29#define     SC_CTRL_MODE_STANDBY	0x0
30#define     SC_CTRL_MODE_STREAMING	BIT(0)
31
32#define OV2685_REG_EXPOSURE		0x3500
33#define	OV2685_EXPOSURE_MIN		4
34#define	OV2685_EXPOSURE_STEP		1
35
36#define OV2685_REG_VTS			0x380e
37#define OV2685_VTS_MAX			0x7fff
38
39#define OV2685_REG_GAIN			0x350a
40#define OV2685_GAIN_MIN			0
41#define OV2685_GAIN_MAX			0x07ff
42#define OV2685_GAIN_STEP		0x1
43#define OV2685_GAIN_DEFAULT		0x0036
44
45#define OV2685_REG_TEST_PATTERN		0x5080
46#define OV2685_TEST_PATTERN_DISABLED		0x00
47#define OV2685_TEST_PATTERN_COLOR_BAR		0x80
48#define OV2685_TEST_PATTERN_RANDOM		0x81
49#define OV2685_TEST_PATTERN_COLOR_BAR_FADE	0x88
50#define OV2685_TEST_PATTERN_BW_SQUARE		0x92
51#define OV2685_TEST_PATTERN_COLOR_SQUARE	0x82
52
53#define REG_NULL			0xFFFF
54
55#define OV2685_REG_VALUE_08BIT		1
56#define OV2685_REG_VALUE_16BIT		2
57#define OV2685_REG_VALUE_24BIT		3
58
59#define OV2685_NATIVE_WIDTH		1616
60#define OV2685_NATIVE_HEIGHT		1216
61
62#define OV2685_LANES			1
63#define OV2685_BITS_PER_SAMPLE		10
64
65static const char * const ov2685_supply_names[] = {
66	"avdd",		/* Analog power */
67	"dovdd",	/* Digital I/O power */
68	"dvdd",		/* Digital core power */
69};
70
71#define OV2685_NUM_SUPPLIES ARRAY_SIZE(ov2685_supply_names)
72
73struct regval {
74	u16 addr;
75	u8 val;
76};
77
78struct ov2685_mode {
79	u32 width;
80	u32 height;
81	u32 exp_def;
82	u32 hts_def;
83	u32 vts_def;
84	const struct v4l2_rect *analog_crop;
85	const struct regval *reg_list;
86};
87
88struct ov2685 {
89	struct i2c_client	*client;
90	struct clk		*xvclk;
91	struct gpio_desc	*reset_gpio;
92	struct regulator_bulk_data supplies[OV2685_NUM_SUPPLIES];
93
94	bool			streaming;
95	struct mutex		mutex;
96	struct v4l2_subdev	subdev;
97	struct media_pad	pad;
98	struct v4l2_ctrl	*anal_gain;
99	struct v4l2_ctrl	*exposure;
100	struct v4l2_ctrl	*hblank;
101	struct v4l2_ctrl	*vblank;
102	struct v4l2_ctrl	*test_pattern;
103	struct v4l2_ctrl_handler ctrl_handler;
104
105	const struct ov2685_mode *cur_mode;
106};
107
108#define to_ov2685(sd) container_of(sd, struct ov2685, subdev)
109
110/* PLL settings bases on 24M xvclk */
111static struct regval ov2685_1600x1200_regs[] = {
112	{0x0103, 0x01},
113	{0x0100, 0x00},
114	{0x3002, 0x00},
115	{0x3016, 0x1c},
116	{0x3018, 0x44},
117	{0x301d, 0xf0},
118	{0x3020, 0x00},
119	{0x3082, 0x37},
120	{0x3083, 0x03},
121	{0x3084, 0x09},
122	{0x3085, 0x04},
123	{0x3086, 0x00},
124	{0x3087, 0x00},
125	{0x3501, 0x4e},
126	{0x3502, 0xe0},
127	{0x3503, 0x27},
128	{0x350b, 0x36},
129	{0x3600, 0xb4},
130	{0x3603, 0x35},
131	{0x3604, 0x24},
132	{0x3605, 0x00},
133	{0x3620, 0x24},
134	{0x3621, 0x34},
135	{0x3622, 0x03},
136	{0x3628, 0x10},
137	{0x3705, 0x3c},
138	{0x370a, 0x21},
139	{0x370c, 0x50},
140	{0x370d, 0xc0},
141	{0x3717, 0x58},
142	{0x3718, 0x80},
143	{0x3720, 0x00},
144	{0x3721, 0x09},
145	{0x3722, 0x06},
146	{0x3723, 0x59},
147	{0x3738, 0x99},
148	{0x3781, 0x80},
149	{0x3784, 0x0c},
150	{0x3789, 0x60},
151	{0x3800, 0x00},
152	{0x3801, 0x00},
153	{0x3802, 0x00},
154	{0x3803, 0x00},
155	{0x3804, 0x06},
156	{0x3805, 0x4f},
157	{0x3806, 0x04},
158	{0x3807, 0xbf},
159	{0x3808, 0x06},
160	{0x3809, 0x40},
161	{0x380a, 0x04},
162	{0x380b, 0xb0},
163	{0x380c, 0x06},
164	{0x380d, 0xa4},
165	{0x380e, 0x05},
166	{0x380f, 0x0e},
167	{0x3810, 0x00},
168	{0x3811, 0x08},
169	{0x3812, 0x00},
170	{0x3813, 0x08},
171	{0x3814, 0x11},
172	{0x3815, 0x11},
173	{0x3819, 0x04},
174	{0x3820, 0xc0},
175	{0x3821, 0x00},
176	{0x3a06, 0x01},
177	{0x3a07, 0x84},
178	{0x3a08, 0x01},
179	{0x3a09, 0x43},
180	{0x3a0a, 0x24},
181	{0x3a0b, 0x60},
182	{0x3a0c, 0x28},
183	{0x3a0d, 0x60},
184	{0x3a0e, 0x04},
185	{0x3a0f, 0x8c},
186	{0x3a10, 0x05},
187	{0x3a11, 0x0c},
188	{0x4000, 0x81},
189	{0x4001, 0x40},
190	{0x4008, 0x02},
191	{0x4009, 0x09},
192	{0x4300, 0x00},
193	{0x430e, 0x00},
194	{0x4602, 0x02},
195	{0x481b, 0x40},
196	{0x481f, 0x40},
197	{0x4837, 0x18},
198	{0x5000, 0x1f},
199	{0x5001, 0x05},
200	{0x5002, 0x30},
201	{0x5003, 0x04},
202	{0x5004, 0x00},
203	{0x5005, 0x0c},
204	{0x5280, 0x15},
205	{0x5281, 0x06},
206	{0x5282, 0x06},
207	{0x5283, 0x08},
208	{0x5284, 0x1c},
209	{0x5285, 0x1c},
210	{0x5286, 0x20},
211	{0x5287, 0x10},
212	{REG_NULL, 0x00}
213};
214
215#define OV2685_LINK_FREQ_330MHZ		330000000
216static const s64 link_freq_menu_items[] = {
217	OV2685_LINK_FREQ_330MHZ
218};
219
220static const char * const ov2685_test_pattern_menu[] = {
221	"Disabled",
222	"Color Bar",
223	"Color Bar FADE",
224	"Random Data",
225	"Black White Square",
226	"Color Square"
227};
228
229static const int ov2685_test_pattern_val[] = {
230	OV2685_TEST_PATTERN_DISABLED,
231	OV2685_TEST_PATTERN_COLOR_BAR,
232	OV2685_TEST_PATTERN_COLOR_BAR_FADE,
233	OV2685_TEST_PATTERN_RANDOM,
234	OV2685_TEST_PATTERN_BW_SQUARE,
235	OV2685_TEST_PATTERN_COLOR_SQUARE,
236};
237
238static const struct v4l2_rect ov2685_analog_crop = {
239	.left	= 8,
240	.top	= 8,
241	.width	= 1600,
242	.height	= 1200,
243};
244
245static const struct ov2685_mode supported_modes[] = {
246	{
247		.width = 1600,
248		.height = 1200,
249		.exp_def = 0x04ee,
250		.hts_def = 0x06a4,
251		.vts_def = 0x050e,
252		.analog_crop = &ov2685_analog_crop,
253		.reg_list = ov2685_1600x1200_regs,
254	},
255};
256
257/* Write registers up to 4 at a time */
258static int ov2685_write_reg(struct i2c_client *client, u16 reg,
259			    u32 len, u32 val)
260{
261	u32 val_i, buf_i;
262	u8 buf[6];
263	u8 *val_p;
264	__be32 val_be;
265
266	if (len > 4)
267		return -EINVAL;
268
269	buf[0] = reg >> 8;
270	buf[1] = reg & 0xff;
271
272	val_be = cpu_to_be32(val);
273	val_p = (u8 *)&val_be;
274	buf_i = 2;
275	val_i = 4 - len;
276
277	while (val_i < 4)
278		buf[buf_i++] = val_p[val_i++];
279
280	if (i2c_master_send(client, buf, len + 2) != len + 2)
281		return -EIO;
282
283	return 0;
284}
285
286static int ov2685_write_array(struct i2c_client *client,
287			      const struct regval *regs)
288{
289	int ret = 0;
290	u32 i;
291
292	for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
293		ret = ov2685_write_reg(client, regs[i].addr,
294				       OV2685_REG_VALUE_08BIT, regs[i].val);
295
296	return ret;
297}
298
299/* Read registers up to 4 at a time */
300static int ov2685_read_reg(struct i2c_client *client, u16 reg,
301			   u32 len, u32 *val)
302{
303	struct i2c_msg msgs[2];
304	u8 *data_be_p;
305	__be32 data_be = 0;
306	__be16 reg_addr_be = cpu_to_be16(reg);
307	int ret;
308
309	if (len > 4)
310		return -EINVAL;
311
312	data_be_p = (u8 *)&data_be;
313	/* Write register address */
314	msgs[0].addr = client->addr;
315	msgs[0].flags = 0;
316	msgs[0].len = 2;
317	msgs[0].buf = (u8 *)&reg_addr_be;
318
319	/* Read data from register */
320	msgs[1].addr = client->addr;
321	msgs[1].flags = I2C_M_RD;
322	msgs[1].len = len;
323	msgs[1].buf = &data_be_p[4 - len];
324
325	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
326	if (ret != ARRAY_SIZE(msgs))
327		return -EIO;
328
329	*val = be32_to_cpu(data_be);
330
331	return 0;
332}
333
334static void ov2685_fill_fmt(const struct ov2685_mode *mode,
335			    struct v4l2_mbus_framefmt *fmt)
336{
337	fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
338	fmt->width = mode->width;
339	fmt->height = mode->height;
340	fmt->field = V4L2_FIELD_NONE;
341}
342
343static int ov2685_set_fmt(struct v4l2_subdev *sd,
344			  struct v4l2_subdev_state *sd_state,
345			  struct v4l2_subdev_format *fmt)
346{
347	struct ov2685 *ov2685 = to_ov2685(sd);
348	struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
349
350	/* only one mode supported for now */
351	ov2685_fill_fmt(ov2685->cur_mode, mbus_fmt);
352
353	return 0;
354}
355
356static int ov2685_get_fmt(struct v4l2_subdev *sd,
357			  struct v4l2_subdev_state *sd_state,
358			  struct v4l2_subdev_format *fmt)
359{
360	struct ov2685 *ov2685 = to_ov2685(sd);
361	struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
362
363	ov2685_fill_fmt(ov2685->cur_mode, mbus_fmt);
364
365	return 0;
366}
367
368static int ov2685_enum_mbus_code(struct v4l2_subdev *sd,
369				 struct v4l2_subdev_state *sd_state,
370				 struct v4l2_subdev_mbus_code_enum *code)
371{
372	if (code->index >= ARRAY_SIZE(supported_modes))
373		return -EINVAL;
374
375	code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
376
377	return 0;
378}
379
380static int ov2685_enum_frame_sizes(struct v4l2_subdev *sd,
381				   struct v4l2_subdev_state *sd_state,
382				   struct v4l2_subdev_frame_size_enum *fse)
383{
384	int index = fse->index;
385
386	if (index >= ARRAY_SIZE(supported_modes))
387		return -EINVAL;
388
389	fse->code = MEDIA_BUS_FMT_SBGGR10_1X10;
390
391	fse->min_width  = supported_modes[index].width;
392	fse->max_width  = supported_modes[index].width;
393	fse->max_height = supported_modes[index].height;
394	fse->min_height = supported_modes[index].height;
395
396	return 0;
397}
398
399static const struct v4l2_rect *
400__ov2685_get_pad_crop(struct ov2685 *ov2685,
401		      struct v4l2_subdev_state *state, unsigned int pad,
402		      enum v4l2_subdev_format_whence which)
403{
404	const struct ov2685_mode *mode = ov2685->cur_mode;
405
406	switch (which) {
407	case V4L2_SUBDEV_FORMAT_TRY:
408		return v4l2_subdev_get_try_crop(&ov2685->subdev, state, pad);
409	case V4L2_SUBDEV_FORMAT_ACTIVE:
410		return mode->analog_crop;
411	}
412
413	return NULL;
414}
415
416static int ov2685_get_selection(struct v4l2_subdev *sd,
417				struct v4l2_subdev_state *sd_state,
418				struct v4l2_subdev_selection *sel)
419{
420	struct ov2685 *ov2685 = to_ov2685(sd);
421
422	switch (sel->target) {
423	case V4L2_SEL_TGT_CROP:
424		mutex_lock(&ov2685->mutex);
425		sel->r = *__ov2685_get_pad_crop(ov2685, sd_state, sel->pad,
426				sel->which);
427		mutex_unlock(&ov2685->mutex);
428		break;
429	case V4L2_SEL_TGT_NATIVE_SIZE:
430	case V4L2_SEL_TGT_CROP_BOUNDS:
431		sel->r.top = 0;
432		sel->r.left = 0;
433		sel->r.width = OV2685_NATIVE_WIDTH;
434		sel->r.height = OV2685_NATIVE_HEIGHT;
435		break;
436	case V4L2_SEL_TGT_CROP_DEFAULT:
437		sel->r = ov2685_analog_crop;
438		break;
439	default:
440		return -EINVAL;
441	}
442
443	return 0;
444}
445
446/* Calculate the delay in us by clock rate and clock cycles */
447static inline u32 ov2685_cal_delay(u32 cycles)
448{
449	return DIV_ROUND_UP(cycles, OV2685_XVCLK_FREQ / 1000 / 1000);
450}
451
452static int __ov2685_power_on(struct ov2685 *ov2685)
453{
454	int ret;
455	u32 delay_us;
456	struct device *dev = &ov2685->client->dev;
457
458	ret = clk_prepare_enable(ov2685->xvclk);
459	if (ret < 0) {
460		dev_err(dev, "Failed to enable xvclk\n");
461		return ret;
462	}
463
464	gpiod_set_value_cansleep(ov2685->reset_gpio, 1);
465
466	ret = regulator_bulk_enable(OV2685_NUM_SUPPLIES, ov2685->supplies);
467	if (ret < 0) {
468		dev_err(dev, "Failed to enable regulators\n");
469		goto disable_clk;
470	}
471
472	/* The minimum delay between power supplies and reset rising can be 0 */
473	gpiod_set_value_cansleep(ov2685->reset_gpio, 0);
474	/* 8192 xvclk cycles prior to the first SCCB transaction */
475	delay_us = ov2685_cal_delay(8192);
476	usleep_range(delay_us, delay_us * 2);
477
478	/* HACK: ov2685 would output messy data after reset(R0103),
479	 * writing register before .s_stream() as a workaround
480	 */
481	ret = ov2685_write_array(ov2685->client, ov2685->cur_mode->reg_list);
482	if (ret) {
483		dev_err(dev, "Failed to set regs for power on\n");
484		goto disable_supplies;
485	}
486
487	return 0;
488
489disable_supplies:
490	regulator_bulk_disable(OV2685_NUM_SUPPLIES, ov2685->supplies);
491disable_clk:
492	clk_disable_unprepare(ov2685->xvclk);
493
494	return ret;
495}
496
497static void __ov2685_power_off(struct ov2685 *ov2685)
498{
499	/* 512 xvclk cycles after the last SCCB transaction or MIPI frame end */
500	u32 delay_us = ov2685_cal_delay(512);
501
502	usleep_range(delay_us, delay_us * 2);
503	clk_disable_unprepare(ov2685->xvclk);
504	gpiod_set_value_cansleep(ov2685->reset_gpio, 1);
505	regulator_bulk_disable(OV2685_NUM_SUPPLIES, ov2685->supplies);
506}
507
508static int ov2685_s_stream(struct v4l2_subdev *sd, int on)
509{
510	struct ov2685 *ov2685 = to_ov2685(sd);
511	struct i2c_client *client = ov2685->client;
512	int ret = 0;
513
514	mutex_lock(&ov2685->mutex);
515
516	on = !!on;
517	if (on == ov2685->streaming)
518		goto unlock_and_return;
519
520	if (on) {
521		ret = pm_runtime_resume_and_get(&ov2685->client->dev);
522		if (ret < 0)
523			goto unlock_and_return;
524
525		ret = __v4l2_ctrl_handler_setup(&ov2685->ctrl_handler);
526		if (ret) {
527			pm_runtime_put(&client->dev);
528			goto unlock_and_return;
529		}
530		ret = ov2685_write_reg(client, REG_SC_CTRL_MODE,
531				OV2685_REG_VALUE_08BIT, SC_CTRL_MODE_STREAMING);
532		if (ret) {
533			pm_runtime_put(&client->dev);
534			goto unlock_and_return;
535		}
536	} else {
537		ov2685_write_reg(client, REG_SC_CTRL_MODE,
538				OV2685_REG_VALUE_08BIT, SC_CTRL_MODE_STANDBY);
539		pm_runtime_put(&ov2685->client->dev);
540	}
541
542	ov2685->streaming = on;
543
544unlock_and_return:
545	mutex_unlock(&ov2685->mutex);
546
547	return ret;
548}
549
550#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
551static int ov2685_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
552{
553	struct ov2685 *ov2685 = to_ov2685(sd);
554	struct v4l2_mbus_framefmt *try_fmt;
555
556	mutex_lock(&ov2685->mutex);
557
558	try_fmt = v4l2_subdev_get_try_format(sd, fh->state, 0);
559	/* Initialize try_fmt */
560	ov2685_fill_fmt(&supported_modes[0], try_fmt);
561
562	mutex_unlock(&ov2685->mutex);
563
564	return 0;
565}
566#endif
567
568static int __maybe_unused ov2685_runtime_resume(struct device *dev)
569{
570	struct v4l2_subdev *sd = dev_get_drvdata(dev);
571	struct ov2685 *ov2685 = to_ov2685(sd);
572
573	return __ov2685_power_on(ov2685);
574}
575
576static int __maybe_unused ov2685_runtime_suspend(struct device *dev)
577{
578	struct v4l2_subdev *sd = dev_get_drvdata(dev);
579	struct ov2685 *ov2685 = to_ov2685(sd);
580
581	__ov2685_power_off(ov2685);
582
583	return 0;
584}
585
586static const struct dev_pm_ops ov2685_pm_ops = {
587	SET_RUNTIME_PM_OPS(ov2685_runtime_suspend,
588			   ov2685_runtime_resume, NULL)
589};
590
591static int ov2685_set_ctrl(struct v4l2_ctrl *ctrl)
592{
593	struct ov2685 *ov2685 = container_of(ctrl->handler,
594					     struct ov2685, ctrl_handler);
595	struct i2c_client *client = ov2685->client;
596	s64 max_expo;
597	int ret;
598
599	/* Propagate change of current control to all related controls */
600	switch (ctrl->id) {
601	case V4L2_CID_VBLANK:
602		/* Update max exposure while meeting expected vblanking */
603		max_expo = ov2685->cur_mode->height + ctrl->val - 4;
604		__v4l2_ctrl_modify_range(ov2685->exposure,
605					 ov2685->exposure->minimum, max_expo,
606					 ov2685->exposure->step,
607					 ov2685->exposure->default_value);
608		break;
609	}
610
611	if (!pm_runtime_get_if_in_use(&client->dev))
612		return 0;
613
614	switch (ctrl->id) {
615	case V4L2_CID_EXPOSURE:
616		ret = ov2685_write_reg(ov2685->client, OV2685_REG_EXPOSURE,
617				       OV2685_REG_VALUE_24BIT, ctrl->val << 4);
618		break;
619	case V4L2_CID_ANALOGUE_GAIN:
620		ret = ov2685_write_reg(ov2685->client, OV2685_REG_GAIN,
621				       OV2685_REG_VALUE_16BIT, ctrl->val);
622		break;
623	case V4L2_CID_VBLANK:
624		ret = ov2685_write_reg(ov2685->client, OV2685_REG_VTS,
625				       OV2685_REG_VALUE_16BIT,
626				       ctrl->val + ov2685->cur_mode->height);
627		break;
628	case V4L2_CID_TEST_PATTERN:
629		ret = ov2685_write_reg(ov2685->client, OV2685_REG_TEST_PATTERN,
630				       OV2685_REG_VALUE_08BIT,
631				       ov2685_test_pattern_val[ctrl->val]);
632		break;
633	default:
634		dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
635			 __func__, ctrl->id, ctrl->val);
636		ret = -EINVAL;
637		break;
638	}
639
640	pm_runtime_put(&client->dev);
641
642	return ret;
643}
644
645static const struct v4l2_subdev_video_ops ov2685_video_ops = {
646	.s_stream = ov2685_s_stream,
647};
648
649static const struct v4l2_subdev_pad_ops ov2685_pad_ops = {
650	.enum_mbus_code = ov2685_enum_mbus_code,
651	.enum_frame_size = ov2685_enum_frame_sizes,
652	.get_fmt = ov2685_get_fmt,
653	.set_fmt = ov2685_set_fmt,
654	.get_selection = ov2685_get_selection,
655	.set_selection = ov2685_get_selection,
656};
657
658static const struct v4l2_subdev_ops ov2685_subdev_ops = {
659	.video	= &ov2685_video_ops,
660	.pad	= &ov2685_pad_ops,
661};
662
663#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
664static const struct v4l2_subdev_internal_ops ov2685_internal_ops = {
665	.open = ov2685_open,
666};
667#endif
668
669static const struct v4l2_ctrl_ops ov2685_ctrl_ops = {
670	.s_ctrl = ov2685_set_ctrl,
671};
672
673static int ov2685_initialize_controls(struct ov2685 *ov2685)
674{
675	const struct ov2685_mode *mode;
676	struct v4l2_ctrl_handler *handler;
677	struct v4l2_ctrl *ctrl;
678	struct v4l2_fwnode_device_properties props;
679	u64 exposure_max;
680	u32 pixel_rate, h_blank;
681	int ret;
682
683	handler = &ov2685->ctrl_handler;
684	mode = ov2685->cur_mode;
685	ret = v4l2_ctrl_handler_init(handler, 10);
686	if (ret)
687		return ret;
688	handler->lock = &ov2685->mutex;
689
690	ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
691				      0, 0, link_freq_menu_items);
692	if (ctrl)
693		ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
694
695	pixel_rate = (link_freq_menu_items[0] * 2 * OV2685_LANES) /
696		     OV2685_BITS_PER_SAMPLE;
697	v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
698			  0, pixel_rate, 1, pixel_rate);
699
700	h_blank = mode->hts_def - mode->width;
701	ov2685->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
702				h_blank, h_blank, 1, h_blank);
703	if (ov2685->hblank)
704		ov2685->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
705
706	ov2685->vblank = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops,
707				V4L2_CID_VBLANK, mode->vts_def - mode->height,
708				OV2685_VTS_MAX - mode->height, 1,
709				mode->vts_def - mode->height);
710
711	exposure_max = mode->vts_def - 4;
712	ov2685->exposure = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops,
713				V4L2_CID_EXPOSURE, OV2685_EXPOSURE_MIN,
714				exposure_max, OV2685_EXPOSURE_STEP,
715				mode->exp_def);
716
717	ov2685->anal_gain = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops,
718				V4L2_CID_ANALOGUE_GAIN, OV2685_GAIN_MIN,
719				OV2685_GAIN_MAX, OV2685_GAIN_STEP,
720				OV2685_GAIN_DEFAULT);
721
722	ov2685->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
723				&ov2685_ctrl_ops, V4L2_CID_TEST_PATTERN,
724				ARRAY_SIZE(ov2685_test_pattern_menu) - 1,
725				0, 0, ov2685_test_pattern_menu);
726
727	/* set properties from fwnode (e.g. rotation, orientation) */
728	ret = v4l2_fwnode_device_parse(&ov2685->client->dev, &props);
729	if (ret)
730		goto err_free_handler;
731
732	ret = v4l2_ctrl_new_fwnode_properties(handler, &ov2685_ctrl_ops, &props);
733	if (ret)
734		goto err_free_handler;
735
736	if (handler->error) {
737		ret = handler->error;
738		dev_err(&ov2685->client->dev,
739			"Failed to init controls(%d)\n", ret);
740		goto err_free_handler;
741	}
742
743	ov2685->subdev.ctrl_handler = handler;
744
745	return 0;
746
747err_free_handler:
748	v4l2_ctrl_handler_free(handler);
749
750	return ret;
751}
752
753static int ov2685_check_sensor_id(struct ov2685 *ov2685,
754				  struct i2c_client *client)
755{
756	struct device *dev = &ov2685->client->dev;
757	int ret;
758	u32 id = 0;
759
760	ret = ov2685_read_reg(client, OV2685_REG_CHIP_ID,
761			      OV2685_REG_VALUE_16BIT, &id);
762	if (id != CHIP_ID) {
763		dev_err(dev, "Unexpected sensor id(%04x), ret(%d)\n", id, ret);
764		return ret;
765	}
766
767	dev_info(dev, "Detected OV%04x sensor\n", CHIP_ID);
768
769	return 0;
770}
771
772static int ov2685_configure_regulators(struct ov2685 *ov2685)
773{
774	int i;
775
776	for (i = 0; i < OV2685_NUM_SUPPLIES; i++)
777		ov2685->supplies[i].supply = ov2685_supply_names[i];
778
779	return devm_regulator_bulk_get(&ov2685->client->dev,
780				       OV2685_NUM_SUPPLIES,
781				       ov2685->supplies);
782}
783
784static int ov2685_probe(struct i2c_client *client)
785{
786	struct device *dev = &client->dev;
787	struct ov2685 *ov2685;
788	int ret;
789
790	ov2685 = devm_kzalloc(dev, sizeof(*ov2685), GFP_KERNEL);
791	if (!ov2685)
792		return -ENOMEM;
793
794	ov2685->client = client;
795	ov2685->cur_mode = &supported_modes[0];
796
797	ov2685->xvclk = devm_clk_get(dev, "xvclk");
798	if (IS_ERR(ov2685->xvclk)) {
799		dev_err(dev, "Failed to get xvclk\n");
800		return -EINVAL;
801	}
802	ret = clk_set_rate(ov2685->xvclk, OV2685_XVCLK_FREQ);
803	if (ret < 0) {
804		dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
805		return ret;
806	}
807	if (clk_get_rate(ov2685->xvclk) != OV2685_XVCLK_FREQ)
808		dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
809
810	ov2685->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
811	if (IS_ERR(ov2685->reset_gpio)) {
812		dev_err(dev, "Failed to get reset-gpios\n");
813		return -EINVAL;
814	}
815
816	ret = ov2685_configure_regulators(ov2685);
817	if (ret) {
818		dev_err(dev, "Failed to get power regulators\n");
819		return ret;
820	}
821
822	mutex_init(&ov2685->mutex);
823	v4l2_i2c_subdev_init(&ov2685->subdev, client, &ov2685_subdev_ops);
824	ret = ov2685_initialize_controls(ov2685);
825	if (ret)
826		goto err_destroy_mutex;
827
828	ret = __ov2685_power_on(ov2685);
829	if (ret)
830		goto err_free_handler;
831
832	ret = ov2685_check_sensor_id(ov2685, client);
833	if (ret)
834		goto err_power_off;
835
836#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
837	ov2685->subdev.internal_ops = &ov2685_internal_ops;
838	ov2685->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
839#endif
840#if defined(CONFIG_MEDIA_CONTROLLER)
841	ov2685->pad.flags = MEDIA_PAD_FL_SOURCE;
842	ov2685->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
843	ret = media_entity_pads_init(&ov2685->subdev.entity, 1, &ov2685->pad);
844	if (ret < 0)
845		goto err_power_off;
846#endif
847
848	ret = v4l2_async_register_subdev(&ov2685->subdev);
849	if (ret) {
850		dev_err(dev, "v4l2 async register subdev failed\n");
851		goto err_clean_entity;
852	}
853
854	pm_runtime_set_active(dev);
855	pm_runtime_enable(dev);
856	pm_runtime_idle(dev);
857
858	return 0;
859
860err_clean_entity:
861#if defined(CONFIG_MEDIA_CONTROLLER)
862	media_entity_cleanup(&ov2685->subdev.entity);
863#endif
864err_power_off:
865	__ov2685_power_off(ov2685);
866err_free_handler:
867	v4l2_ctrl_handler_free(&ov2685->ctrl_handler);
868err_destroy_mutex:
869	mutex_destroy(&ov2685->mutex);
870
871	return ret;
872}
873
874static void ov2685_remove(struct i2c_client *client)
875{
876	struct v4l2_subdev *sd = i2c_get_clientdata(client);
877	struct ov2685 *ov2685 = to_ov2685(sd);
878
879	v4l2_async_unregister_subdev(sd);
880#if defined(CONFIG_MEDIA_CONTROLLER)
881	media_entity_cleanup(&sd->entity);
882#endif
883	v4l2_ctrl_handler_free(&ov2685->ctrl_handler);
884	mutex_destroy(&ov2685->mutex);
885
886	pm_runtime_disable(&client->dev);
887	if (!pm_runtime_status_suspended(&client->dev))
888		__ov2685_power_off(ov2685);
889	pm_runtime_set_suspended(&client->dev);
890}
891
892#if IS_ENABLED(CONFIG_OF)
893static const struct of_device_id ov2685_of_match[] = {
894	{ .compatible = "ovti,ov2685" },
895	{},
896};
897MODULE_DEVICE_TABLE(of, ov2685_of_match);
898#endif
899
900static struct i2c_driver ov2685_i2c_driver = {
901	.driver = {
902		.name = "ov2685",
903		.pm = &ov2685_pm_ops,
904		.of_match_table = of_match_ptr(ov2685_of_match),
905	},
906	.probe		= ov2685_probe,
907	.remove		= ov2685_remove,
908};
909
910module_i2c_driver(ov2685_i2c_driver);
911
912MODULE_DESCRIPTION("OmniVision ov2685 sensor driver");
913MODULE_LICENSE("GPL v2");
914