1// SPDX-License-Identifier: GPL-2.0
2//
3// mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
4//
5// Copyright (c) 2009 Mauro Carvalho Chehab <mchehab@kernel.org>
6
7#include <linux/i2c.h>
8#include <linux/slab.h>
9#include <linux/videodev2.h>
10#include <linux/delay.h>
11#include <linux/module.h>
12#include <asm/div64.h>
13#include <media/v4l2-device.h>
14#include <media/v4l2-ctrls.h>
15#include <media/i2c/mt9v011.h>
16
17MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
18MODULE_AUTHOR("Mauro Carvalho Chehab");
19MODULE_LICENSE("GPL v2");
20
21static int debug;
22module_param(debug, int, 0);
23MODULE_PARM_DESC(debug, "Debug level (0-2)");
24
25#define R00_MT9V011_CHIP_VERSION	0x00
26#define R01_MT9V011_ROWSTART		0x01
27#define R02_MT9V011_COLSTART		0x02
28#define R03_MT9V011_HEIGHT		0x03
29#define R04_MT9V011_WIDTH		0x04
30#define R05_MT9V011_HBLANK		0x05
31#define R06_MT9V011_VBLANK		0x06
32#define R07_MT9V011_OUT_CTRL		0x07
33#define R09_MT9V011_SHUTTER_WIDTH	0x09
34#define R0A_MT9V011_CLK_SPEED		0x0a
35#define R0B_MT9V011_RESTART		0x0b
36#define R0C_MT9V011_SHUTTER_DELAY	0x0c
37#define R0D_MT9V011_RESET		0x0d
38#define R1E_MT9V011_DIGITAL_ZOOM	0x1e
39#define R20_MT9V011_READ_MODE		0x20
40#define R2B_MT9V011_GREEN_1_GAIN	0x2b
41#define R2C_MT9V011_BLUE_GAIN		0x2c
42#define R2D_MT9V011_RED_GAIN		0x2d
43#define R2E_MT9V011_GREEN_2_GAIN	0x2e
44#define R35_MT9V011_GLOBAL_GAIN		0x35
45#define RF1_MT9V011_CHIP_ENABLE		0xf1
46
47#define MT9V011_VERSION			0x8232
48#define MT9V011_REV_B_VERSION		0x8243
49
50struct mt9v011 {
51	struct v4l2_subdev sd;
52#ifdef CONFIG_MEDIA_CONTROLLER
53	struct media_pad pad;
54#endif
55	struct v4l2_ctrl_handler ctrls;
56	unsigned width, height;
57	unsigned xtal;
58	unsigned hflip:1;
59	unsigned vflip:1;
60
61	u16 global_gain, exposure;
62	s16 red_bal, blue_bal;
63};
64
65static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
66{
67	return container_of(sd, struct mt9v011, sd);
68}
69
70static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
71{
72	struct i2c_client *c = v4l2_get_subdevdata(sd);
73	__be16 buffer;
74	int rc, val;
75
76	rc = i2c_master_send(c, &addr, 1);
77	if (rc != 1)
78		v4l2_dbg(0, debug, sd,
79			 "i2c i/o error: rc == %d (should be 1)\n", rc);
80
81	msleep(10);
82
83	rc = i2c_master_recv(c, (char *)&buffer, 2);
84	if (rc != 2)
85		v4l2_dbg(0, debug, sd,
86			 "i2c i/o error: rc == %d (should be 2)\n", rc);
87
88	val = be16_to_cpu(buffer);
89
90	v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
91
92	return val;
93}
94
95static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
96				 u16 value)
97{
98	struct i2c_client *c = v4l2_get_subdevdata(sd);
99	unsigned char buffer[3];
100	int rc;
101
102	buffer[0] = addr;
103	buffer[1] = value >> 8;
104	buffer[2] = value & 0xff;
105
106	v4l2_dbg(2, debug, sd,
107		 "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
108	rc = i2c_master_send(c, buffer, 3);
109	if (rc != 3)
110		v4l2_dbg(0, debug, sd,
111			 "i2c i/o error: rc == %d (should be 3)\n", rc);
112}
113
114
115struct i2c_reg_value {
116	unsigned char reg;
117	u16           value;
118};
119
120/*
121 * Values used at the original driver
122 * Some values are marked as Reserved at the datasheet
123 */
124static const struct i2c_reg_value mt9v011_init_default[] = {
125		{ R0D_MT9V011_RESET, 0x0001 },
126		{ R0D_MT9V011_RESET, 0x0000 },
127
128		{ R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
129		{ R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
130
131		{ R0A_MT9V011_CLK_SPEED, 0x0000 },
132		{ R1E_MT9V011_DIGITAL_ZOOM,  0x0000 },
133
134		{ R07_MT9V011_OUT_CTRL, 0x0002 },	/* chip enable */
135};
136
137
138static u16 calc_mt9v011_gain(s16 lineargain)
139{
140
141	u16 digitalgain = 0;
142	u16 analogmult = 0;
143	u16 analoginit = 0;
144
145	if (lineargain < 0)
146		lineargain = 0;
147
148	/* recommended minimum */
149	lineargain += 0x0020;
150
151	if (lineargain > 2047)
152		lineargain = 2047;
153
154	if (lineargain > 1023) {
155		digitalgain = 3;
156		analogmult = 3;
157		analoginit = lineargain / 16;
158	} else if (lineargain > 511) {
159		digitalgain = 1;
160		analogmult = 3;
161		analoginit = lineargain / 8;
162	} else if (lineargain > 255) {
163		analogmult = 3;
164		analoginit = lineargain / 4;
165	} else if (lineargain > 127) {
166		analogmult = 1;
167		analoginit = lineargain / 2;
168	} else
169		analoginit = lineargain;
170
171	return analoginit + (analogmult << 7) + (digitalgain << 9);
172
173}
174
175static void set_balance(struct v4l2_subdev *sd)
176{
177	struct mt9v011 *core = to_mt9v011(sd);
178	u16 green_gain, blue_gain, red_gain;
179	u16 exposure;
180	s16 bal;
181
182	exposure = core->exposure;
183
184	green_gain = calc_mt9v011_gain(core->global_gain);
185
186	bal = core->global_gain;
187	bal += (core->blue_bal * core->global_gain / (1 << 7));
188	blue_gain = calc_mt9v011_gain(bal);
189
190	bal = core->global_gain;
191	bal += (core->red_bal * core->global_gain / (1 << 7));
192	red_gain = calc_mt9v011_gain(bal);
193
194	mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green_gain);
195	mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green_gain);
196	mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
197	mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
198	mt9v011_write(sd, R09_MT9V011_SHUTTER_WIDTH, exposure);
199}
200
201static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
202{
203	struct mt9v011 *core = to_mt9v011(sd);
204	unsigned height, width, hblank, vblank, speed;
205	unsigned row_time, t_time;
206	u64 frames_per_ms;
207	unsigned tmp;
208
209	height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
210	width = mt9v011_read(sd, R04_MT9V011_WIDTH);
211	hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
212	vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
213	speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
214
215	row_time = (width + 113 + hblank) * (speed + 2);
216	t_time = row_time * (height + vblank + 1);
217
218	frames_per_ms = core->xtal * 1000l;
219	do_div(frames_per_ms, t_time);
220	tmp = frames_per_ms;
221
222	v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
223		tmp / 1000, tmp % 1000, t_time);
224
225	if (numerator && denominator) {
226		*numerator = 1000;
227		*denominator = (u32)frames_per_ms;
228	}
229}
230
231static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
232{
233	struct mt9v011 *core = to_mt9v011(sd);
234	unsigned height, width, hblank, vblank;
235	unsigned row_time, line_time;
236	u64 t_time, speed;
237
238	/* Avoid bogus calculus */
239	if (!numerator || !denominator)
240		return 0;
241
242	height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
243	width = mt9v011_read(sd, R04_MT9V011_WIDTH);
244	hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
245	vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
246
247	row_time = width + 113 + hblank;
248	line_time = height + vblank + 1;
249
250	t_time = core->xtal * ((u64)numerator);
251	/* round to the closest value */
252	t_time += denominator / 2;
253	do_div(t_time, denominator);
254
255	speed = t_time;
256	do_div(speed, row_time * line_time);
257
258	/* Avoid having a negative value for speed */
259	if (speed < 2)
260		speed = 0;
261	else
262		speed -= 2;
263
264	/* Avoid speed overflow */
265	if (speed > 15)
266		return 15;
267
268	return (u16)speed;
269}
270
271static void set_res(struct v4l2_subdev *sd)
272{
273	struct mt9v011 *core = to_mt9v011(sd);
274	unsigned vstart, hstart;
275
276	/*
277	 * The mt9v011 doesn't have scaling. So, in order to select the desired
278	 * resolution, we're cropping at the middle of the sensor.
279	 * hblank and vblank should be adjusted, in order to warrant that
280	 * we'll preserve the line timings for 30 fps, no matter what resolution
281	 * is selected.
282	 * NOTE: datasheet says that width (and height) should be filled with
283	 * width-1. However, this doesn't work, since one pixel per line will
284	 * be missing.
285	 */
286
287	hstart = 20 + (640 - core->width) / 2;
288	mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
289	mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
290	mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
291
292	vstart = 8 + (480 - core->height) / 2;
293	mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
294	mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
295	mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
296
297	calc_fps(sd, NULL, NULL);
298};
299
300static void set_read_mode(struct v4l2_subdev *sd)
301{
302	struct mt9v011 *core = to_mt9v011(sd);
303	unsigned mode = 0x1000;
304
305	if (core->hflip)
306		mode |= 0x4000;
307
308	if (core->vflip)
309		mode |= 0x8000;
310
311	mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
312}
313
314static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
315{
316	int i;
317
318	for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
319		mt9v011_write(sd, mt9v011_init_default[i].reg,
320			       mt9v011_init_default[i].value);
321
322	set_balance(sd);
323	set_res(sd);
324	set_read_mode(sd);
325
326	return 0;
327}
328
329static int mt9v011_enum_mbus_code(struct v4l2_subdev *sd,
330		struct v4l2_subdev_state *sd_state,
331		struct v4l2_subdev_mbus_code_enum *code)
332{
333	if (code->pad || code->index > 0)
334		return -EINVAL;
335
336	code->code = MEDIA_BUS_FMT_SGRBG8_1X8;
337	return 0;
338}
339
340static int mt9v011_set_fmt(struct v4l2_subdev *sd,
341		struct v4l2_subdev_state *sd_state,
342		struct v4l2_subdev_format *format)
343{
344	struct v4l2_mbus_framefmt *fmt = &format->format;
345	struct mt9v011 *core = to_mt9v011(sd);
346
347	if (format->pad || fmt->code != MEDIA_BUS_FMT_SGRBG8_1X8)
348		return -EINVAL;
349
350	v4l_bound_align_image(&fmt->width, 48, 639, 1,
351			      &fmt->height, 32, 480, 1, 0);
352	fmt->field = V4L2_FIELD_NONE;
353	fmt->colorspace = V4L2_COLORSPACE_SRGB;
354
355	if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
356		core->width = fmt->width;
357		core->height = fmt->height;
358
359		set_res(sd);
360	} else {
361		sd_state->pads->try_fmt = *fmt;
362	}
363
364	return 0;
365}
366
367static int mt9v011_g_frame_interval(struct v4l2_subdev *sd,
368				    struct v4l2_subdev_frame_interval *ival)
369{
370	calc_fps(sd,
371		 &ival->interval.numerator,
372		 &ival->interval.denominator);
373
374	return 0;
375}
376
377static int mt9v011_s_frame_interval(struct v4l2_subdev *sd,
378				    struct v4l2_subdev_frame_interval *ival)
379{
380	struct v4l2_fract *tpf = &ival->interval;
381	u16 speed;
382
383	speed = calc_speed(sd, tpf->numerator, tpf->denominator);
384
385	mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
386	v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
387
388	/* Recalculate and update fps info */
389	calc_fps(sd, &tpf->numerator, &tpf->denominator);
390
391	return 0;
392}
393
394#ifdef CONFIG_VIDEO_ADV_DEBUG
395static int mt9v011_g_register(struct v4l2_subdev *sd,
396			      struct v4l2_dbg_register *reg)
397{
398	reg->val = mt9v011_read(sd, reg->reg & 0xff);
399	reg->size = 2;
400
401	return 0;
402}
403
404static int mt9v011_s_register(struct v4l2_subdev *sd,
405			      const struct v4l2_dbg_register *reg)
406{
407	mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
408
409	return 0;
410}
411#endif
412
413static int mt9v011_s_ctrl(struct v4l2_ctrl *ctrl)
414{
415	struct mt9v011 *core =
416		container_of(ctrl->handler, struct mt9v011, ctrls);
417	struct v4l2_subdev *sd = &core->sd;
418
419	switch (ctrl->id) {
420	case V4L2_CID_GAIN:
421		core->global_gain = ctrl->val;
422		break;
423	case V4L2_CID_EXPOSURE:
424		core->exposure = ctrl->val;
425		break;
426	case V4L2_CID_RED_BALANCE:
427		core->red_bal = ctrl->val;
428		break;
429	case V4L2_CID_BLUE_BALANCE:
430		core->blue_bal = ctrl->val;
431		break;
432	case V4L2_CID_HFLIP:
433		core->hflip = ctrl->val;
434		set_read_mode(sd);
435		return 0;
436	case V4L2_CID_VFLIP:
437		core->vflip = ctrl->val;
438		set_read_mode(sd);
439		return 0;
440	default:
441		return -EINVAL;
442	}
443
444	set_balance(sd);
445	return 0;
446}
447
448static const struct v4l2_ctrl_ops mt9v011_ctrl_ops = {
449	.s_ctrl = mt9v011_s_ctrl,
450};
451
452static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
453	.reset = mt9v011_reset,
454#ifdef CONFIG_VIDEO_ADV_DEBUG
455	.g_register = mt9v011_g_register,
456	.s_register = mt9v011_s_register,
457#endif
458};
459
460static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
461	.g_frame_interval = mt9v011_g_frame_interval,
462	.s_frame_interval = mt9v011_s_frame_interval,
463};
464
465static const struct v4l2_subdev_pad_ops mt9v011_pad_ops = {
466	.enum_mbus_code = mt9v011_enum_mbus_code,
467	.set_fmt = mt9v011_set_fmt,
468};
469
470static const struct v4l2_subdev_ops mt9v011_ops = {
471	.core  = &mt9v011_core_ops,
472	.video = &mt9v011_video_ops,
473	.pad   = &mt9v011_pad_ops,
474};
475
476
477/****************************************************************************
478			I2C Client & Driver
479 ****************************************************************************/
480
481static int mt9v011_probe(struct i2c_client *c)
482{
483	u16 version;
484	struct mt9v011 *core;
485	struct v4l2_subdev *sd;
486#ifdef CONFIG_MEDIA_CONTROLLER
487	int ret;
488#endif
489
490	/* Check if the adapter supports the needed features */
491	if (!i2c_check_functionality(c->adapter,
492	     I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
493		return -EIO;
494
495	core = devm_kzalloc(&c->dev, sizeof(struct mt9v011), GFP_KERNEL);
496	if (!core)
497		return -ENOMEM;
498
499	sd = &core->sd;
500	v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
501
502#ifdef CONFIG_MEDIA_CONTROLLER
503	core->pad.flags = MEDIA_PAD_FL_SOURCE;
504	sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
505
506	ret = media_entity_pads_init(&sd->entity, 1, &core->pad);
507	if (ret < 0)
508		return ret;
509#endif
510
511	/* Check if the sensor is really a MT9V011 */
512	version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
513	if ((version != MT9V011_VERSION) &&
514	    (version != MT9V011_REV_B_VERSION)) {
515		v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
516			  version);
517		return -EINVAL;
518	}
519
520	v4l2_ctrl_handler_init(&core->ctrls, 5);
521	v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
522			  V4L2_CID_GAIN, 0, (1 << 12) - 1 - 0x20, 1, 0x20);
523	v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
524			  V4L2_CID_EXPOSURE, 0, 2047, 1, 0x01fc);
525	v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
526			  V4L2_CID_RED_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
527	v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
528			  V4L2_CID_BLUE_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
529	v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
530			  V4L2_CID_HFLIP, 0, 1, 1, 0);
531	v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
532			  V4L2_CID_VFLIP, 0, 1, 1, 0);
533
534	if (core->ctrls.error) {
535		int ret = core->ctrls.error;
536
537		v4l2_err(sd, "control initialization error %d\n", ret);
538		v4l2_ctrl_handler_free(&core->ctrls);
539		return ret;
540	}
541	core->sd.ctrl_handler = &core->ctrls;
542
543	core->global_gain = 0x0024;
544	core->exposure = 0x01fc;
545	core->width  = 640;
546	core->height = 480;
547	core->xtal = 27000000;	/* Hz */
548
549	if (c->dev.platform_data) {
550		struct mt9v011_platform_data *pdata = c->dev.platform_data;
551
552		core->xtal = pdata->xtal;
553		v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
554			core->xtal / 1000000, (core->xtal / 1000) % 1000);
555	}
556
557	v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
558		 c->addr << 1, c->adapter->name, version);
559
560	return 0;
561}
562
563static void mt9v011_remove(struct i2c_client *c)
564{
565	struct v4l2_subdev *sd = i2c_get_clientdata(c);
566	struct mt9v011 *core = to_mt9v011(sd);
567
568	v4l2_dbg(1, debug, sd,
569		"mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
570		c->addr << 1);
571
572	v4l2_device_unregister_subdev(sd);
573	v4l2_ctrl_handler_free(&core->ctrls);
574}
575
576/* ----------------------------------------------------------------------- */
577
578static const struct i2c_device_id mt9v011_id[] = {
579	{ "mt9v011", 0 },
580	{ }
581};
582MODULE_DEVICE_TABLE(i2c, mt9v011_id);
583
584static struct i2c_driver mt9v011_driver = {
585	.driver = {
586		.name	= "mt9v011",
587	},
588	.probe		= mt9v011_probe,
589	.remove		= mt9v011_remove,
590	.id_table	= mt9v011_id,
591};
592
593module_i2c_driver(mt9v011_driver);
594