xref: /kernel/linux/linux-6.6/drivers/media/i2c/ccs/ccs.h (revision 62306a36) 
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * drivers/media/i2c/smiapp/ccs.h
4 *
5 * Generic driver for MIPI CCS/SMIA/SMIA++ compliant camera sensors
6 *
7 * Copyright (C) 2020 Intel Corporation
8 * Copyright (C) 2010--2012 Nokia Corporation
9 * Contact: Sakari Ailus <sakari.ailus@linux.intel.com>
10 */
11
12#ifndef __CCS_H__
13#define __CCS_H__
14
15#include <linux/mutex.h>
16#include <media/v4l2-ctrls.h>
17#include <media/v4l2-subdev.h>
18
19#include "ccs-data.h"
20#include "ccs-limits.h"
21#include "ccs-quirk.h"
22#include "ccs-regs.h"
23#include "ccs-reg-access.h"
24#include "../ccs-pll.h"
25#include "smiapp-reg-defs.h"
26
27/*
28 * Standard SMIA++ constants
29 */
30#define SMIA_VERSION_1			10
31#define SMIAPP_VERSION_0_8		8 /* Draft 0.8 */
32#define SMIAPP_VERSION_0_9		9 /* Draft 0.9 */
33#define SMIAPP_VERSION_1		10
34
35#define SMIAPP_PROFILE_0		0
36#define SMIAPP_PROFILE_1		1
37#define SMIAPP_PROFILE_2		2
38
39#define SMIAPP_NVM_PAGE_SIZE		64	/* bytes */
40
41#define SMIAPP_RESET_DELAY_CLOCKS	2400
42#define SMIAPP_RESET_DELAY(clk)				\
43	(1000 +	(SMIAPP_RESET_DELAY_CLOCKS * 1000	\
44		 + (clk) / 1000 - 1) / ((clk) / 1000))
45
46#define CCS_COLOUR_COMPONENTS		4
47
48#define SMIAPP_NAME			"smiapp"
49#define CCS_NAME			"ccs"
50
51#define CCS_DFL_I2C_ADDR	(0x20 >> 1) /* Default I2C Address */
52#define CCS_ALT_I2C_ADDR	(0x6e >> 1) /* Alternate I2C Address */
53
54#define CCS_LIM(sensor, limit) \
55	ccs_get_limit(sensor, CCS_L_##limit, 0)
56
57#define CCS_LIM_AT(sensor, limit, offset)	\
58	ccs_get_limit(sensor, CCS_L_##limit, CCS_L_##limit##_OFFSET(offset))
59
60struct ccs_flash_strobe_parms {
61	u8 mode;
62	u32 strobe_width_high_us;
63	u16 strobe_delay;
64	u16 stobe_start_point;
65	u8 trigger;
66};
67
68struct ccs_hwconfig {
69	/*
70	 * Change the cci address if i2c_addr_alt is set.
71	 * Both default and alternate cci addr need to be present
72	 */
73	unsigned short i2c_addr_dfl;	/* Default i2c addr */
74	unsigned short i2c_addr_alt;	/* Alternate i2c addr */
75
76	u32 ext_clk;			/* sensor external clk */
77
78	unsigned int lanes;		/* Number of CSI-2 lanes */
79	u32 csi_signalling_mode;	/* CCS_CSI_SIGNALLING_MODE_* */
80	u64 *op_sys_clock;
81
82	struct ccs_flash_strobe_parms *strobe_setup;
83};
84
85struct ccs_quirk;
86
87#define CCS_MODULE_IDENT_FLAG_REV_LE		(1 << 0)
88
89struct ccs_module_ident {
90	u16 mipi_manufacturer_id;
91	u16 model_id;
92	u8 smia_manufacturer_id;
93	u8 revision_number_major;
94
95	u8 flags;
96
97	char *name;
98	const struct ccs_quirk *quirk;
99};
100
101struct ccs_module_info {
102	u32 smia_manufacturer_id;
103	u32 mipi_manufacturer_id;
104	u32 model_id;
105	u32 revision_number;
106
107	u32 module_year;
108	u32 module_month;
109	u32 module_day;
110
111	u32 sensor_smia_manufacturer_id;
112	u32 sensor_mipi_manufacturer_id;
113	u32 sensor_model_id;
114	u32 sensor_revision_number;
115	u32 sensor_firmware_version;
116
117	u32 smia_version;
118	u32 smiapp_version;
119	u32 ccs_version;
120
121	char *name;
122	const struct ccs_quirk *quirk;
123};
124
125#define CCS_IDENT_FQ(manufacturer, model, rev, fl, _name, _quirk)	\
126	{ .smia_manufacturer_id = manufacturer,				\
127	  .model_id = model,						\
128	  .revision_number_major = rev,					\
129	  .flags = fl,							\
130	  .name = _name,						\
131	  .quirk = _quirk, }
132
133#define CCS_IDENT_LQ(manufacturer, model, rev, _name, _quirk)	\
134	{ .smia_manufacturer_id = manufacturer,				\
135	  .model_id = model,						\
136	  .revision_number_major = rev,					\
137	  .flags = CCS_MODULE_IDENT_FLAG_REV_LE,			\
138	  .name = _name,						\
139	  .quirk = _quirk, }
140
141#define CCS_IDENT_L(manufacturer, model, rev, _name)			\
142	{ .smia_manufacturer_id = manufacturer,				\
143	  .model_id = model,						\
144	  .revision_number_major = rev,					\
145	  .flags = CCS_MODULE_IDENT_FLAG_REV_LE,			\
146	  .name = _name, }
147
148#define CCS_IDENT_Q(manufacturer, model, rev, _name, _quirk)		\
149	{ .smia_manufacturer_id = manufacturer,				\
150	  .model_id = model,						\
151	  .revision_number_major = rev,					\
152	  .flags = 0,							\
153	  .name = _name,						\
154	  .quirk = _quirk, }
155
156#define CCS_IDENT(manufacturer, model, rev, _name)			\
157	{ .smia_manufacturer_id = manufacturer,				\
158	  .model_id = model,						\
159	  .revision_number_major = rev,					\
160	  .flags = 0,							\
161	  .name = _name, }
162
163struct ccs_csi_data_format {
164	u32 code;
165	u8 width;
166	u8 compressed;
167	u8 pixel_order;
168};
169
170#define CCS_SUBDEVS			3
171
172#define CCS_PA_PAD_SRC			0
173#define CCS_PAD_SINK			0
174#define CCS_PAD_SRC			1
175#define CCS_PADS			2
176
177struct ccs_binning_subtype {
178	u8 horizontal:4;
179	u8 vertical:4;
180} __packed;
181
182struct ccs_subdev {
183	struct v4l2_subdev sd;
184	struct media_pad pads[CCS_PADS];
185	struct v4l2_rect sink_fmt;
186	struct v4l2_rect crop[CCS_PADS];
187	struct v4l2_rect compose; /* compose on sink */
188	unsigned short sink_pad;
189	unsigned short source_pad;
190	int npads;
191	struct ccs_sensor *sensor;
192	struct v4l2_ctrl_handler ctrl_handler;
193};
194
195/*
196 * struct ccs_sensor - Main device structure
197 */
198struct ccs_sensor {
199	/*
200	 * "mutex" is used to serialise access to all fields here
201	 * except v4l2_ctrls at the end of the struct. "mutex" is also
202	 * used to serialise access to file handle specific
203	 * information.
204	 */
205	struct mutex mutex;
206	struct ccs_subdev ssds[CCS_SUBDEVS];
207	u32 ssds_used;
208	struct ccs_subdev *src;
209	struct ccs_subdev *binner;
210	struct ccs_subdev *scaler;
211	struct ccs_subdev *pixel_array;
212	struct ccs_hwconfig hwcfg;
213	struct regulator_bulk_data *regulators;
214	struct clk *ext_clk;
215	struct gpio_desc *xshutdown;
216	struct gpio_desc *reset;
217	void *ccs_limits;
218	u8 nbinning_subtypes;
219	struct ccs_binning_subtype binning_subtypes[CCS_LIM_BINNING_SUB_TYPE_MAX_N + 1];
220	u32 mbus_frame_fmts;
221	const struct ccs_csi_data_format *csi_format;
222	const struct ccs_csi_data_format *internal_csi_format;
223	u32 default_mbus_frame_fmts;
224	int default_pixel_order;
225	struct ccs_data_container sdata, mdata;
226
227	u8 binning_horizontal;
228	u8 binning_vertical;
229
230	u8 scale_m;
231	u8 scaling_mode;
232
233	u8 frame_skip;
234	u16 embedded_start; /* embedded data start line */
235	u16 embedded_end;
236	u16 image_start; /* image data start line */
237	u16 visible_pixel_start; /* start pixel of the visible image */
238
239	bool streaming;
240	bool dev_init_done;
241	u8 compressed_min_bpp;
242
243	struct ccs_module_info minfo;
244
245	struct ccs_pll pll;
246
247	/* Is a default format supported for a given BPP? */
248	unsigned long *valid_link_freqs;
249
250	/* Pixel array controls */
251	struct v4l2_ctrl *exposure;
252	struct v4l2_ctrl *hflip;
253	struct v4l2_ctrl *vflip;
254	struct v4l2_ctrl *vblank;
255	struct v4l2_ctrl *hblank;
256	struct v4l2_ctrl *pixel_rate_parray;
257	struct v4l2_ctrl *luminance_level;
258	/* src controls */
259	struct v4l2_ctrl *link_freq;
260	struct v4l2_ctrl *pixel_rate_csi;
261	/* test pattern colour components */
262	struct v4l2_ctrl *test_data[CCS_COLOUR_COMPONENTS];
263};
264
265#define to_ccs_subdev(_sd)				\
266	container_of(_sd, struct ccs_subdev, sd)
267
268#define to_ccs_sensor(_sd)	\
269	(to_ccs_subdev(_sd)->sensor)
270
271void ccs_replace_limit(struct ccs_sensor *sensor,
272		       unsigned int limit, unsigned int offset, u32 val);
273u32 ccs_get_limit(struct ccs_sensor *sensor, unsigned int limit,
274		  unsigned int offset);
275
276#endif /* __CCS_H__ */
277