162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci// Copyright (c) 2017-2018 HiSilicon Limited.
362306a36Sopenharmony_ci// Copyright (c) 2017-2018 Linaro Limited.
462306a36Sopenharmony_ci
562306a36Sopenharmony_ci#include <linux/bitops.h>
662306a36Sopenharmony_ci#include <linux/delay.h>
762306a36Sopenharmony_ci#include <linux/device.h>
862306a36Sopenharmony_ci#include <linux/err.h>
962306a36Sopenharmony_ci#include <linux/interrupt.h>
1062306a36Sopenharmony_ci#include <linux/io.h>
1162306a36Sopenharmony_ci#include <linux/iopoll.h>
1262306a36Sopenharmony_ci#include <linux/mailbox_controller.h>
1362306a36Sopenharmony_ci#include <linux/module.h>
1462306a36Sopenharmony_ci#include <linux/of.h>
1562306a36Sopenharmony_ci#include <linux/platform_device.h>
1662306a36Sopenharmony_ci#include <linux/slab.h>
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci#include "mailbox.h"
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci#define MBOX_CHAN_MAX			32
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ci#define MBOX_RX				0x0
2362306a36Sopenharmony_ci#define MBOX_TX				0x1
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci#define MBOX_BASE(mbox, ch)		((mbox)->base + ((ch) * 0x40))
2662306a36Sopenharmony_ci#define MBOX_SRC_REG			0x00
2762306a36Sopenharmony_ci#define MBOX_DST_REG			0x04
2862306a36Sopenharmony_ci#define MBOX_DCLR_REG			0x08
2962306a36Sopenharmony_ci#define MBOX_DSTAT_REG			0x0c
3062306a36Sopenharmony_ci#define MBOX_MODE_REG			0x10
3162306a36Sopenharmony_ci#define MBOX_IMASK_REG			0x14
3262306a36Sopenharmony_ci#define MBOX_ICLR_REG			0x18
3362306a36Sopenharmony_ci#define MBOX_SEND_REG			0x1c
3462306a36Sopenharmony_ci#define MBOX_DATA_REG			0x20
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci#define MBOX_IPC_LOCK_REG		0xa00
3762306a36Sopenharmony_ci#define MBOX_IPC_UNLOCK			0x1acce551
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci#define MBOX_AUTOMATIC_ACK		1
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci#define MBOX_STATE_IDLE			BIT(4)
4262306a36Sopenharmony_ci#define MBOX_STATE_READY		BIT(5)
4362306a36Sopenharmony_ci#define MBOX_STATE_ACK			BIT(7)
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci#define MBOX_MSG_LEN			8
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci/**
4862306a36Sopenharmony_ci * struct hi3660_chan_info - Hi3660 mailbox channel information
4962306a36Sopenharmony_ci * @dst_irq:	Interrupt vector for remote processor
5062306a36Sopenharmony_ci * @ack_irq:	Interrupt vector for local processor
5162306a36Sopenharmony_ci *
5262306a36Sopenharmony_ci * A channel can be used for TX or RX, it can trigger remote
5362306a36Sopenharmony_ci * processor interrupt to notify remote processor and can receive
5462306a36Sopenharmony_ci * interrupt if it has an incoming message.
5562306a36Sopenharmony_ci */
5662306a36Sopenharmony_cistruct hi3660_chan_info {
5762306a36Sopenharmony_ci	unsigned int dst_irq;
5862306a36Sopenharmony_ci	unsigned int ack_irq;
5962306a36Sopenharmony_ci};
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci/**
6262306a36Sopenharmony_ci * struct hi3660_mbox - Hi3660 mailbox controller data
6362306a36Sopenharmony_ci * @dev:	Device to which it is attached
6462306a36Sopenharmony_ci * @base:	Base address of the register mapping region
6562306a36Sopenharmony_ci * @chan:	Representation of channels in mailbox controller
6662306a36Sopenharmony_ci * @mchan:	Representation of channel info
6762306a36Sopenharmony_ci * @controller:	Representation of a communication channel controller
6862306a36Sopenharmony_ci *
6962306a36Sopenharmony_ci * Mailbox controller includes 32 channels and can allocate
7062306a36Sopenharmony_ci * channel for message transferring.
7162306a36Sopenharmony_ci */
7262306a36Sopenharmony_cistruct hi3660_mbox {
7362306a36Sopenharmony_ci	struct device *dev;
7462306a36Sopenharmony_ci	void __iomem *base;
7562306a36Sopenharmony_ci	struct mbox_chan chan[MBOX_CHAN_MAX];
7662306a36Sopenharmony_ci	struct hi3660_chan_info mchan[MBOX_CHAN_MAX];
7762306a36Sopenharmony_ci	struct mbox_controller controller;
7862306a36Sopenharmony_ci};
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_cistatic struct hi3660_mbox *to_hi3660_mbox(struct mbox_controller *mbox)
8162306a36Sopenharmony_ci{
8262306a36Sopenharmony_ci	return container_of(mbox, struct hi3660_mbox, controller);
8362306a36Sopenharmony_ci}
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_cistatic int hi3660_mbox_check_state(struct mbox_chan *chan)
8662306a36Sopenharmony_ci{
8762306a36Sopenharmony_ci	unsigned long ch = (unsigned long)chan->con_priv;
8862306a36Sopenharmony_ci	struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
8962306a36Sopenharmony_ci	struct hi3660_chan_info *mchan = &mbox->mchan[ch];
9062306a36Sopenharmony_ci	void __iomem *base = MBOX_BASE(mbox, ch);
9162306a36Sopenharmony_ci	unsigned long val;
9262306a36Sopenharmony_ci	unsigned int ret;
9362306a36Sopenharmony_ci
9462306a36Sopenharmony_ci	/* Mailbox is ready to use */
9562306a36Sopenharmony_ci	if (readl(base + MBOX_MODE_REG) & MBOX_STATE_READY)
9662306a36Sopenharmony_ci		return 0;
9762306a36Sopenharmony_ci
9862306a36Sopenharmony_ci	/* Wait for acknowledge from remote */
9962306a36Sopenharmony_ci	ret = readx_poll_timeout_atomic(readl, base + MBOX_MODE_REG,
10062306a36Sopenharmony_ci			val, (val & MBOX_STATE_ACK), 1000, 300000);
10162306a36Sopenharmony_ci	if (ret) {
10262306a36Sopenharmony_ci		dev_err(mbox->dev, "%s: timeout for receiving ack\n", __func__);
10362306a36Sopenharmony_ci		return ret;
10462306a36Sopenharmony_ci	}
10562306a36Sopenharmony_ci
10662306a36Sopenharmony_ci	/* clear ack state, mailbox will get back to ready state */
10762306a36Sopenharmony_ci	writel(BIT(mchan->ack_irq), base + MBOX_ICLR_REG);
10862306a36Sopenharmony_ci
10962306a36Sopenharmony_ci	return 0;
11062306a36Sopenharmony_ci}
11162306a36Sopenharmony_ci
11262306a36Sopenharmony_cistatic int hi3660_mbox_unlock(struct mbox_chan *chan)
11362306a36Sopenharmony_ci{
11462306a36Sopenharmony_ci	struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
11562306a36Sopenharmony_ci	unsigned int val, retry = 3;
11662306a36Sopenharmony_ci
11762306a36Sopenharmony_ci	do {
11862306a36Sopenharmony_ci		writel(MBOX_IPC_UNLOCK, mbox->base + MBOX_IPC_LOCK_REG);
11962306a36Sopenharmony_ci
12062306a36Sopenharmony_ci		val = readl(mbox->base + MBOX_IPC_LOCK_REG);
12162306a36Sopenharmony_ci		if (!val)
12262306a36Sopenharmony_ci			break;
12362306a36Sopenharmony_ci
12462306a36Sopenharmony_ci		udelay(10);
12562306a36Sopenharmony_ci	} while (retry--);
12662306a36Sopenharmony_ci
12762306a36Sopenharmony_ci	if (val)
12862306a36Sopenharmony_ci		dev_err(mbox->dev, "%s: failed to unlock mailbox\n", __func__);
12962306a36Sopenharmony_ci
13062306a36Sopenharmony_ci	return (!val) ? 0 : -ETIMEDOUT;
13162306a36Sopenharmony_ci}
13262306a36Sopenharmony_ci
13362306a36Sopenharmony_cistatic int hi3660_mbox_acquire_channel(struct mbox_chan *chan)
13462306a36Sopenharmony_ci{
13562306a36Sopenharmony_ci	unsigned long ch = (unsigned long)chan->con_priv;
13662306a36Sopenharmony_ci	struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
13762306a36Sopenharmony_ci	struct hi3660_chan_info *mchan = &mbox->mchan[ch];
13862306a36Sopenharmony_ci	void __iomem *base = MBOX_BASE(mbox, ch);
13962306a36Sopenharmony_ci	unsigned int val, retry;
14062306a36Sopenharmony_ci
14162306a36Sopenharmony_ci	for (retry = 10; retry; retry--) {
14262306a36Sopenharmony_ci		/* Check if channel is in idle state */
14362306a36Sopenharmony_ci		if (readl(base + MBOX_MODE_REG) & MBOX_STATE_IDLE) {
14462306a36Sopenharmony_ci			writel(BIT(mchan->ack_irq), base + MBOX_SRC_REG);
14562306a36Sopenharmony_ci
14662306a36Sopenharmony_ci			/* Check ack bit has been set successfully */
14762306a36Sopenharmony_ci			val = readl(base + MBOX_SRC_REG);
14862306a36Sopenharmony_ci			if (val & BIT(mchan->ack_irq))
14962306a36Sopenharmony_ci				break;
15062306a36Sopenharmony_ci		}
15162306a36Sopenharmony_ci	}
15262306a36Sopenharmony_ci
15362306a36Sopenharmony_ci	if (!retry)
15462306a36Sopenharmony_ci		dev_err(mbox->dev, "%s: failed to acquire channel\n", __func__);
15562306a36Sopenharmony_ci
15662306a36Sopenharmony_ci	return retry ? 0 : -ETIMEDOUT;
15762306a36Sopenharmony_ci}
15862306a36Sopenharmony_ci
15962306a36Sopenharmony_cistatic int hi3660_mbox_startup(struct mbox_chan *chan)
16062306a36Sopenharmony_ci{
16162306a36Sopenharmony_ci	int ret;
16262306a36Sopenharmony_ci
16362306a36Sopenharmony_ci	ret = hi3660_mbox_unlock(chan);
16462306a36Sopenharmony_ci	if (ret)
16562306a36Sopenharmony_ci		return ret;
16662306a36Sopenharmony_ci
16762306a36Sopenharmony_ci	ret = hi3660_mbox_acquire_channel(chan);
16862306a36Sopenharmony_ci	if (ret)
16962306a36Sopenharmony_ci		return ret;
17062306a36Sopenharmony_ci
17162306a36Sopenharmony_ci	return 0;
17262306a36Sopenharmony_ci}
17362306a36Sopenharmony_ci
17462306a36Sopenharmony_cistatic int hi3660_mbox_send_data(struct mbox_chan *chan, void *msg)
17562306a36Sopenharmony_ci{
17662306a36Sopenharmony_ci	unsigned long ch = (unsigned long)chan->con_priv;
17762306a36Sopenharmony_ci	struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
17862306a36Sopenharmony_ci	struct hi3660_chan_info *mchan = &mbox->mchan[ch];
17962306a36Sopenharmony_ci	void __iomem *base = MBOX_BASE(mbox, ch);
18062306a36Sopenharmony_ci	u32 *buf = msg;
18162306a36Sopenharmony_ci	unsigned int i;
18262306a36Sopenharmony_ci	int ret;
18362306a36Sopenharmony_ci
18462306a36Sopenharmony_ci	ret = hi3660_mbox_check_state(chan);
18562306a36Sopenharmony_ci	if (ret)
18662306a36Sopenharmony_ci		return ret;
18762306a36Sopenharmony_ci
18862306a36Sopenharmony_ci	/* Clear mask for destination interrupt */
18962306a36Sopenharmony_ci	writel_relaxed(~BIT(mchan->dst_irq), base + MBOX_IMASK_REG);
19062306a36Sopenharmony_ci
19162306a36Sopenharmony_ci	/* Config destination for interrupt vector */
19262306a36Sopenharmony_ci	writel_relaxed(BIT(mchan->dst_irq), base + MBOX_DST_REG);
19362306a36Sopenharmony_ci
19462306a36Sopenharmony_ci	/* Automatic acknowledge mode */
19562306a36Sopenharmony_ci	writel_relaxed(MBOX_AUTOMATIC_ACK, base + MBOX_MODE_REG);
19662306a36Sopenharmony_ci
19762306a36Sopenharmony_ci	/* Fill message data */
19862306a36Sopenharmony_ci	for (i = 0; i < MBOX_MSG_LEN; i++)
19962306a36Sopenharmony_ci		writel_relaxed(buf[i], base + MBOX_DATA_REG + i * 4);
20062306a36Sopenharmony_ci
20162306a36Sopenharmony_ci	/* Trigger data transferring */
20262306a36Sopenharmony_ci	writel(BIT(mchan->ack_irq), base + MBOX_SEND_REG);
20362306a36Sopenharmony_ci	return 0;
20462306a36Sopenharmony_ci}
20562306a36Sopenharmony_ci
20662306a36Sopenharmony_cistatic const struct mbox_chan_ops hi3660_mbox_ops = {
20762306a36Sopenharmony_ci	.startup	= hi3660_mbox_startup,
20862306a36Sopenharmony_ci	.send_data	= hi3660_mbox_send_data,
20962306a36Sopenharmony_ci};
21062306a36Sopenharmony_ci
21162306a36Sopenharmony_cistatic struct mbox_chan *hi3660_mbox_xlate(struct mbox_controller *controller,
21262306a36Sopenharmony_ci					   const struct of_phandle_args *spec)
21362306a36Sopenharmony_ci{
21462306a36Sopenharmony_ci	struct hi3660_mbox *mbox = to_hi3660_mbox(controller);
21562306a36Sopenharmony_ci	struct hi3660_chan_info *mchan;
21662306a36Sopenharmony_ci	unsigned int ch = spec->args[0];
21762306a36Sopenharmony_ci
21862306a36Sopenharmony_ci	if (ch >= MBOX_CHAN_MAX) {
21962306a36Sopenharmony_ci		dev_err(mbox->dev, "Invalid channel idx %d\n", ch);
22062306a36Sopenharmony_ci		return ERR_PTR(-EINVAL);
22162306a36Sopenharmony_ci	}
22262306a36Sopenharmony_ci
22362306a36Sopenharmony_ci	mchan = &mbox->mchan[ch];
22462306a36Sopenharmony_ci	mchan->dst_irq = spec->args[1];
22562306a36Sopenharmony_ci	mchan->ack_irq = spec->args[2];
22662306a36Sopenharmony_ci
22762306a36Sopenharmony_ci	return &mbox->chan[ch];
22862306a36Sopenharmony_ci}
22962306a36Sopenharmony_ci
23062306a36Sopenharmony_cistatic const struct of_device_id hi3660_mbox_of_match[] = {
23162306a36Sopenharmony_ci	{ .compatible = "hisilicon,hi3660-mbox", },
23262306a36Sopenharmony_ci	{},
23362306a36Sopenharmony_ci};
23462306a36Sopenharmony_ci
23562306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, hi3660_mbox_of_match);
23662306a36Sopenharmony_ci
23762306a36Sopenharmony_cistatic int hi3660_mbox_probe(struct platform_device *pdev)
23862306a36Sopenharmony_ci{
23962306a36Sopenharmony_ci	struct device *dev = &pdev->dev;
24062306a36Sopenharmony_ci	struct hi3660_mbox *mbox;
24162306a36Sopenharmony_ci	struct mbox_chan *chan;
24262306a36Sopenharmony_ci	unsigned long ch;
24362306a36Sopenharmony_ci	int err;
24462306a36Sopenharmony_ci
24562306a36Sopenharmony_ci	mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
24662306a36Sopenharmony_ci	if (!mbox)
24762306a36Sopenharmony_ci		return -ENOMEM;
24862306a36Sopenharmony_ci
24962306a36Sopenharmony_ci	mbox->base = devm_platform_ioremap_resource(pdev, 0);
25062306a36Sopenharmony_ci	if (IS_ERR(mbox->base))
25162306a36Sopenharmony_ci		return PTR_ERR(mbox->base);
25262306a36Sopenharmony_ci
25362306a36Sopenharmony_ci	mbox->dev = dev;
25462306a36Sopenharmony_ci	mbox->controller.dev = dev;
25562306a36Sopenharmony_ci	mbox->controller.chans = mbox->chan;
25662306a36Sopenharmony_ci	mbox->controller.num_chans = MBOX_CHAN_MAX;
25762306a36Sopenharmony_ci	mbox->controller.ops = &hi3660_mbox_ops;
25862306a36Sopenharmony_ci	mbox->controller.of_xlate = hi3660_mbox_xlate;
25962306a36Sopenharmony_ci
26062306a36Sopenharmony_ci	/* Initialize mailbox channel data */
26162306a36Sopenharmony_ci	chan = mbox->chan;
26262306a36Sopenharmony_ci	for (ch = 0; ch < MBOX_CHAN_MAX; ch++)
26362306a36Sopenharmony_ci		chan[ch].con_priv = (void *)ch;
26462306a36Sopenharmony_ci
26562306a36Sopenharmony_ci	err = devm_mbox_controller_register(dev, &mbox->controller);
26662306a36Sopenharmony_ci	if (err) {
26762306a36Sopenharmony_ci		dev_err(dev, "Failed to register mailbox %d\n", err);
26862306a36Sopenharmony_ci		return err;
26962306a36Sopenharmony_ci	}
27062306a36Sopenharmony_ci
27162306a36Sopenharmony_ci	platform_set_drvdata(pdev, mbox);
27262306a36Sopenharmony_ci	dev_info(dev, "Mailbox enabled\n");
27362306a36Sopenharmony_ci	return 0;
27462306a36Sopenharmony_ci}
27562306a36Sopenharmony_ci
27662306a36Sopenharmony_cistatic struct platform_driver hi3660_mbox_driver = {
27762306a36Sopenharmony_ci	.probe  = hi3660_mbox_probe,
27862306a36Sopenharmony_ci	.driver = {
27962306a36Sopenharmony_ci		.name = "hi3660-mbox",
28062306a36Sopenharmony_ci		.of_match_table = hi3660_mbox_of_match,
28162306a36Sopenharmony_ci	},
28262306a36Sopenharmony_ci};
28362306a36Sopenharmony_ci
28462306a36Sopenharmony_cistatic int __init hi3660_mbox_init(void)
28562306a36Sopenharmony_ci{
28662306a36Sopenharmony_ci	return platform_driver_register(&hi3660_mbox_driver);
28762306a36Sopenharmony_ci}
28862306a36Sopenharmony_cicore_initcall(hi3660_mbox_init);
28962306a36Sopenharmony_ci
29062306a36Sopenharmony_cistatic void __exit hi3660_mbox_exit(void)
29162306a36Sopenharmony_ci{
29262306a36Sopenharmony_ci	platform_driver_unregister(&hi3660_mbox_driver);
29362306a36Sopenharmony_ci}
29462306a36Sopenharmony_cimodule_exit(hi3660_mbox_exit);
29562306a36Sopenharmony_ci
29662306a36Sopenharmony_ciMODULE_LICENSE("GPL");
29762306a36Sopenharmony_ciMODULE_DESCRIPTION("Hisilicon Hi3660 Mailbox Controller");
29862306a36Sopenharmony_ciMODULE_AUTHOR("Leo Yan <leo.yan@linaro.org>");
299