162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * PNI RM3100 3-axis geomagnetic sensor driver core. 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2018 Song Qiang <songqiang1304521@gmail.com> 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * User Manual available at 862306a36Sopenharmony_ci * <https://www.pnicorp.com/download/rm3100-user-manual/> 962306a36Sopenharmony_ci * 1062306a36Sopenharmony_ci * TODO: event generation, pm. 1162306a36Sopenharmony_ci */ 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#include <linux/delay.h> 1462306a36Sopenharmony_ci#include <linux/interrupt.h> 1562306a36Sopenharmony_ci#include <linux/module.h> 1662306a36Sopenharmony_ci#include <linux/slab.h> 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci#include <linux/iio/buffer.h> 1962306a36Sopenharmony_ci#include <linux/iio/iio.h> 2062306a36Sopenharmony_ci#include <linux/iio/sysfs.h> 2162306a36Sopenharmony_ci#include <linux/iio/trigger.h> 2262306a36Sopenharmony_ci#include <linux/iio/triggered_buffer.h> 2362306a36Sopenharmony_ci#include <linux/iio/trigger_consumer.h> 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci#include <asm/unaligned.h> 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci#include "rm3100.h" 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci/* Cycle Count Registers. */ 3062306a36Sopenharmony_ci#define RM3100_REG_CC_X 0x05 3162306a36Sopenharmony_ci#define RM3100_REG_CC_Y 0x07 3262306a36Sopenharmony_ci#define RM3100_REG_CC_Z 0x09 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci/* Poll Measurement Mode register. */ 3562306a36Sopenharmony_ci#define RM3100_REG_POLL 0x00 3662306a36Sopenharmony_ci#define RM3100_POLL_X BIT(4) 3762306a36Sopenharmony_ci#define RM3100_POLL_Y BIT(5) 3862306a36Sopenharmony_ci#define RM3100_POLL_Z BIT(6) 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci/* Continuous Measurement Mode register. */ 4162306a36Sopenharmony_ci#define RM3100_REG_CMM 0x01 4262306a36Sopenharmony_ci#define RM3100_CMM_START BIT(0) 4362306a36Sopenharmony_ci#define RM3100_CMM_X BIT(4) 4462306a36Sopenharmony_ci#define RM3100_CMM_Y BIT(5) 4562306a36Sopenharmony_ci#define RM3100_CMM_Z BIT(6) 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci/* TiMe Rate Configuration register. */ 4862306a36Sopenharmony_ci#define RM3100_REG_TMRC 0x0B 4962306a36Sopenharmony_ci#define RM3100_TMRC_OFFSET 0x92 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci/* Result Status register. */ 5262306a36Sopenharmony_ci#define RM3100_REG_STATUS 0x34 5362306a36Sopenharmony_ci#define RM3100_STATUS_DRDY BIT(7) 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci/* Measurement result registers. */ 5662306a36Sopenharmony_ci#define RM3100_REG_MX2 0x24 5762306a36Sopenharmony_ci#define RM3100_REG_MY2 0x27 5862306a36Sopenharmony_ci#define RM3100_REG_MZ2 0x2a 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci#define RM3100_W_REG_START RM3100_REG_POLL 6162306a36Sopenharmony_ci#define RM3100_W_REG_END RM3100_REG_TMRC 6262306a36Sopenharmony_ci#define RM3100_R_REG_START RM3100_REG_POLL 6362306a36Sopenharmony_ci#define RM3100_R_REG_END RM3100_REG_STATUS 6462306a36Sopenharmony_ci#define RM3100_V_REG_START RM3100_REG_POLL 6562306a36Sopenharmony_ci#define RM3100_V_REG_END RM3100_REG_STATUS 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci/* 6862306a36Sopenharmony_ci * This is computed by hand, is the sum of channel storage bits and padding 6962306a36Sopenharmony_ci * bits, which is 4+4+4+12=24 in here. 7062306a36Sopenharmony_ci */ 7162306a36Sopenharmony_ci#define RM3100_SCAN_BYTES 24 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci#define RM3100_CMM_AXIS_SHIFT 4 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_cistruct rm3100_data { 7662306a36Sopenharmony_ci struct regmap *regmap; 7762306a36Sopenharmony_ci struct completion measuring_done; 7862306a36Sopenharmony_ci bool use_interrupt; 7962306a36Sopenharmony_ci int conversion_time; 8062306a36Sopenharmony_ci int scale; 8162306a36Sopenharmony_ci /* Ensure naturally aligned timestamp */ 8262306a36Sopenharmony_ci u8 buffer[RM3100_SCAN_BYTES] __aligned(8); 8362306a36Sopenharmony_ci struct iio_trigger *drdy_trig; 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci /* 8662306a36Sopenharmony_ci * This lock is for protecting the consistency of series of i2c 8762306a36Sopenharmony_ci * operations, that is, to make sure a measurement process will 8862306a36Sopenharmony_ci * not be interrupted by a set frequency operation, which should 8962306a36Sopenharmony_ci * be taken where a series of i2c operation starts, released where 9062306a36Sopenharmony_ci * the operation ends. 9162306a36Sopenharmony_ci */ 9262306a36Sopenharmony_ci struct mutex lock; 9362306a36Sopenharmony_ci}; 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_cistatic const struct regmap_range rm3100_readable_ranges[] = { 9662306a36Sopenharmony_ci regmap_reg_range(RM3100_R_REG_START, RM3100_R_REG_END), 9762306a36Sopenharmony_ci}; 9862306a36Sopenharmony_ci 9962306a36Sopenharmony_ciconst struct regmap_access_table rm3100_readable_table = { 10062306a36Sopenharmony_ci .yes_ranges = rm3100_readable_ranges, 10162306a36Sopenharmony_ci .n_yes_ranges = ARRAY_SIZE(rm3100_readable_ranges), 10262306a36Sopenharmony_ci}; 10362306a36Sopenharmony_ciEXPORT_SYMBOL_NS_GPL(rm3100_readable_table, IIO_RM3100); 10462306a36Sopenharmony_ci 10562306a36Sopenharmony_cistatic const struct regmap_range rm3100_writable_ranges[] = { 10662306a36Sopenharmony_ci regmap_reg_range(RM3100_W_REG_START, RM3100_W_REG_END), 10762306a36Sopenharmony_ci}; 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_ciconst struct regmap_access_table rm3100_writable_table = { 11062306a36Sopenharmony_ci .yes_ranges = rm3100_writable_ranges, 11162306a36Sopenharmony_ci .n_yes_ranges = ARRAY_SIZE(rm3100_writable_ranges), 11262306a36Sopenharmony_ci}; 11362306a36Sopenharmony_ciEXPORT_SYMBOL_NS_GPL(rm3100_writable_table, IIO_RM3100); 11462306a36Sopenharmony_ci 11562306a36Sopenharmony_cistatic const struct regmap_range rm3100_volatile_ranges[] = { 11662306a36Sopenharmony_ci regmap_reg_range(RM3100_V_REG_START, RM3100_V_REG_END), 11762306a36Sopenharmony_ci}; 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_ciconst struct regmap_access_table rm3100_volatile_table = { 12062306a36Sopenharmony_ci .yes_ranges = rm3100_volatile_ranges, 12162306a36Sopenharmony_ci .n_yes_ranges = ARRAY_SIZE(rm3100_volatile_ranges), 12262306a36Sopenharmony_ci}; 12362306a36Sopenharmony_ciEXPORT_SYMBOL_NS_GPL(rm3100_volatile_table, IIO_RM3100); 12462306a36Sopenharmony_ci 12562306a36Sopenharmony_cistatic irqreturn_t rm3100_thread_fn(int irq, void *d) 12662306a36Sopenharmony_ci{ 12762306a36Sopenharmony_ci struct iio_dev *indio_dev = d; 12862306a36Sopenharmony_ci struct rm3100_data *data = iio_priv(indio_dev); 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_ci /* 13162306a36Sopenharmony_ci * Write operation to any register or read operation 13262306a36Sopenharmony_ci * to first byte of results will clear the interrupt. 13362306a36Sopenharmony_ci */ 13462306a36Sopenharmony_ci regmap_write(data->regmap, RM3100_REG_POLL, 0); 13562306a36Sopenharmony_ci 13662306a36Sopenharmony_ci return IRQ_HANDLED; 13762306a36Sopenharmony_ci} 13862306a36Sopenharmony_ci 13962306a36Sopenharmony_cistatic irqreturn_t rm3100_irq_handler(int irq, void *d) 14062306a36Sopenharmony_ci{ 14162306a36Sopenharmony_ci struct iio_dev *indio_dev = d; 14262306a36Sopenharmony_ci struct rm3100_data *data = iio_priv(indio_dev); 14362306a36Sopenharmony_ci 14462306a36Sopenharmony_ci if (!iio_buffer_enabled(indio_dev)) 14562306a36Sopenharmony_ci complete(&data->measuring_done); 14662306a36Sopenharmony_ci else 14762306a36Sopenharmony_ci iio_trigger_poll(data->drdy_trig); 14862306a36Sopenharmony_ci 14962306a36Sopenharmony_ci return IRQ_WAKE_THREAD; 15062306a36Sopenharmony_ci} 15162306a36Sopenharmony_ci 15262306a36Sopenharmony_cistatic int rm3100_wait_measurement(struct rm3100_data *data) 15362306a36Sopenharmony_ci{ 15462306a36Sopenharmony_ci struct regmap *regmap = data->regmap; 15562306a36Sopenharmony_ci unsigned int val; 15662306a36Sopenharmony_ci int tries = 20; 15762306a36Sopenharmony_ci int ret; 15862306a36Sopenharmony_ci 15962306a36Sopenharmony_ci /* 16062306a36Sopenharmony_ci * A read cycle of 400kbits i2c bus is about 20us, plus the time 16162306a36Sopenharmony_ci * used for scheduling, a read cycle of fast mode of this device 16262306a36Sopenharmony_ci * can reach 1.7ms, it may be possible for data to arrive just 16362306a36Sopenharmony_ci * after we check the RM3100_REG_STATUS. In this case, irq_handler is 16462306a36Sopenharmony_ci * called before measuring_done is reinitialized, it will wait 16562306a36Sopenharmony_ci * forever for data that has already been ready. 16662306a36Sopenharmony_ci * Reinitialize measuring_done before looking up makes sure we 16762306a36Sopenharmony_ci * will always capture interrupt no matter when it happens. 16862306a36Sopenharmony_ci */ 16962306a36Sopenharmony_ci if (data->use_interrupt) 17062306a36Sopenharmony_ci reinit_completion(&data->measuring_done); 17162306a36Sopenharmony_ci 17262306a36Sopenharmony_ci ret = regmap_read(regmap, RM3100_REG_STATUS, &val); 17362306a36Sopenharmony_ci if (ret < 0) 17462306a36Sopenharmony_ci return ret; 17562306a36Sopenharmony_ci 17662306a36Sopenharmony_ci if ((val & RM3100_STATUS_DRDY) != RM3100_STATUS_DRDY) { 17762306a36Sopenharmony_ci if (data->use_interrupt) { 17862306a36Sopenharmony_ci ret = wait_for_completion_timeout(&data->measuring_done, 17962306a36Sopenharmony_ci msecs_to_jiffies(data->conversion_time)); 18062306a36Sopenharmony_ci if (!ret) 18162306a36Sopenharmony_ci return -ETIMEDOUT; 18262306a36Sopenharmony_ci } else { 18362306a36Sopenharmony_ci do { 18462306a36Sopenharmony_ci usleep_range(1000, 5000); 18562306a36Sopenharmony_ci 18662306a36Sopenharmony_ci ret = regmap_read(regmap, RM3100_REG_STATUS, 18762306a36Sopenharmony_ci &val); 18862306a36Sopenharmony_ci if (ret < 0) 18962306a36Sopenharmony_ci return ret; 19062306a36Sopenharmony_ci 19162306a36Sopenharmony_ci if (val & RM3100_STATUS_DRDY) 19262306a36Sopenharmony_ci break; 19362306a36Sopenharmony_ci } while (--tries); 19462306a36Sopenharmony_ci if (!tries) 19562306a36Sopenharmony_ci return -ETIMEDOUT; 19662306a36Sopenharmony_ci } 19762306a36Sopenharmony_ci } 19862306a36Sopenharmony_ci return 0; 19962306a36Sopenharmony_ci} 20062306a36Sopenharmony_ci 20162306a36Sopenharmony_cistatic int rm3100_read_mag(struct rm3100_data *data, int idx, int *val) 20262306a36Sopenharmony_ci{ 20362306a36Sopenharmony_ci struct regmap *regmap = data->regmap; 20462306a36Sopenharmony_ci u8 buffer[3]; 20562306a36Sopenharmony_ci int ret; 20662306a36Sopenharmony_ci 20762306a36Sopenharmony_ci mutex_lock(&data->lock); 20862306a36Sopenharmony_ci ret = regmap_write(regmap, RM3100_REG_POLL, BIT(4 + idx)); 20962306a36Sopenharmony_ci if (ret < 0) 21062306a36Sopenharmony_ci goto unlock_return; 21162306a36Sopenharmony_ci 21262306a36Sopenharmony_ci ret = rm3100_wait_measurement(data); 21362306a36Sopenharmony_ci if (ret < 0) 21462306a36Sopenharmony_ci goto unlock_return; 21562306a36Sopenharmony_ci 21662306a36Sopenharmony_ci ret = regmap_bulk_read(regmap, RM3100_REG_MX2 + 3 * idx, buffer, 3); 21762306a36Sopenharmony_ci if (ret < 0) 21862306a36Sopenharmony_ci goto unlock_return; 21962306a36Sopenharmony_ci mutex_unlock(&data->lock); 22062306a36Sopenharmony_ci 22162306a36Sopenharmony_ci *val = sign_extend32(get_unaligned_be24(&buffer[0]), 23); 22262306a36Sopenharmony_ci 22362306a36Sopenharmony_ci return IIO_VAL_INT; 22462306a36Sopenharmony_ci 22562306a36Sopenharmony_ciunlock_return: 22662306a36Sopenharmony_ci mutex_unlock(&data->lock); 22762306a36Sopenharmony_ci return ret; 22862306a36Sopenharmony_ci} 22962306a36Sopenharmony_ci 23062306a36Sopenharmony_ci#define RM3100_CHANNEL(axis, idx) \ 23162306a36Sopenharmony_ci { \ 23262306a36Sopenharmony_ci .type = IIO_MAGN, \ 23362306a36Sopenharmony_ci .modified = 1, \ 23462306a36Sopenharmony_ci .channel2 = IIO_MOD_##axis, \ 23562306a36Sopenharmony_ci .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 23662306a36Sopenharmony_ci .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 23762306a36Sopenharmony_ci BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 23862306a36Sopenharmony_ci .scan_index = idx, \ 23962306a36Sopenharmony_ci .scan_type = { \ 24062306a36Sopenharmony_ci .sign = 's', \ 24162306a36Sopenharmony_ci .realbits = 24, \ 24262306a36Sopenharmony_ci .storagebits = 32, \ 24362306a36Sopenharmony_ci .shift = 8, \ 24462306a36Sopenharmony_ci .endianness = IIO_BE, \ 24562306a36Sopenharmony_ci }, \ 24662306a36Sopenharmony_ci } 24762306a36Sopenharmony_ci 24862306a36Sopenharmony_cistatic const struct iio_chan_spec rm3100_channels[] = { 24962306a36Sopenharmony_ci RM3100_CHANNEL(X, 0), 25062306a36Sopenharmony_ci RM3100_CHANNEL(Y, 1), 25162306a36Sopenharmony_ci RM3100_CHANNEL(Z, 2), 25262306a36Sopenharmony_ci IIO_CHAN_SOFT_TIMESTAMP(3), 25362306a36Sopenharmony_ci}; 25462306a36Sopenharmony_ci 25562306a36Sopenharmony_cistatic IIO_CONST_ATTR_SAMP_FREQ_AVAIL( 25662306a36Sopenharmony_ci "600 300 150 75 37 18 9 4.5 2.3 1.2 0.6 0.3 0.015 0.075" 25762306a36Sopenharmony_ci); 25862306a36Sopenharmony_ci 25962306a36Sopenharmony_cistatic struct attribute *rm3100_attributes[] = { 26062306a36Sopenharmony_ci &iio_const_attr_sampling_frequency_available.dev_attr.attr, 26162306a36Sopenharmony_ci NULL, 26262306a36Sopenharmony_ci}; 26362306a36Sopenharmony_ci 26462306a36Sopenharmony_cistatic const struct attribute_group rm3100_attribute_group = { 26562306a36Sopenharmony_ci .attrs = rm3100_attributes, 26662306a36Sopenharmony_ci}; 26762306a36Sopenharmony_ci 26862306a36Sopenharmony_ci#define RM3100_SAMP_NUM 14 26962306a36Sopenharmony_ci 27062306a36Sopenharmony_ci/* 27162306a36Sopenharmony_ci * Frequency : rm3100_samp_rates[][0].rm3100_samp_rates[][1]Hz. 27262306a36Sopenharmony_ci * Time between reading: rm3100_sam_rates[][2]ms. 27362306a36Sopenharmony_ci * The first one is actually 1.7ms. 27462306a36Sopenharmony_ci */ 27562306a36Sopenharmony_cistatic const int rm3100_samp_rates[RM3100_SAMP_NUM][3] = { 27662306a36Sopenharmony_ci {600, 0, 2}, {300, 0, 3}, {150, 0, 7}, {75, 0, 13}, {37, 0, 27}, 27762306a36Sopenharmony_ci {18, 0, 55}, {9, 0, 110}, {4, 500000, 220}, {2, 300000, 440}, 27862306a36Sopenharmony_ci {1, 200000, 800}, {0, 600000, 1600}, {0, 300000, 3300}, 27962306a36Sopenharmony_ci {0, 15000, 6700}, {0, 75000, 13000} 28062306a36Sopenharmony_ci}; 28162306a36Sopenharmony_ci 28262306a36Sopenharmony_cistatic int rm3100_get_samp_freq(struct rm3100_data *data, int *val, int *val2) 28362306a36Sopenharmony_ci{ 28462306a36Sopenharmony_ci unsigned int tmp; 28562306a36Sopenharmony_ci int ret; 28662306a36Sopenharmony_ci 28762306a36Sopenharmony_ci mutex_lock(&data->lock); 28862306a36Sopenharmony_ci ret = regmap_read(data->regmap, RM3100_REG_TMRC, &tmp); 28962306a36Sopenharmony_ci mutex_unlock(&data->lock); 29062306a36Sopenharmony_ci if (ret < 0) 29162306a36Sopenharmony_ci return ret; 29262306a36Sopenharmony_ci *val = rm3100_samp_rates[tmp - RM3100_TMRC_OFFSET][0]; 29362306a36Sopenharmony_ci *val2 = rm3100_samp_rates[tmp - RM3100_TMRC_OFFSET][1]; 29462306a36Sopenharmony_ci 29562306a36Sopenharmony_ci return IIO_VAL_INT_PLUS_MICRO; 29662306a36Sopenharmony_ci} 29762306a36Sopenharmony_ci 29862306a36Sopenharmony_cistatic int rm3100_set_cycle_count(struct rm3100_data *data, int val) 29962306a36Sopenharmony_ci{ 30062306a36Sopenharmony_ci int ret; 30162306a36Sopenharmony_ci u8 i; 30262306a36Sopenharmony_ci 30362306a36Sopenharmony_ci for (i = 0; i < 3; i++) { 30462306a36Sopenharmony_ci ret = regmap_write(data->regmap, RM3100_REG_CC_X + 2 * i, val); 30562306a36Sopenharmony_ci if (ret < 0) 30662306a36Sopenharmony_ci return ret; 30762306a36Sopenharmony_ci } 30862306a36Sopenharmony_ci 30962306a36Sopenharmony_ci /* 31062306a36Sopenharmony_ci * The scale of this sensor depends on the cycle count value, these 31162306a36Sopenharmony_ci * three values are corresponding to the cycle count value 50, 100, 31262306a36Sopenharmony_ci * 200. scale = output / gain * 10^4. 31362306a36Sopenharmony_ci */ 31462306a36Sopenharmony_ci switch (val) { 31562306a36Sopenharmony_ci case 50: 31662306a36Sopenharmony_ci data->scale = 500; 31762306a36Sopenharmony_ci break; 31862306a36Sopenharmony_ci case 100: 31962306a36Sopenharmony_ci data->scale = 263; 32062306a36Sopenharmony_ci break; 32162306a36Sopenharmony_ci /* 32262306a36Sopenharmony_ci * case 200: 32362306a36Sopenharmony_ci * This function will never be called by users' code, so here we 32462306a36Sopenharmony_ci * assume that it will never get a wrong parameter. 32562306a36Sopenharmony_ci */ 32662306a36Sopenharmony_ci default: 32762306a36Sopenharmony_ci data->scale = 133; 32862306a36Sopenharmony_ci } 32962306a36Sopenharmony_ci 33062306a36Sopenharmony_ci return 0; 33162306a36Sopenharmony_ci} 33262306a36Sopenharmony_ci 33362306a36Sopenharmony_cistatic int rm3100_set_samp_freq(struct iio_dev *indio_dev, int val, int val2) 33462306a36Sopenharmony_ci{ 33562306a36Sopenharmony_ci struct rm3100_data *data = iio_priv(indio_dev); 33662306a36Sopenharmony_ci struct regmap *regmap = data->regmap; 33762306a36Sopenharmony_ci unsigned int cycle_count; 33862306a36Sopenharmony_ci int ret; 33962306a36Sopenharmony_ci int i; 34062306a36Sopenharmony_ci 34162306a36Sopenharmony_ci mutex_lock(&data->lock); 34262306a36Sopenharmony_ci /* All cycle count registers use the same value. */ 34362306a36Sopenharmony_ci ret = regmap_read(regmap, RM3100_REG_CC_X, &cycle_count); 34462306a36Sopenharmony_ci if (ret < 0) 34562306a36Sopenharmony_ci goto unlock_return; 34662306a36Sopenharmony_ci 34762306a36Sopenharmony_ci for (i = 0; i < RM3100_SAMP_NUM; i++) { 34862306a36Sopenharmony_ci if (val == rm3100_samp_rates[i][0] && 34962306a36Sopenharmony_ci val2 == rm3100_samp_rates[i][1]) 35062306a36Sopenharmony_ci break; 35162306a36Sopenharmony_ci } 35262306a36Sopenharmony_ci if (i == RM3100_SAMP_NUM) { 35362306a36Sopenharmony_ci ret = -EINVAL; 35462306a36Sopenharmony_ci goto unlock_return; 35562306a36Sopenharmony_ci } 35662306a36Sopenharmony_ci 35762306a36Sopenharmony_ci ret = regmap_write(regmap, RM3100_REG_TMRC, i + RM3100_TMRC_OFFSET); 35862306a36Sopenharmony_ci if (ret < 0) 35962306a36Sopenharmony_ci goto unlock_return; 36062306a36Sopenharmony_ci 36162306a36Sopenharmony_ci /* Checking if cycle count registers need changing. */ 36262306a36Sopenharmony_ci if (val == 600 && cycle_count == 200) { 36362306a36Sopenharmony_ci ret = rm3100_set_cycle_count(data, 100); 36462306a36Sopenharmony_ci if (ret < 0) 36562306a36Sopenharmony_ci goto unlock_return; 36662306a36Sopenharmony_ci } else if (val != 600 && cycle_count == 100) { 36762306a36Sopenharmony_ci ret = rm3100_set_cycle_count(data, 200); 36862306a36Sopenharmony_ci if (ret < 0) 36962306a36Sopenharmony_ci goto unlock_return; 37062306a36Sopenharmony_ci } 37162306a36Sopenharmony_ci 37262306a36Sopenharmony_ci if (iio_buffer_enabled(indio_dev)) { 37362306a36Sopenharmony_ci /* Writing TMRC registers requires CMM reset. */ 37462306a36Sopenharmony_ci ret = regmap_write(regmap, RM3100_REG_CMM, 0); 37562306a36Sopenharmony_ci if (ret < 0) 37662306a36Sopenharmony_ci goto unlock_return; 37762306a36Sopenharmony_ci ret = regmap_write(data->regmap, RM3100_REG_CMM, 37862306a36Sopenharmony_ci (*indio_dev->active_scan_mask & 0x7) << 37962306a36Sopenharmony_ci RM3100_CMM_AXIS_SHIFT | RM3100_CMM_START); 38062306a36Sopenharmony_ci if (ret < 0) 38162306a36Sopenharmony_ci goto unlock_return; 38262306a36Sopenharmony_ci } 38362306a36Sopenharmony_ci mutex_unlock(&data->lock); 38462306a36Sopenharmony_ci 38562306a36Sopenharmony_ci data->conversion_time = rm3100_samp_rates[i][2] * 2; 38662306a36Sopenharmony_ci return 0; 38762306a36Sopenharmony_ci 38862306a36Sopenharmony_ciunlock_return: 38962306a36Sopenharmony_ci mutex_unlock(&data->lock); 39062306a36Sopenharmony_ci return ret; 39162306a36Sopenharmony_ci} 39262306a36Sopenharmony_ci 39362306a36Sopenharmony_cistatic int rm3100_read_raw(struct iio_dev *indio_dev, 39462306a36Sopenharmony_ci const struct iio_chan_spec *chan, 39562306a36Sopenharmony_ci int *val, int *val2, long mask) 39662306a36Sopenharmony_ci{ 39762306a36Sopenharmony_ci struct rm3100_data *data = iio_priv(indio_dev); 39862306a36Sopenharmony_ci int ret; 39962306a36Sopenharmony_ci 40062306a36Sopenharmony_ci switch (mask) { 40162306a36Sopenharmony_ci case IIO_CHAN_INFO_RAW: 40262306a36Sopenharmony_ci ret = iio_device_claim_direct_mode(indio_dev); 40362306a36Sopenharmony_ci if (ret < 0) 40462306a36Sopenharmony_ci return ret; 40562306a36Sopenharmony_ci 40662306a36Sopenharmony_ci ret = rm3100_read_mag(data, chan->scan_index, val); 40762306a36Sopenharmony_ci iio_device_release_direct_mode(indio_dev); 40862306a36Sopenharmony_ci 40962306a36Sopenharmony_ci return ret; 41062306a36Sopenharmony_ci case IIO_CHAN_INFO_SCALE: 41162306a36Sopenharmony_ci *val = 0; 41262306a36Sopenharmony_ci *val2 = data->scale; 41362306a36Sopenharmony_ci 41462306a36Sopenharmony_ci return IIO_VAL_INT_PLUS_MICRO; 41562306a36Sopenharmony_ci case IIO_CHAN_INFO_SAMP_FREQ: 41662306a36Sopenharmony_ci return rm3100_get_samp_freq(data, val, val2); 41762306a36Sopenharmony_ci default: 41862306a36Sopenharmony_ci return -EINVAL; 41962306a36Sopenharmony_ci } 42062306a36Sopenharmony_ci} 42162306a36Sopenharmony_ci 42262306a36Sopenharmony_cistatic int rm3100_write_raw(struct iio_dev *indio_dev, 42362306a36Sopenharmony_ci struct iio_chan_spec const *chan, 42462306a36Sopenharmony_ci int val, int val2, long mask) 42562306a36Sopenharmony_ci{ 42662306a36Sopenharmony_ci switch (mask) { 42762306a36Sopenharmony_ci case IIO_CHAN_INFO_SAMP_FREQ: 42862306a36Sopenharmony_ci return rm3100_set_samp_freq(indio_dev, val, val2); 42962306a36Sopenharmony_ci default: 43062306a36Sopenharmony_ci return -EINVAL; 43162306a36Sopenharmony_ci } 43262306a36Sopenharmony_ci} 43362306a36Sopenharmony_ci 43462306a36Sopenharmony_cistatic const struct iio_info rm3100_info = { 43562306a36Sopenharmony_ci .attrs = &rm3100_attribute_group, 43662306a36Sopenharmony_ci .read_raw = rm3100_read_raw, 43762306a36Sopenharmony_ci .write_raw = rm3100_write_raw, 43862306a36Sopenharmony_ci}; 43962306a36Sopenharmony_ci 44062306a36Sopenharmony_cistatic int rm3100_buffer_preenable(struct iio_dev *indio_dev) 44162306a36Sopenharmony_ci{ 44262306a36Sopenharmony_ci struct rm3100_data *data = iio_priv(indio_dev); 44362306a36Sopenharmony_ci 44462306a36Sopenharmony_ci /* Starting channels enabled. */ 44562306a36Sopenharmony_ci return regmap_write(data->regmap, RM3100_REG_CMM, 44662306a36Sopenharmony_ci (*indio_dev->active_scan_mask & 0x7) << RM3100_CMM_AXIS_SHIFT | 44762306a36Sopenharmony_ci RM3100_CMM_START); 44862306a36Sopenharmony_ci} 44962306a36Sopenharmony_ci 45062306a36Sopenharmony_cistatic int rm3100_buffer_postdisable(struct iio_dev *indio_dev) 45162306a36Sopenharmony_ci{ 45262306a36Sopenharmony_ci struct rm3100_data *data = iio_priv(indio_dev); 45362306a36Sopenharmony_ci 45462306a36Sopenharmony_ci return regmap_write(data->regmap, RM3100_REG_CMM, 0); 45562306a36Sopenharmony_ci} 45662306a36Sopenharmony_ci 45762306a36Sopenharmony_cistatic const struct iio_buffer_setup_ops rm3100_buffer_ops = { 45862306a36Sopenharmony_ci .preenable = rm3100_buffer_preenable, 45962306a36Sopenharmony_ci .postdisable = rm3100_buffer_postdisable, 46062306a36Sopenharmony_ci}; 46162306a36Sopenharmony_ci 46262306a36Sopenharmony_cistatic irqreturn_t rm3100_trigger_handler(int irq, void *p) 46362306a36Sopenharmony_ci{ 46462306a36Sopenharmony_ci struct iio_poll_func *pf = p; 46562306a36Sopenharmony_ci struct iio_dev *indio_dev = pf->indio_dev; 46662306a36Sopenharmony_ci unsigned long scan_mask = *indio_dev->active_scan_mask; 46762306a36Sopenharmony_ci unsigned int mask_len = indio_dev->masklength; 46862306a36Sopenharmony_ci struct rm3100_data *data = iio_priv(indio_dev); 46962306a36Sopenharmony_ci struct regmap *regmap = data->regmap; 47062306a36Sopenharmony_ci int ret, i, bit; 47162306a36Sopenharmony_ci 47262306a36Sopenharmony_ci mutex_lock(&data->lock); 47362306a36Sopenharmony_ci switch (scan_mask) { 47462306a36Sopenharmony_ci case BIT(0) | BIT(1) | BIT(2): 47562306a36Sopenharmony_ci ret = regmap_bulk_read(regmap, RM3100_REG_MX2, data->buffer, 9); 47662306a36Sopenharmony_ci mutex_unlock(&data->lock); 47762306a36Sopenharmony_ci if (ret < 0) 47862306a36Sopenharmony_ci goto done; 47962306a36Sopenharmony_ci /* Convert XXXYYYZZZxxx to XXXxYYYxZZZx. x for paddings. */ 48062306a36Sopenharmony_ci for (i = 2; i > 0; i--) 48162306a36Sopenharmony_ci memmove(data->buffer + i * 4, data->buffer + i * 3, 3); 48262306a36Sopenharmony_ci break; 48362306a36Sopenharmony_ci case BIT(0) | BIT(1): 48462306a36Sopenharmony_ci ret = regmap_bulk_read(regmap, RM3100_REG_MX2, data->buffer, 6); 48562306a36Sopenharmony_ci mutex_unlock(&data->lock); 48662306a36Sopenharmony_ci if (ret < 0) 48762306a36Sopenharmony_ci goto done; 48862306a36Sopenharmony_ci memmove(data->buffer + 4, data->buffer + 3, 3); 48962306a36Sopenharmony_ci break; 49062306a36Sopenharmony_ci case BIT(1) | BIT(2): 49162306a36Sopenharmony_ci ret = regmap_bulk_read(regmap, RM3100_REG_MY2, data->buffer, 6); 49262306a36Sopenharmony_ci mutex_unlock(&data->lock); 49362306a36Sopenharmony_ci if (ret < 0) 49462306a36Sopenharmony_ci goto done; 49562306a36Sopenharmony_ci memmove(data->buffer + 4, data->buffer + 3, 3); 49662306a36Sopenharmony_ci break; 49762306a36Sopenharmony_ci case BIT(0) | BIT(2): 49862306a36Sopenharmony_ci ret = regmap_bulk_read(regmap, RM3100_REG_MX2, data->buffer, 9); 49962306a36Sopenharmony_ci mutex_unlock(&data->lock); 50062306a36Sopenharmony_ci if (ret < 0) 50162306a36Sopenharmony_ci goto done; 50262306a36Sopenharmony_ci memmove(data->buffer + 4, data->buffer + 6, 3); 50362306a36Sopenharmony_ci break; 50462306a36Sopenharmony_ci default: 50562306a36Sopenharmony_ci for_each_set_bit(bit, &scan_mask, mask_len) { 50662306a36Sopenharmony_ci ret = regmap_bulk_read(regmap, RM3100_REG_MX2 + 3 * bit, 50762306a36Sopenharmony_ci data->buffer, 3); 50862306a36Sopenharmony_ci if (ret < 0) { 50962306a36Sopenharmony_ci mutex_unlock(&data->lock); 51062306a36Sopenharmony_ci goto done; 51162306a36Sopenharmony_ci } 51262306a36Sopenharmony_ci } 51362306a36Sopenharmony_ci mutex_unlock(&data->lock); 51462306a36Sopenharmony_ci } 51562306a36Sopenharmony_ci /* 51662306a36Sopenharmony_ci * Always using the same buffer so that we wouldn't need to set the 51762306a36Sopenharmony_ci * paddings to 0 in case of leaking any data. 51862306a36Sopenharmony_ci */ 51962306a36Sopenharmony_ci iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, 52062306a36Sopenharmony_ci pf->timestamp); 52162306a36Sopenharmony_cidone: 52262306a36Sopenharmony_ci iio_trigger_notify_done(indio_dev->trig); 52362306a36Sopenharmony_ci 52462306a36Sopenharmony_ci return IRQ_HANDLED; 52562306a36Sopenharmony_ci} 52662306a36Sopenharmony_ci 52762306a36Sopenharmony_ciint rm3100_common_probe(struct device *dev, struct regmap *regmap, int irq) 52862306a36Sopenharmony_ci{ 52962306a36Sopenharmony_ci struct iio_dev *indio_dev; 53062306a36Sopenharmony_ci struct rm3100_data *data; 53162306a36Sopenharmony_ci unsigned int tmp; 53262306a36Sopenharmony_ci int ret; 53362306a36Sopenharmony_ci int samp_rate_index; 53462306a36Sopenharmony_ci 53562306a36Sopenharmony_ci indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 53662306a36Sopenharmony_ci if (!indio_dev) 53762306a36Sopenharmony_ci return -ENOMEM; 53862306a36Sopenharmony_ci 53962306a36Sopenharmony_ci data = iio_priv(indio_dev); 54062306a36Sopenharmony_ci data->regmap = regmap; 54162306a36Sopenharmony_ci 54262306a36Sopenharmony_ci mutex_init(&data->lock); 54362306a36Sopenharmony_ci 54462306a36Sopenharmony_ci indio_dev->name = "rm3100"; 54562306a36Sopenharmony_ci indio_dev->info = &rm3100_info; 54662306a36Sopenharmony_ci indio_dev->channels = rm3100_channels; 54762306a36Sopenharmony_ci indio_dev->num_channels = ARRAY_SIZE(rm3100_channels); 54862306a36Sopenharmony_ci indio_dev->modes = INDIO_DIRECT_MODE; 54962306a36Sopenharmony_ci 55062306a36Sopenharmony_ci if (!irq) 55162306a36Sopenharmony_ci data->use_interrupt = false; 55262306a36Sopenharmony_ci else { 55362306a36Sopenharmony_ci data->use_interrupt = true; 55462306a36Sopenharmony_ci 55562306a36Sopenharmony_ci init_completion(&data->measuring_done); 55662306a36Sopenharmony_ci ret = devm_request_threaded_irq(dev, 55762306a36Sopenharmony_ci irq, 55862306a36Sopenharmony_ci rm3100_irq_handler, 55962306a36Sopenharmony_ci rm3100_thread_fn, 56062306a36Sopenharmony_ci IRQF_TRIGGER_HIGH | 56162306a36Sopenharmony_ci IRQF_ONESHOT, 56262306a36Sopenharmony_ci indio_dev->name, 56362306a36Sopenharmony_ci indio_dev); 56462306a36Sopenharmony_ci if (ret < 0) { 56562306a36Sopenharmony_ci dev_err(dev, "request irq line failed.\n"); 56662306a36Sopenharmony_ci return ret; 56762306a36Sopenharmony_ci } 56862306a36Sopenharmony_ci 56962306a36Sopenharmony_ci data->drdy_trig = devm_iio_trigger_alloc(dev, "%s-drdy%d", 57062306a36Sopenharmony_ci indio_dev->name, 57162306a36Sopenharmony_ci iio_device_id(indio_dev)); 57262306a36Sopenharmony_ci if (!data->drdy_trig) 57362306a36Sopenharmony_ci return -ENOMEM; 57462306a36Sopenharmony_ci 57562306a36Sopenharmony_ci ret = devm_iio_trigger_register(dev, data->drdy_trig); 57662306a36Sopenharmony_ci if (ret < 0) 57762306a36Sopenharmony_ci return ret; 57862306a36Sopenharmony_ci } 57962306a36Sopenharmony_ci 58062306a36Sopenharmony_ci ret = devm_iio_triggered_buffer_setup(dev, indio_dev, 58162306a36Sopenharmony_ci &iio_pollfunc_store_time, 58262306a36Sopenharmony_ci rm3100_trigger_handler, 58362306a36Sopenharmony_ci &rm3100_buffer_ops); 58462306a36Sopenharmony_ci if (ret < 0) 58562306a36Sopenharmony_ci return ret; 58662306a36Sopenharmony_ci 58762306a36Sopenharmony_ci ret = regmap_read(regmap, RM3100_REG_TMRC, &tmp); 58862306a36Sopenharmony_ci if (ret < 0) 58962306a36Sopenharmony_ci return ret; 59062306a36Sopenharmony_ci 59162306a36Sopenharmony_ci samp_rate_index = tmp - RM3100_TMRC_OFFSET; 59262306a36Sopenharmony_ci if (samp_rate_index < 0 || samp_rate_index >= RM3100_SAMP_NUM) { 59362306a36Sopenharmony_ci dev_err(dev, "The value read from RM3100_REG_TMRC is invalid!\n"); 59462306a36Sopenharmony_ci return -EINVAL; 59562306a36Sopenharmony_ci } 59662306a36Sopenharmony_ci /* Initializing max wait time, which is double conversion time. */ 59762306a36Sopenharmony_ci data->conversion_time = rm3100_samp_rates[samp_rate_index][2] * 2; 59862306a36Sopenharmony_ci 59962306a36Sopenharmony_ci /* Cycle count values may not be what we want. */ 60062306a36Sopenharmony_ci if ((tmp - RM3100_TMRC_OFFSET) == 0) 60162306a36Sopenharmony_ci rm3100_set_cycle_count(data, 100); 60262306a36Sopenharmony_ci else 60362306a36Sopenharmony_ci rm3100_set_cycle_count(data, 200); 60462306a36Sopenharmony_ci 60562306a36Sopenharmony_ci return devm_iio_device_register(dev, indio_dev); 60662306a36Sopenharmony_ci} 60762306a36Sopenharmony_ciEXPORT_SYMBOL_NS_GPL(rm3100_common_probe, IIO_RM3100); 60862306a36Sopenharmony_ci 60962306a36Sopenharmony_ciMODULE_AUTHOR("Song Qiang <songqiang1304521@gmail.com>"); 61062306a36Sopenharmony_ciMODULE_DESCRIPTION("PNI RM3100 3-axis magnetometer i2c driver"); 61162306a36Sopenharmony_ciMODULE_LICENSE("GPL v2"); 612