162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0+
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * max30100.c - Support for MAX30100 heart rate and pulse oximeter sensor
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2015, 2018
662306a36Sopenharmony_ci * Author: Matt Ranostay <matt.ranostay@konsulko.com>
762306a36Sopenharmony_ci *
862306a36Sopenharmony_ci * TODO: enable pulse length controls via device tree properties
962306a36Sopenharmony_ci */
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci#include <linux/module.h>
1262306a36Sopenharmony_ci#include <linux/init.h>
1362306a36Sopenharmony_ci#include <linux/interrupt.h>
1462306a36Sopenharmony_ci#include <linux/delay.h>
1562306a36Sopenharmony_ci#include <linux/err.h>
1662306a36Sopenharmony_ci#include <linux/irq.h>
1762306a36Sopenharmony_ci#include <linux/i2c.h>
1862306a36Sopenharmony_ci#include <linux/mutex.h>
1962306a36Sopenharmony_ci#include <linux/property.h>
2062306a36Sopenharmony_ci#include <linux/regmap.h>
2162306a36Sopenharmony_ci#include <linux/iio/iio.h>
2262306a36Sopenharmony_ci#include <linux/iio/buffer.h>
2362306a36Sopenharmony_ci#include <linux/iio/kfifo_buf.h>
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci#define MAX30100_REGMAP_NAME	"max30100_regmap"
2662306a36Sopenharmony_ci#define MAX30100_DRV_NAME	"max30100"
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci#define MAX30100_REG_INT_STATUS			0x00
2962306a36Sopenharmony_ci#define MAX30100_REG_INT_STATUS_PWR_RDY		BIT(0)
3062306a36Sopenharmony_ci#define MAX30100_REG_INT_STATUS_SPO2_RDY	BIT(4)
3162306a36Sopenharmony_ci#define MAX30100_REG_INT_STATUS_HR_RDY		BIT(5)
3262306a36Sopenharmony_ci#define MAX30100_REG_INT_STATUS_FIFO_RDY	BIT(7)
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci#define MAX30100_REG_INT_ENABLE			0x01
3562306a36Sopenharmony_ci#define MAX30100_REG_INT_ENABLE_SPO2_EN		BIT(0)
3662306a36Sopenharmony_ci#define MAX30100_REG_INT_ENABLE_HR_EN		BIT(1)
3762306a36Sopenharmony_ci#define MAX30100_REG_INT_ENABLE_FIFO_EN		BIT(3)
3862306a36Sopenharmony_ci#define MAX30100_REG_INT_ENABLE_MASK		0xf0
3962306a36Sopenharmony_ci#define MAX30100_REG_INT_ENABLE_MASK_SHIFT	4
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci#define MAX30100_REG_FIFO_WR_PTR		0x02
4262306a36Sopenharmony_ci#define MAX30100_REG_FIFO_OVR_CTR		0x03
4362306a36Sopenharmony_ci#define MAX30100_REG_FIFO_RD_PTR		0x04
4462306a36Sopenharmony_ci#define MAX30100_REG_FIFO_DATA			0x05
4562306a36Sopenharmony_ci#define MAX30100_REG_FIFO_DATA_ENTRY_COUNT	16
4662306a36Sopenharmony_ci#define MAX30100_REG_FIFO_DATA_ENTRY_LEN	4
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG		0x06
4962306a36Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN	BIT(0)
5062306a36Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG_MODE_HR_EN	BIT(1)
5162306a36Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG_MODE_MASK	0x03
5262306a36Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG_TEMP_EN	BIT(3)
5362306a36Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG_PWR		BIT(7)
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci#define MAX30100_REG_SPO2_CONFIG		0x07
5662306a36Sopenharmony_ci#define MAX30100_REG_SPO2_CONFIG_100HZ		BIT(2)
5762306a36Sopenharmony_ci#define MAX30100_REG_SPO2_CONFIG_HI_RES_EN	BIT(6)
5862306a36Sopenharmony_ci#define MAX30100_REG_SPO2_CONFIG_1600US		0x3
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci#define MAX30100_REG_LED_CONFIG			0x09
6162306a36Sopenharmony_ci#define MAX30100_REG_LED_CONFIG_LED_MASK	0x0f
6262306a36Sopenharmony_ci#define MAX30100_REG_LED_CONFIG_RED_LED_SHIFT	4
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci#define MAX30100_REG_LED_CONFIG_24MA		0x07
6562306a36Sopenharmony_ci#define MAX30100_REG_LED_CONFIG_50MA		0x0f
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci#define MAX30100_REG_TEMP_INTEGER		0x16
6862306a36Sopenharmony_ci#define MAX30100_REG_TEMP_FRACTION		0x17
6962306a36Sopenharmony_ci
7062306a36Sopenharmony_cistruct max30100_data {
7162306a36Sopenharmony_ci	struct i2c_client *client;
7262306a36Sopenharmony_ci	struct iio_dev *indio_dev;
7362306a36Sopenharmony_ci	struct mutex lock;
7462306a36Sopenharmony_ci	struct regmap *regmap;
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_ci	__be16 buffer[2]; /* 2 16-bit channels */
7762306a36Sopenharmony_ci};
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_cistatic bool max30100_is_volatile_reg(struct device *dev, unsigned int reg)
8062306a36Sopenharmony_ci{
8162306a36Sopenharmony_ci	switch (reg) {
8262306a36Sopenharmony_ci	case MAX30100_REG_INT_STATUS:
8362306a36Sopenharmony_ci	case MAX30100_REG_MODE_CONFIG:
8462306a36Sopenharmony_ci	case MAX30100_REG_FIFO_WR_PTR:
8562306a36Sopenharmony_ci	case MAX30100_REG_FIFO_OVR_CTR:
8662306a36Sopenharmony_ci	case MAX30100_REG_FIFO_RD_PTR:
8762306a36Sopenharmony_ci	case MAX30100_REG_FIFO_DATA:
8862306a36Sopenharmony_ci	case MAX30100_REG_TEMP_INTEGER:
8962306a36Sopenharmony_ci	case MAX30100_REG_TEMP_FRACTION:
9062306a36Sopenharmony_ci		return true;
9162306a36Sopenharmony_ci	default:
9262306a36Sopenharmony_ci		return false;
9362306a36Sopenharmony_ci	}
9462306a36Sopenharmony_ci}
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_cistatic const struct regmap_config max30100_regmap_config = {
9762306a36Sopenharmony_ci	.name = MAX30100_REGMAP_NAME,
9862306a36Sopenharmony_ci
9962306a36Sopenharmony_ci	.reg_bits = 8,
10062306a36Sopenharmony_ci	.val_bits = 8,
10162306a36Sopenharmony_ci
10262306a36Sopenharmony_ci	.max_register = MAX30100_REG_TEMP_FRACTION,
10362306a36Sopenharmony_ci	.cache_type = REGCACHE_FLAT,
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_ci	.volatile_reg = max30100_is_volatile_reg,
10662306a36Sopenharmony_ci};
10762306a36Sopenharmony_ci
10862306a36Sopenharmony_cistatic const unsigned int max30100_led_current_mapping[] = {
10962306a36Sopenharmony_ci	4400, 7600, 11000, 14200, 17400,
11062306a36Sopenharmony_ci	20800, 24000, 27100, 30600, 33800,
11162306a36Sopenharmony_ci	37000, 40200, 43600, 46800, 50000
11262306a36Sopenharmony_ci};
11362306a36Sopenharmony_ci
11462306a36Sopenharmony_cistatic const unsigned long max30100_scan_masks[] = {0x3, 0};
11562306a36Sopenharmony_ci
11662306a36Sopenharmony_cistatic const struct iio_chan_spec max30100_channels[] = {
11762306a36Sopenharmony_ci	{
11862306a36Sopenharmony_ci		.type = IIO_INTENSITY,
11962306a36Sopenharmony_ci		.channel2 = IIO_MOD_LIGHT_IR,
12062306a36Sopenharmony_ci		.modified = 1,
12162306a36Sopenharmony_ci
12262306a36Sopenharmony_ci		.scan_index = 0,
12362306a36Sopenharmony_ci		.scan_type = {
12462306a36Sopenharmony_ci			.sign = 'u',
12562306a36Sopenharmony_ci			.realbits = 16,
12662306a36Sopenharmony_ci			.storagebits = 16,
12762306a36Sopenharmony_ci			.endianness = IIO_BE,
12862306a36Sopenharmony_ci		},
12962306a36Sopenharmony_ci	},
13062306a36Sopenharmony_ci	{
13162306a36Sopenharmony_ci		.type = IIO_INTENSITY,
13262306a36Sopenharmony_ci		.channel2 = IIO_MOD_LIGHT_RED,
13362306a36Sopenharmony_ci		.modified = 1,
13462306a36Sopenharmony_ci
13562306a36Sopenharmony_ci		.scan_index = 1,
13662306a36Sopenharmony_ci		.scan_type = {
13762306a36Sopenharmony_ci			.sign = 'u',
13862306a36Sopenharmony_ci			.realbits = 16,
13962306a36Sopenharmony_ci			.storagebits = 16,
14062306a36Sopenharmony_ci			.endianness = IIO_BE,
14162306a36Sopenharmony_ci		},
14262306a36Sopenharmony_ci	},
14362306a36Sopenharmony_ci	{
14462306a36Sopenharmony_ci		.type = IIO_TEMP,
14562306a36Sopenharmony_ci		.info_mask_separate =
14662306a36Sopenharmony_ci			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
14762306a36Sopenharmony_ci		.scan_index = -1,
14862306a36Sopenharmony_ci	},
14962306a36Sopenharmony_ci};
15062306a36Sopenharmony_ci
15162306a36Sopenharmony_cistatic int max30100_set_powermode(struct max30100_data *data, bool state)
15262306a36Sopenharmony_ci{
15362306a36Sopenharmony_ci	return regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
15462306a36Sopenharmony_ci				  MAX30100_REG_MODE_CONFIG_PWR,
15562306a36Sopenharmony_ci				  state ? 0 : MAX30100_REG_MODE_CONFIG_PWR);
15662306a36Sopenharmony_ci}
15762306a36Sopenharmony_ci
15862306a36Sopenharmony_cistatic int max30100_clear_fifo(struct max30100_data *data)
15962306a36Sopenharmony_ci{
16062306a36Sopenharmony_ci	int ret;
16162306a36Sopenharmony_ci
16262306a36Sopenharmony_ci	ret = regmap_write(data->regmap, MAX30100_REG_FIFO_WR_PTR, 0);
16362306a36Sopenharmony_ci	if (ret)
16462306a36Sopenharmony_ci		return ret;
16562306a36Sopenharmony_ci
16662306a36Sopenharmony_ci	ret = regmap_write(data->regmap, MAX30100_REG_FIFO_OVR_CTR, 0);
16762306a36Sopenharmony_ci	if (ret)
16862306a36Sopenharmony_ci		return ret;
16962306a36Sopenharmony_ci
17062306a36Sopenharmony_ci	return regmap_write(data->regmap, MAX30100_REG_FIFO_RD_PTR, 0);
17162306a36Sopenharmony_ci}
17262306a36Sopenharmony_ci
17362306a36Sopenharmony_cistatic int max30100_buffer_postenable(struct iio_dev *indio_dev)
17462306a36Sopenharmony_ci{
17562306a36Sopenharmony_ci	struct max30100_data *data = iio_priv(indio_dev);
17662306a36Sopenharmony_ci	int ret;
17762306a36Sopenharmony_ci
17862306a36Sopenharmony_ci	ret = max30100_set_powermode(data, true);
17962306a36Sopenharmony_ci	if (ret)
18062306a36Sopenharmony_ci		return ret;
18162306a36Sopenharmony_ci
18262306a36Sopenharmony_ci	return max30100_clear_fifo(data);
18362306a36Sopenharmony_ci}
18462306a36Sopenharmony_ci
18562306a36Sopenharmony_cistatic int max30100_buffer_predisable(struct iio_dev *indio_dev)
18662306a36Sopenharmony_ci{
18762306a36Sopenharmony_ci	struct max30100_data *data = iio_priv(indio_dev);
18862306a36Sopenharmony_ci
18962306a36Sopenharmony_ci	return max30100_set_powermode(data, false);
19062306a36Sopenharmony_ci}
19162306a36Sopenharmony_ci
19262306a36Sopenharmony_cistatic const struct iio_buffer_setup_ops max30100_buffer_setup_ops = {
19362306a36Sopenharmony_ci	.postenable = max30100_buffer_postenable,
19462306a36Sopenharmony_ci	.predisable = max30100_buffer_predisable,
19562306a36Sopenharmony_ci};
19662306a36Sopenharmony_ci
19762306a36Sopenharmony_cistatic inline int max30100_fifo_count(struct max30100_data *data)
19862306a36Sopenharmony_ci{
19962306a36Sopenharmony_ci	unsigned int val;
20062306a36Sopenharmony_ci	int ret;
20162306a36Sopenharmony_ci
20262306a36Sopenharmony_ci	ret = regmap_read(data->regmap, MAX30100_REG_INT_STATUS, &val);
20362306a36Sopenharmony_ci	if (ret)
20462306a36Sopenharmony_ci		return ret;
20562306a36Sopenharmony_ci
20662306a36Sopenharmony_ci	/* FIFO is almost full */
20762306a36Sopenharmony_ci	if (val & MAX30100_REG_INT_STATUS_FIFO_RDY)
20862306a36Sopenharmony_ci		return MAX30100_REG_FIFO_DATA_ENTRY_COUNT - 1;
20962306a36Sopenharmony_ci
21062306a36Sopenharmony_ci	return 0;
21162306a36Sopenharmony_ci}
21262306a36Sopenharmony_ci
21362306a36Sopenharmony_cistatic int max30100_read_measurement(struct max30100_data *data)
21462306a36Sopenharmony_ci{
21562306a36Sopenharmony_ci	int ret;
21662306a36Sopenharmony_ci
21762306a36Sopenharmony_ci	ret = i2c_smbus_read_i2c_block_data(data->client,
21862306a36Sopenharmony_ci					    MAX30100_REG_FIFO_DATA,
21962306a36Sopenharmony_ci					    MAX30100_REG_FIFO_DATA_ENTRY_LEN,
22062306a36Sopenharmony_ci					    (u8 *) &data->buffer);
22162306a36Sopenharmony_ci
22262306a36Sopenharmony_ci	return (ret == MAX30100_REG_FIFO_DATA_ENTRY_LEN) ? 0 : ret;
22362306a36Sopenharmony_ci}
22462306a36Sopenharmony_ci
22562306a36Sopenharmony_cistatic irqreturn_t max30100_interrupt_handler(int irq, void *private)
22662306a36Sopenharmony_ci{
22762306a36Sopenharmony_ci	struct iio_dev *indio_dev = private;
22862306a36Sopenharmony_ci	struct max30100_data *data = iio_priv(indio_dev);
22962306a36Sopenharmony_ci	int ret, cnt = 0;
23062306a36Sopenharmony_ci
23162306a36Sopenharmony_ci	mutex_lock(&data->lock);
23262306a36Sopenharmony_ci
23362306a36Sopenharmony_ci	while (cnt || (cnt = max30100_fifo_count(data)) > 0) {
23462306a36Sopenharmony_ci		ret = max30100_read_measurement(data);
23562306a36Sopenharmony_ci		if (ret)
23662306a36Sopenharmony_ci			break;
23762306a36Sopenharmony_ci
23862306a36Sopenharmony_ci		iio_push_to_buffers(data->indio_dev, data->buffer);
23962306a36Sopenharmony_ci		cnt--;
24062306a36Sopenharmony_ci	}
24162306a36Sopenharmony_ci
24262306a36Sopenharmony_ci	mutex_unlock(&data->lock);
24362306a36Sopenharmony_ci
24462306a36Sopenharmony_ci	return IRQ_HANDLED;
24562306a36Sopenharmony_ci}
24662306a36Sopenharmony_ci
24762306a36Sopenharmony_cistatic int max30100_get_current_idx(unsigned int val, int *reg)
24862306a36Sopenharmony_ci{
24962306a36Sopenharmony_ci	int idx;
25062306a36Sopenharmony_ci
25162306a36Sopenharmony_ci	/* LED turned off */
25262306a36Sopenharmony_ci	if (val == 0) {
25362306a36Sopenharmony_ci		*reg = 0;
25462306a36Sopenharmony_ci		return 0;
25562306a36Sopenharmony_ci	}
25662306a36Sopenharmony_ci
25762306a36Sopenharmony_ci	for (idx = 0; idx < ARRAY_SIZE(max30100_led_current_mapping); idx++) {
25862306a36Sopenharmony_ci		if (max30100_led_current_mapping[idx] == val) {
25962306a36Sopenharmony_ci			*reg = idx + 1;
26062306a36Sopenharmony_ci			return 0;
26162306a36Sopenharmony_ci		}
26262306a36Sopenharmony_ci	}
26362306a36Sopenharmony_ci
26462306a36Sopenharmony_ci	return -EINVAL;
26562306a36Sopenharmony_ci}
26662306a36Sopenharmony_ci
26762306a36Sopenharmony_cistatic int max30100_led_init(struct max30100_data *data)
26862306a36Sopenharmony_ci{
26962306a36Sopenharmony_ci	struct device *dev = &data->client->dev;
27062306a36Sopenharmony_ci	unsigned int val[2];
27162306a36Sopenharmony_ci	int reg, ret;
27262306a36Sopenharmony_ci
27362306a36Sopenharmony_ci	ret = device_property_read_u32_array(dev, "maxim,led-current-microamp",
27462306a36Sopenharmony_ci					(unsigned int *) &val, 2);
27562306a36Sopenharmony_ci	if (ret) {
27662306a36Sopenharmony_ci		/* Default to 24 mA RED LED, 50 mA IR LED */
27762306a36Sopenharmony_ci		reg = (MAX30100_REG_LED_CONFIG_24MA <<
27862306a36Sopenharmony_ci			MAX30100_REG_LED_CONFIG_RED_LED_SHIFT) |
27962306a36Sopenharmony_ci			MAX30100_REG_LED_CONFIG_50MA;
28062306a36Sopenharmony_ci		dev_warn(dev, "no led-current-microamp set");
28162306a36Sopenharmony_ci
28262306a36Sopenharmony_ci		return regmap_write(data->regmap, MAX30100_REG_LED_CONFIG, reg);
28362306a36Sopenharmony_ci	}
28462306a36Sopenharmony_ci
28562306a36Sopenharmony_ci	/* RED LED current */
28662306a36Sopenharmony_ci	ret = max30100_get_current_idx(val[0], &reg);
28762306a36Sopenharmony_ci	if (ret) {
28862306a36Sopenharmony_ci		dev_err(dev, "invalid RED current setting %d", val[0]);
28962306a36Sopenharmony_ci		return ret;
29062306a36Sopenharmony_ci	}
29162306a36Sopenharmony_ci
29262306a36Sopenharmony_ci	ret = regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG,
29362306a36Sopenharmony_ci		MAX30100_REG_LED_CONFIG_LED_MASK <<
29462306a36Sopenharmony_ci		MAX30100_REG_LED_CONFIG_RED_LED_SHIFT,
29562306a36Sopenharmony_ci		reg << MAX30100_REG_LED_CONFIG_RED_LED_SHIFT);
29662306a36Sopenharmony_ci	if (ret)
29762306a36Sopenharmony_ci		return ret;
29862306a36Sopenharmony_ci
29962306a36Sopenharmony_ci	/* IR LED current */
30062306a36Sopenharmony_ci	ret = max30100_get_current_idx(val[1], &reg);
30162306a36Sopenharmony_ci	if (ret) {
30262306a36Sopenharmony_ci		dev_err(dev, "invalid IR current setting %d", val[1]);
30362306a36Sopenharmony_ci		return ret;
30462306a36Sopenharmony_ci	}
30562306a36Sopenharmony_ci
30662306a36Sopenharmony_ci	return regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG,
30762306a36Sopenharmony_ci		MAX30100_REG_LED_CONFIG_LED_MASK, reg);
30862306a36Sopenharmony_ci}
30962306a36Sopenharmony_ci
31062306a36Sopenharmony_cistatic int max30100_chip_init(struct max30100_data *data)
31162306a36Sopenharmony_ci{
31262306a36Sopenharmony_ci	int ret;
31362306a36Sopenharmony_ci
31462306a36Sopenharmony_ci	/* setup LED current settings */
31562306a36Sopenharmony_ci	ret = max30100_led_init(data);
31662306a36Sopenharmony_ci	if (ret)
31762306a36Sopenharmony_ci		return ret;
31862306a36Sopenharmony_ci
31962306a36Sopenharmony_ci	/* enable hi-res SPO2 readings at 100Hz */
32062306a36Sopenharmony_ci	ret = regmap_write(data->regmap, MAX30100_REG_SPO2_CONFIG,
32162306a36Sopenharmony_ci				 MAX30100_REG_SPO2_CONFIG_HI_RES_EN |
32262306a36Sopenharmony_ci				 MAX30100_REG_SPO2_CONFIG_100HZ);
32362306a36Sopenharmony_ci	if (ret)
32462306a36Sopenharmony_ci		return ret;
32562306a36Sopenharmony_ci
32662306a36Sopenharmony_ci	/* enable SPO2 mode */
32762306a36Sopenharmony_ci	ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
32862306a36Sopenharmony_ci				 MAX30100_REG_MODE_CONFIG_MODE_MASK,
32962306a36Sopenharmony_ci				 MAX30100_REG_MODE_CONFIG_MODE_HR_EN |
33062306a36Sopenharmony_ci				 MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN);
33162306a36Sopenharmony_ci	if (ret)
33262306a36Sopenharmony_ci		return ret;
33362306a36Sopenharmony_ci
33462306a36Sopenharmony_ci	/* enable FIFO interrupt */
33562306a36Sopenharmony_ci	return regmap_update_bits(data->regmap, MAX30100_REG_INT_ENABLE,
33662306a36Sopenharmony_ci				 MAX30100_REG_INT_ENABLE_MASK,
33762306a36Sopenharmony_ci				 MAX30100_REG_INT_ENABLE_FIFO_EN
33862306a36Sopenharmony_ci				 << MAX30100_REG_INT_ENABLE_MASK_SHIFT);
33962306a36Sopenharmony_ci}
34062306a36Sopenharmony_ci
34162306a36Sopenharmony_cistatic int max30100_read_temp(struct max30100_data *data, int *val)
34262306a36Sopenharmony_ci{
34362306a36Sopenharmony_ci	int ret;
34462306a36Sopenharmony_ci	unsigned int reg;
34562306a36Sopenharmony_ci
34662306a36Sopenharmony_ci	ret = regmap_read(data->regmap, MAX30100_REG_TEMP_INTEGER, &reg);
34762306a36Sopenharmony_ci	if (ret < 0)
34862306a36Sopenharmony_ci		return ret;
34962306a36Sopenharmony_ci	*val = reg << 4;
35062306a36Sopenharmony_ci
35162306a36Sopenharmony_ci	ret = regmap_read(data->regmap, MAX30100_REG_TEMP_FRACTION, &reg);
35262306a36Sopenharmony_ci	if (ret < 0)
35362306a36Sopenharmony_ci		return ret;
35462306a36Sopenharmony_ci
35562306a36Sopenharmony_ci	*val |= reg & 0xf;
35662306a36Sopenharmony_ci	*val = sign_extend32(*val, 11);
35762306a36Sopenharmony_ci
35862306a36Sopenharmony_ci	return 0;
35962306a36Sopenharmony_ci}
36062306a36Sopenharmony_ci
36162306a36Sopenharmony_cistatic int max30100_get_temp(struct max30100_data *data, int *val)
36262306a36Sopenharmony_ci{
36362306a36Sopenharmony_ci	int ret;
36462306a36Sopenharmony_ci
36562306a36Sopenharmony_ci	/* start acquisition */
36662306a36Sopenharmony_ci	ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
36762306a36Sopenharmony_ci				 MAX30100_REG_MODE_CONFIG_TEMP_EN,
36862306a36Sopenharmony_ci				 MAX30100_REG_MODE_CONFIG_TEMP_EN);
36962306a36Sopenharmony_ci	if (ret)
37062306a36Sopenharmony_ci		return ret;
37162306a36Sopenharmony_ci
37262306a36Sopenharmony_ci	msleep(35);
37362306a36Sopenharmony_ci
37462306a36Sopenharmony_ci	return max30100_read_temp(data, val);
37562306a36Sopenharmony_ci}
37662306a36Sopenharmony_ci
37762306a36Sopenharmony_cistatic int max30100_read_raw(struct iio_dev *indio_dev,
37862306a36Sopenharmony_ci			     struct iio_chan_spec const *chan,
37962306a36Sopenharmony_ci			     int *val, int *val2, long mask)
38062306a36Sopenharmony_ci{
38162306a36Sopenharmony_ci	struct max30100_data *data = iio_priv(indio_dev);
38262306a36Sopenharmony_ci	int ret = -EINVAL;
38362306a36Sopenharmony_ci
38462306a36Sopenharmony_ci	switch (mask) {
38562306a36Sopenharmony_ci	case IIO_CHAN_INFO_RAW:
38662306a36Sopenharmony_ci		/*
38762306a36Sopenharmony_ci		 * Temperature reading can only be acquired while engine
38862306a36Sopenharmony_ci		 * is running
38962306a36Sopenharmony_ci		 */
39062306a36Sopenharmony_ci		if (iio_device_claim_buffer_mode(indio_dev)) {
39162306a36Sopenharmony_ci			/*
39262306a36Sopenharmony_ci			 * Replacing -EBUSY or other error code
39362306a36Sopenharmony_ci			 * returned by iio_device_claim_buffer_mode()
39462306a36Sopenharmony_ci			 * because user space may rely on the current
39562306a36Sopenharmony_ci			 * one.
39662306a36Sopenharmony_ci			 */
39762306a36Sopenharmony_ci			ret = -EAGAIN;
39862306a36Sopenharmony_ci		} else {
39962306a36Sopenharmony_ci			ret = max30100_get_temp(data, val);
40062306a36Sopenharmony_ci			if (!ret)
40162306a36Sopenharmony_ci				ret = IIO_VAL_INT;
40262306a36Sopenharmony_ci
40362306a36Sopenharmony_ci			iio_device_release_buffer_mode(indio_dev);
40462306a36Sopenharmony_ci		}
40562306a36Sopenharmony_ci		break;
40662306a36Sopenharmony_ci	case IIO_CHAN_INFO_SCALE:
40762306a36Sopenharmony_ci		*val = 1;  /* 0.0625 */
40862306a36Sopenharmony_ci		*val2 = 16;
40962306a36Sopenharmony_ci		ret = IIO_VAL_FRACTIONAL;
41062306a36Sopenharmony_ci		break;
41162306a36Sopenharmony_ci	}
41262306a36Sopenharmony_ci
41362306a36Sopenharmony_ci	return ret;
41462306a36Sopenharmony_ci}
41562306a36Sopenharmony_ci
41662306a36Sopenharmony_cistatic const struct iio_info max30100_info = {
41762306a36Sopenharmony_ci	.read_raw = max30100_read_raw,
41862306a36Sopenharmony_ci};
41962306a36Sopenharmony_ci
42062306a36Sopenharmony_cistatic int max30100_probe(struct i2c_client *client)
42162306a36Sopenharmony_ci{
42262306a36Sopenharmony_ci	struct max30100_data *data;
42362306a36Sopenharmony_ci	struct iio_dev *indio_dev;
42462306a36Sopenharmony_ci	int ret;
42562306a36Sopenharmony_ci
42662306a36Sopenharmony_ci	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
42762306a36Sopenharmony_ci	if (!indio_dev)
42862306a36Sopenharmony_ci		return -ENOMEM;
42962306a36Sopenharmony_ci
43062306a36Sopenharmony_ci	indio_dev->name = MAX30100_DRV_NAME;
43162306a36Sopenharmony_ci	indio_dev->channels = max30100_channels;
43262306a36Sopenharmony_ci	indio_dev->info = &max30100_info;
43362306a36Sopenharmony_ci	indio_dev->num_channels = ARRAY_SIZE(max30100_channels);
43462306a36Sopenharmony_ci	indio_dev->available_scan_masks = max30100_scan_masks;
43562306a36Sopenharmony_ci	indio_dev->modes = INDIO_DIRECT_MODE;
43662306a36Sopenharmony_ci
43762306a36Sopenharmony_ci	ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev,
43862306a36Sopenharmony_ci					  &max30100_buffer_setup_ops);
43962306a36Sopenharmony_ci	if (ret)
44062306a36Sopenharmony_ci		return ret;
44162306a36Sopenharmony_ci
44262306a36Sopenharmony_ci	data = iio_priv(indio_dev);
44362306a36Sopenharmony_ci	data->indio_dev = indio_dev;
44462306a36Sopenharmony_ci	data->client = client;
44562306a36Sopenharmony_ci
44662306a36Sopenharmony_ci	mutex_init(&data->lock);
44762306a36Sopenharmony_ci	i2c_set_clientdata(client, indio_dev);
44862306a36Sopenharmony_ci
44962306a36Sopenharmony_ci	data->regmap = devm_regmap_init_i2c(client, &max30100_regmap_config);
45062306a36Sopenharmony_ci	if (IS_ERR(data->regmap)) {
45162306a36Sopenharmony_ci		dev_err(&client->dev, "regmap initialization failed.\n");
45262306a36Sopenharmony_ci		return PTR_ERR(data->regmap);
45362306a36Sopenharmony_ci	}
45462306a36Sopenharmony_ci	max30100_set_powermode(data, false);
45562306a36Sopenharmony_ci
45662306a36Sopenharmony_ci	ret = max30100_chip_init(data);
45762306a36Sopenharmony_ci	if (ret)
45862306a36Sopenharmony_ci		return ret;
45962306a36Sopenharmony_ci
46062306a36Sopenharmony_ci	if (client->irq <= 0) {
46162306a36Sopenharmony_ci		dev_err(&client->dev, "no valid irq defined\n");
46262306a36Sopenharmony_ci		return -EINVAL;
46362306a36Sopenharmony_ci	}
46462306a36Sopenharmony_ci	ret = devm_request_threaded_irq(&client->dev, client->irq,
46562306a36Sopenharmony_ci					NULL, max30100_interrupt_handler,
46662306a36Sopenharmony_ci					IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
46762306a36Sopenharmony_ci					"max30100_irq", indio_dev);
46862306a36Sopenharmony_ci	if (ret) {
46962306a36Sopenharmony_ci		dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
47062306a36Sopenharmony_ci		return ret;
47162306a36Sopenharmony_ci	}
47262306a36Sopenharmony_ci
47362306a36Sopenharmony_ci	return iio_device_register(indio_dev);
47462306a36Sopenharmony_ci}
47562306a36Sopenharmony_ci
47662306a36Sopenharmony_cistatic void max30100_remove(struct i2c_client *client)
47762306a36Sopenharmony_ci{
47862306a36Sopenharmony_ci	struct iio_dev *indio_dev = i2c_get_clientdata(client);
47962306a36Sopenharmony_ci	struct max30100_data *data = iio_priv(indio_dev);
48062306a36Sopenharmony_ci
48162306a36Sopenharmony_ci	iio_device_unregister(indio_dev);
48262306a36Sopenharmony_ci	max30100_set_powermode(data, false);
48362306a36Sopenharmony_ci}
48462306a36Sopenharmony_ci
48562306a36Sopenharmony_cistatic const struct i2c_device_id max30100_id[] = {
48662306a36Sopenharmony_ci	{ "max30100", 0 },
48762306a36Sopenharmony_ci	{}
48862306a36Sopenharmony_ci};
48962306a36Sopenharmony_ciMODULE_DEVICE_TABLE(i2c, max30100_id);
49062306a36Sopenharmony_ci
49162306a36Sopenharmony_cistatic const struct of_device_id max30100_dt_ids[] = {
49262306a36Sopenharmony_ci	{ .compatible = "maxim,max30100" },
49362306a36Sopenharmony_ci	{ }
49462306a36Sopenharmony_ci};
49562306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, max30100_dt_ids);
49662306a36Sopenharmony_ci
49762306a36Sopenharmony_cistatic struct i2c_driver max30100_driver = {
49862306a36Sopenharmony_ci	.driver = {
49962306a36Sopenharmony_ci		.name	= MAX30100_DRV_NAME,
50062306a36Sopenharmony_ci		.of_match_table	= max30100_dt_ids,
50162306a36Sopenharmony_ci	},
50262306a36Sopenharmony_ci	.probe		= max30100_probe,
50362306a36Sopenharmony_ci	.remove		= max30100_remove,
50462306a36Sopenharmony_ci	.id_table	= max30100_id,
50562306a36Sopenharmony_ci};
50662306a36Sopenharmony_cimodule_i2c_driver(max30100_driver);
50762306a36Sopenharmony_ci
50862306a36Sopenharmony_ciMODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
50962306a36Sopenharmony_ciMODULE_DESCRIPTION("MAX30100 heart rate and pulse oximeter sensor");
51062306a36Sopenharmony_ciMODULE_LICENSE("GPL");
511