162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * IIO driver for the 3-axis accelerometer Domintech ARD10. 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com> 662306a36Sopenharmony_ci * Copyright (c) 2012 Domintech Technology Co., Ltd 762306a36Sopenharmony_ci */ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#include <linux/module.h> 1062306a36Sopenharmony_ci#include <linux/i2c.h> 1162306a36Sopenharmony_ci#include <linux/iio/iio.h> 1262306a36Sopenharmony_ci#include <linux/iio/sysfs.h> 1362306a36Sopenharmony_ci#include <linux/byteorder/generic.h> 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci#define DMARD10_REG_ACTR 0x00 1662306a36Sopenharmony_ci#define DMARD10_REG_AFEM 0x0c 1762306a36Sopenharmony_ci#define DMARD10_REG_STADR 0x12 1862306a36Sopenharmony_ci#define DMARD10_REG_STAINT 0x1c 1962306a36Sopenharmony_ci#define DMARD10_REG_MISC2 0x1f 2062306a36Sopenharmony_ci#define DMARD10_REG_PD 0x21 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci#define DMARD10_MODE_OFF 0x00 2362306a36Sopenharmony_ci#define DMARD10_MODE_STANDBY 0x02 2462306a36Sopenharmony_ci#define DMARD10_MODE_ACTIVE 0x06 2562306a36Sopenharmony_ci#define DMARD10_MODE_READ_OTP 0x12 2662306a36Sopenharmony_ci#define DMARD10_MODE_RESET_DATA_PATH 0x82 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci/* AFEN set 1, ATM[2:0]=b'000 (normal), EN_Z/Y/X/T=1 */ 2962306a36Sopenharmony_ci#define DMARD10_VALUE_AFEM_AFEN_NORMAL 0x8f 3062306a36Sopenharmony_ci/* ODR[3:0]=b'0111 (100Hz), CCK[3:0]=b'0100 (204.8kHZ) */ 3162306a36Sopenharmony_ci#define DMARD10_VALUE_CKSEL_ODR_100_204 0x74 3262306a36Sopenharmony_ci/* INTC[6:5]=b'00 */ 3362306a36Sopenharmony_ci#define DMARD10_VALUE_INTC 0x00 3462306a36Sopenharmony_ci/* TAP1/TAP2 Average 2 */ 3562306a36Sopenharmony_ci#define DMARD10_VALUE_TAPNS_AVE_2 0x11 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci#define DMARD10_VALUE_STADR 0x55 3862306a36Sopenharmony_ci#define DMARD10_VALUE_STAINT 0xaa 3962306a36Sopenharmony_ci#define DMARD10_VALUE_MISC2_OSCA_EN 0x08 4062306a36Sopenharmony_ci#define DMARD10_VALUE_PD_RST 0x52 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci/* Offsets into the buffer read in dmard10_read_raw() */ 4362306a36Sopenharmony_ci#define DMARD10_X_OFFSET 1 4462306a36Sopenharmony_ci#define DMARD10_Y_OFFSET 2 4562306a36Sopenharmony_ci#define DMARD10_Z_OFFSET 3 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci/* 4862306a36Sopenharmony_ci * a value of + or -128 corresponds to + or - 1G 4962306a36Sopenharmony_ci * scale = 9.81 / 128 = 0.076640625 5062306a36Sopenharmony_ci */ 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_cistatic const int dmard10_nscale = 76640625; 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci#define DMARD10_CHANNEL(reg, axis) { \ 5562306a36Sopenharmony_ci .type = IIO_ACCEL, \ 5662306a36Sopenharmony_ci .address = reg, \ 5762306a36Sopenharmony_ci .modified = 1, \ 5862306a36Sopenharmony_ci .channel2 = IIO_MOD_##axis, \ 5962306a36Sopenharmony_ci .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 6062306a36Sopenharmony_ci .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 6162306a36Sopenharmony_ci} 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_cistatic const struct iio_chan_spec dmard10_channels[] = { 6462306a36Sopenharmony_ci DMARD10_CHANNEL(DMARD10_X_OFFSET, X), 6562306a36Sopenharmony_ci DMARD10_CHANNEL(DMARD10_Y_OFFSET, Y), 6662306a36Sopenharmony_ci DMARD10_CHANNEL(DMARD10_Z_OFFSET, Z), 6762306a36Sopenharmony_ci}; 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_cistruct dmard10_data { 7062306a36Sopenharmony_ci struct i2c_client *client; 7162306a36Sopenharmony_ci}; 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci/* Init sequence taken from the android driver */ 7462306a36Sopenharmony_cistatic int dmard10_reset(struct i2c_client *client) 7562306a36Sopenharmony_ci{ 7662306a36Sopenharmony_ci unsigned char buffer[7]; 7762306a36Sopenharmony_ci int ret; 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci /* 1. Powerdown reset */ 8062306a36Sopenharmony_ci ret = i2c_smbus_write_byte_data(client, DMARD10_REG_PD, 8162306a36Sopenharmony_ci DMARD10_VALUE_PD_RST); 8262306a36Sopenharmony_ci if (ret < 0) 8362306a36Sopenharmony_ci return ret; 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci /* 8662306a36Sopenharmony_ci * 2. ACTR => Standby mode => Download OTP to parameter reg => 8762306a36Sopenharmony_ci * Standby mode => Reset data path => Standby mode 8862306a36Sopenharmony_ci */ 8962306a36Sopenharmony_ci buffer[0] = DMARD10_REG_ACTR; 9062306a36Sopenharmony_ci buffer[1] = DMARD10_MODE_STANDBY; 9162306a36Sopenharmony_ci buffer[2] = DMARD10_MODE_READ_OTP; 9262306a36Sopenharmony_ci buffer[3] = DMARD10_MODE_STANDBY; 9362306a36Sopenharmony_ci buffer[4] = DMARD10_MODE_RESET_DATA_PATH; 9462306a36Sopenharmony_ci buffer[5] = DMARD10_MODE_STANDBY; 9562306a36Sopenharmony_ci ret = i2c_master_send(client, buffer, 6); 9662306a36Sopenharmony_ci if (ret < 0) 9762306a36Sopenharmony_ci return ret; 9862306a36Sopenharmony_ci 9962306a36Sopenharmony_ci /* 3. OSCA_EN = 1, TSTO = b'000 (INT1 = normal, TEST0 = normal) */ 10062306a36Sopenharmony_ci ret = i2c_smbus_write_byte_data(client, DMARD10_REG_MISC2, 10162306a36Sopenharmony_ci DMARD10_VALUE_MISC2_OSCA_EN); 10262306a36Sopenharmony_ci if (ret < 0) 10362306a36Sopenharmony_ci return ret; 10462306a36Sopenharmony_ci 10562306a36Sopenharmony_ci /* 4. AFEN = 1 (AFE will powerdown after ADC) */ 10662306a36Sopenharmony_ci buffer[0] = DMARD10_REG_AFEM; 10762306a36Sopenharmony_ci buffer[1] = DMARD10_VALUE_AFEM_AFEN_NORMAL; 10862306a36Sopenharmony_ci buffer[2] = DMARD10_VALUE_CKSEL_ODR_100_204; 10962306a36Sopenharmony_ci buffer[3] = DMARD10_VALUE_INTC; 11062306a36Sopenharmony_ci buffer[4] = DMARD10_VALUE_TAPNS_AVE_2; 11162306a36Sopenharmony_ci buffer[5] = 0x00; /* DLYC, no delay timing */ 11262306a36Sopenharmony_ci buffer[6] = 0x07; /* INTD=1 push-pull, INTA=1 active high, AUTOT=1 */ 11362306a36Sopenharmony_ci ret = i2c_master_send(client, buffer, 7); 11462306a36Sopenharmony_ci if (ret < 0) 11562306a36Sopenharmony_ci return ret; 11662306a36Sopenharmony_ci 11762306a36Sopenharmony_ci /* 5. Activation mode */ 11862306a36Sopenharmony_ci ret = i2c_smbus_write_byte_data(client, DMARD10_REG_ACTR, 11962306a36Sopenharmony_ci DMARD10_MODE_ACTIVE); 12062306a36Sopenharmony_ci if (ret < 0) 12162306a36Sopenharmony_ci return ret; 12262306a36Sopenharmony_ci 12362306a36Sopenharmony_ci return 0; 12462306a36Sopenharmony_ci} 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_ci/* Shutdown sequence taken from the android driver */ 12762306a36Sopenharmony_cistatic int dmard10_shutdown(struct i2c_client *client) 12862306a36Sopenharmony_ci{ 12962306a36Sopenharmony_ci unsigned char buffer[3]; 13062306a36Sopenharmony_ci 13162306a36Sopenharmony_ci buffer[0] = DMARD10_REG_ACTR; 13262306a36Sopenharmony_ci buffer[1] = DMARD10_MODE_STANDBY; 13362306a36Sopenharmony_ci buffer[2] = DMARD10_MODE_OFF; 13462306a36Sopenharmony_ci 13562306a36Sopenharmony_ci return i2c_master_send(client, buffer, 3); 13662306a36Sopenharmony_ci} 13762306a36Sopenharmony_ci 13862306a36Sopenharmony_cistatic int dmard10_read_raw(struct iio_dev *indio_dev, 13962306a36Sopenharmony_ci struct iio_chan_spec const *chan, 14062306a36Sopenharmony_ci int *val, int *val2, long mask) 14162306a36Sopenharmony_ci{ 14262306a36Sopenharmony_ci struct dmard10_data *data = iio_priv(indio_dev); 14362306a36Sopenharmony_ci __le16 buf[4]; 14462306a36Sopenharmony_ci int ret; 14562306a36Sopenharmony_ci 14662306a36Sopenharmony_ci switch (mask) { 14762306a36Sopenharmony_ci case IIO_CHAN_INFO_RAW: 14862306a36Sopenharmony_ci /* 14962306a36Sopenharmony_ci * Read 8 bytes starting at the REG_STADR register, trying to 15062306a36Sopenharmony_ci * read the individual X, Y, Z registers will always read 0. 15162306a36Sopenharmony_ci */ 15262306a36Sopenharmony_ci ret = i2c_smbus_read_i2c_block_data(data->client, 15362306a36Sopenharmony_ci DMARD10_REG_STADR, 15462306a36Sopenharmony_ci sizeof(buf), (u8 *)buf); 15562306a36Sopenharmony_ci if (ret < 0) 15662306a36Sopenharmony_ci return ret; 15762306a36Sopenharmony_ci ret = le16_to_cpu(buf[chan->address]); 15862306a36Sopenharmony_ci *val = sign_extend32(ret, 12); 15962306a36Sopenharmony_ci return IIO_VAL_INT; 16062306a36Sopenharmony_ci case IIO_CHAN_INFO_SCALE: 16162306a36Sopenharmony_ci *val = 0; 16262306a36Sopenharmony_ci *val2 = dmard10_nscale; 16362306a36Sopenharmony_ci return IIO_VAL_INT_PLUS_NANO; 16462306a36Sopenharmony_ci default: 16562306a36Sopenharmony_ci return -EINVAL; 16662306a36Sopenharmony_ci } 16762306a36Sopenharmony_ci} 16862306a36Sopenharmony_ci 16962306a36Sopenharmony_cistatic const struct iio_info dmard10_info = { 17062306a36Sopenharmony_ci .read_raw = dmard10_read_raw, 17162306a36Sopenharmony_ci}; 17262306a36Sopenharmony_ci 17362306a36Sopenharmony_cistatic void dmard10_shutdown_cleanup(void *client) 17462306a36Sopenharmony_ci{ 17562306a36Sopenharmony_ci dmard10_shutdown(client); 17662306a36Sopenharmony_ci} 17762306a36Sopenharmony_ci 17862306a36Sopenharmony_cistatic int dmard10_probe(struct i2c_client *client) 17962306a36Sopenharmony_ci{ 18062306a36Sopenharmony_ci int ret; 18162306a36Sopenharmony_ci struct iio_dev *indio_dev; 18262306a36Sopenharmony_ci struct dmard10_data *data; 18362306a36Sopenharmony_ci 18462306a36Sopenharmony_ci /* These 2 registers have special POR reset values used for id */ 18562306a36Sopenharmony_ci ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STADR); 18662306a36Sopenharmony_ci if (ret != DMARD10_VALUE_STADR) 18762306a36Sopenharmony_ci return (ret < 0) ? ret : -ENODEV; 18862306a36Sopenharmony_ci 18962306a36Sopenharmony_ci ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STAINT); 19062306a36Sopenharmony_ci if (ret != DMARD10_VALUE_STAINT) 19162306a36Sopenharmony_ci return (ret < 0) ? ret : -ENODEV; 19262306a36Sopenharmony_ci 19362306a36Sopenharmony_ci indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 19462306a36Sopenharmony_ci if (!indio_dev) { 19562306a36Sopenharmony_ci dev_err(&client->dev, "iio allocation failed!\n"); 19662306a36Sopenharmony_ci return -ENOMEM; 19762306a36Sopenharmony_ci } 19862306a36Sopenharmony_ci 19962306a36Sopenharmony_ci data = iio_priv(indio_dev); 20062306a36Sopenharmony_ci data->client = client; 20162306a36Sopenharmony_ci 20262306a36Sopenharmony_ci indio_dev->info = &dmard10_info; 20362306a36Sopenharmony_ci indio_dev->name = "dmard10"; 20462306a36Sopenharmony_ci indio_dev->modes = INDIO_DIRECT_MODE; 20562306a36Sopenharmony_ci indio_dev->channels = dmard10_channels; 20662306a36Sopenharmony_ci indio_dev->num_channels = ARRAY_SIZE(dmard10_channels); 20762306a36Sopenharmony_ci 20862306a36Sopenharmony_ci ret = dmard10_reset(client); 20962306a36Sopenharmony_ci if (ret < 0) 21062306a36Sopenharmony_ci return ret; 21162306a36Sopenharmony_ci 21262306a36Sopenharmony_ci ret = devm_add_action_or_reset(&client->dev, dmard10_shutdown_cleanup, 21362306a36Sopenharmony_ci client); 21462306a36Sopenharmony_ci if (ret) 21562306a36Sopenharmony_ci return ret; 21662306a36Sopenharmony_ci 21762306a36Sopenharmony_ci return devm_iio_device_register(&client->dev, indio_dev); 21862306a36Sopenharmony_ci} 21962306a36Sopenharmony_ci 22062306a36Sopenharmony_cistatic int dmard10_suspend(struct device *dev) 22162306a36Sopenharmony_ci{ 22262306a36Sopenharmony_ci return dmard10_shutdown(to_i2c_client(dev)); 22362306a36Sopenharmony_ci} 22462306a36Sopenharmony_ci 22562306a36Sopenharmony_cistatic int dmard10_resume(struct device *dev) 22662306a36Sopenharmony_ci{ 22762306a36Sopenharmony_ci return dmard10_reset(to_i2c_client(dev)); 22862306a36Sopenharmony_ci} 22962306a36Sopenharmony_ci 23062306a36Sopenharmony_cistatic DEFINE_SIMPLE_DEV_PM_OPS(dmard10_pm_ops, dmard10_suspend, 23162306a36Sopenharmony_ci dmard10_resume); 23262306a36Sopenharmony_ci 23362306a36Sopenharmony_cistatic const struct i2c_device_id dmard10_i2c_id[] = { 23462306a36Sopenharmony_ci {"dmard10", 0}, 23562306a36Sopenharmony_ci {} 23662306a36Sopenharmony_ci}; 23762306a36Sopenharmony_ciMODULE_DEVICE_TABLE(i2c, dmard10_i2c_id); 23862306a36Sopenharmony_ci 23962306a36Sopenharmony_cistatic struct i2c_driver dmard10_driver = { 24062306a36Sopenharmony_ci .driver = { 24162306a36Sopenharmony_ci .name = "dmard10", 24262306a36Sopenharmony_ci .pm = pm_sleep_ptr(&dmard10_pm_ops), 24362306a36Sopenharmony_ci }, 24462306a36Sopenharmony_ci .probe = dmard10_probe, 24562306a36Sopenharmony_ci .id_table = dmard10_i2c_id, 24662306a36Sopenharmony_ci}; 24762306a36Sopenharmony_ci 24862306a36Sopenharmony_cimodule_i2c_driver(dmard10_driver); 24962306a36Sopenharmony_ci 25062306a36Sopenharmony_ciMODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); 25162306a36Sopenharmony_ciMODULE_DESCRIPTION("Domintech ARD10 3-Axis Accelerometer driver"); 25262306a36Sopenharmony_ciMODULE_LICENSE("GPL v2"); 253