162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci SMBus driver for nVidia nForce2 MCP 462306a36Sopenharmony_ci 562306a36Sopenharmony_ci Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>, 662306a36Sopenharmony_ci Ported to 2.5 Patrick Dreker <patrick@dreker.de>, 762306a36Sopenharmony_ci Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>, 862306a36Sopenharmony_ci Based on 962306a36Sopenharmony_ci SMBus 2.0 driver for AMD-8111 IO-Hub 1062306a36Sopenharmony_ci Copyright (c) 2002 Vojtech Pavlik 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci*/ 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci/* 1562306a36Sopenharmony_ci SUPPORTED DEVICES PCI ID 1662306a36Sopenharmony_ci nForce2 MCP 0064 1762306a36Sopenharmony_ci nForce2 Ultra 400 MCP 0084 1862306a36Sopenharmony_ci nForce3 Pro150 MCP 00D4 1962306a36Sopenharmony_ci nForce3 250Gb MCP 00E4 2062306a36Sopenharmony_ci nForce4 MCP 0052 2162306a36Sopenharmony_ci nForce4 MCP-04 0034 2262306a36Sopenharmony_ci nForce MCP51 0264 2362306a36Sopenharmony_ci nForce MCP55 0368 2462306a36Sopenharmony_ci nForce MCP61 03EB 2562306a36Sopenharmony_ci nForce MCP65 0446 2662306a36Sopenharmony_ci nForce MCP67 0542 2762306a36Sopenharmony_ci nForce MCP73 07D8 2862306a36Sopenharmony_ci nForce MCP78S 0752 2962306a36Sopenharmony_ci nForce MCP79 0AA2 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci This driver supports the 2 SMBuses that are included in the MCP of the 3262306a36Sopenharmony_ci nForce2/3/4/5xx chipsets. 3362306a36Sopenharmony_ci*/ 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci/* Note: we assume there can only be one nForce2, with two SMBus interfaces */ 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci#include <linux/module.h> 3862306a36Sopenharmony_ci#include <linux/pci.h> 3962306a36Sopenharmony_ci#include <linux/kernel.h> 4062306a36Sopenharmony_ci#include <linux/stddef.h> 4162306a36Sopenharmony_ci#include <linux/ioport.h> 4262306a36Sopenharmony_ci#include <linux/i2c.h> 4362306a36Sopenharmony_ci#include <linux/delay.h> 4462306a36Sopenharmony_ci#include <linux/dmi.h> 4562306a36Sopenharmony_ci#include <linux/acpi.h> 4662306a36Sopenharmony_ci#include <linux/slab.h> 4762306a36Sopenharmony_ci#include <linux/io.h> 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ciMODULE_LICENSE("GPL"); 5062306a36Sopenharmony_ciMODULE_AUTHOR("Hans-Frieder Vogt <hfvogt@gmx.net>"); 5162306a36Sopenharmony_ciMODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver"); 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_cistruct nforce2_smbus { 5562306a36Sopenharmony_ci struct i2c_adapter adapter; 5662306a36Sopenharmony_ci int base; 5762306a36Sopenharmony_ci int size; 5862306a36Sopenharmony_ci int blockops; 5962306a36Sopenharmony_ci int can_abort; 6062306a36Sopenharmony_ci}; 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci/* 6462306a36Sopenharmony_ci * nVidia nForce2 SMBus control register definitions 6562306a36Sopenharmony_ci * (Newer incarnations use standard BARs 4 and 5 instead) 6662306a36Sopenharmony_ci */ 6762306a36Sopenharmony_ci#define NFORCE_PCI_SMB1 0x50 6862306a36Sopenharmony_ci#define NFORCE_PCI_SMB2 0x54 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci/* 7262306a36Sopenharmony_ci * ACPI 2.0 chapter 13 SMBus 2.0 EC register model 7362306a36Sopenharmony_ci */ 7462306a36Sopenharmony_ci#define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */ 7562306a36Sopenharmony_ci#define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */ 7662306a36Sopenharmony_ci#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */ 7762306a36Sopenharmony_ci#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */ 7862306a36Sopenharmony_ci#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */ 7962306a36Sopenharmony_ci#define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data 8062306a36Sopenharmony_ci bytes */ 8162306a36Sopenharmony_ci#define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to 8262306a36Sopenharmony_ci check the status of 8362306a36Sopenharmony_ci the abort command */ 8462306a36Sopenharmony_ci#define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */ 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ci#define NVIDIA_SMB_STATUS_ABRT_STS 0x01 /* Bit to notify that 8762306a36Sopenharmony_ci abort succeeded */ 8862306a36Sopenharmony_ci#define NVIDIA_SMB_CTRL_ABORT 0x20 8962306a36Sopenharmony_ci#define NVIDIA_SMB_STS_DONE 0x80 9062306a36Sopenharmony_ci#define NVIDIA_SMB_STS_ALRM 0x40 9162306a36Sopenharmony_ci#define NVIDIA_SMB_STS_RES 0x20 9262306a36Sopenharmony_ci#define NVIDIA_SMB_STS_STATUS 0x1f 9362306a36Sopenharmony_ci 9462306a36Sopenharmony_ci#define NVIDIA_SMB_PRTCL_WRITE 0x00 9562306a36Sopenharmony_ci#define NVIDIA_SMB_PRTCL_READ 0x01 9662306a36Sopenharmony_ci#define NVIDIA_SMB_PRTCL_QUICK 0x02 9762306a36Sopenharmony_ci#define NVIDIA_SMB_PRTCL_BYTE 0x04 9862306a36Sopenharmony_ci#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06 9962306a36Sopenharmony_ci#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08 10062306a36Sopenharmony_ci#define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a 10162306a36Sopenharmony_ci#define NVIDIA_SMB_PRTCL_PEC 0x80 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci/* Misc definitions */ 10462306a36Sopenharmony_ci#define MAX_TIMEOUT 100 10562306a36Sopenharmony_ci 10662306a36Sopenharmony_ci/* We disable the second SMBus channel on these boards */ 10762306a36Sopenharmony_cistatic const struct dmi_system_id nforce2_dmi_blacklist2[] = { 10862306a36Sopenharmony_ci { 10962306a36Sopenharmony_ci .ident = "DFI Lanparty NF4 Expert", 11062306a36Sopenharmony_ci .matches = { 11162306a36Sopenharmony_ci DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"), 11262306a36Sopenharmony_ci DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"), 11362306a36Sopenharmony_ci }, 11462306a36Sopenharmony_ci }, 11562306a36Sopenharmony_ci { } 11662306a36Sopenharmony_ci}; 11762306a36Sopenharmony_ci 11862306a36Sopenharmony_cistatic struct pci_driver nforce2_driver; 11962306a36Sopenharmony_ci 12062306a36Sopenharmony_ci/* For multiplexing support, we need a global reference to the 1st 12162306a36Sopenharmony_ci SMBus channel */ 12262306a36Sopenharmony_ci#if IS_ENABLED(CONFIG_I2C_NFORCE2_S4985) 12362306a36Sopenharmony_cistruct i2c_adapter *nforce2_smbus; 12462306a36Sopenharmony_ciEXPORT_SYMBOL_GPL(nforce2_smbus); 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_cistatic void nforce2_set_reference(struct i2c_adapter *adap) 12762306a36Sopenharmony_ci{ 12862306a36Sopenharmony_ci nforce2_smbus = adap; 12962306a36Sopenharmony_ci} 13062306a36Sopenharmony_ci#else 13162306a36Sopenharmony_cistatic inline void nforce2_set_reference(struct i2c_adapter *adap) { } 13262306a36Sopenharmony_ci#endif 13362306a36Sopenharmony_ci 13462306a36Sopenharmony_cistatic void nforce2_abort(struct i2c_adapter *adap) 13562306a36Sopenharmony_ci{ 13662306a36Sopenharmony_ci struct nforce2_smbus *smbus = adap->algo_data; 13762306a36Sopenharmony_ci int timeout = 0; 13862306a36Sopenharmony_ci unsigned char temp; 13962306a36Sopenharmony_ci 14062306a36Sopenharmony_ci dev_dbg(&adap->dev, "Aborting current transaction\n"); 14162306a36Sopenharmony_ci 14262306a36Sopenharmony_ci outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL); 14362306a36Sopenharmony_ci do { 14462306a36Sopenharmony_ci msleep(1); 14562306a36Sopenharmony_ci temp = inb_p(NVIDIA_SMB_STATUS_ABRT); 14662306a36Sopenharmony_ci } while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) && 14762306a36Sopenharmony_ci (timeout++ < MAX_TIMEOUT)); 14862306a36Sopenharmony_ci if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS)) 14962306a36Sopenharmony_ci dev_err(&adap->dev, "Can't reset the smbus\n"); 15062306a36Sopenharmony_ci outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT); 15162306a36Sopenharmony_ci} 15262306a36Sopenharmony_ci 15362306a36Sopenharmony_cistatic int nforce2_check_status(struct i2c_adapter *adap) 15462306a36Sopenharmony_ci{ 15562306a36Sopenharmony_ci struct nforce2_smbus *smbus = adap->algo_data; 15662306a36Sopenharmony_ci int timeout = 0; 15762306a36Sopenharmony_ci unsigned char temp; 15862306a36Sopenharmony_ci 15962306a36Sopenharmony_ci do { 16062306a36Sopenharmony_ci msleep(1); 16162306a36Sopenharmony_ci temp = inb_p(NVIDIA_SMB_STS); 16262306a36Sopenharmony_ci } while ((!temp) && (timeout++ < MAX_TIMEOUT)); 16362306a36Sopenharmony_ci 16462306a36Sopenharmony_ci if (timeout > MAX_TIMEOUT) { 16562306a36Sopenharmony_ci dev_dbg(&adap->dev, "SMBus Timeout!\n"); 16662306a36Sopenharmony_ci if (smbus->can_abort) 16762306a36Sopenharmony_ci nforce2_abort(adap); 16862306a36Sopenharmony_ci return -ETIMEDOUT; 16962306a36Sopenharmony_ci } 17062306a36Sopenharmony_ci if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) { 17162306a36Sopenharmony_ci dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp); 17262306a36Sopenharmony_ci return -EIO; 17362306a36Sopenharmony_ci } 17462306a36Sopenharmony_ci return 0; 17562306a36Sopenharmony_ci} 17662306a36Sopenharmony_ci 17762306a36Sopenharmony_ci/* Return negative errno on error */ 17862306a36Sopenharmony_cistatic s32 nforce2_access(struct i2c_adapter *adap, u16 addr, 17962306a36Sopenharmony_ci unsigned short flags, char read_write, 18062306a36Sopenharmony_ci u8 command, int size, union i2c_smbus_data *data) 18162306a36Sopenharmony_ci{ 18262306a36Sopenharmony_ci struct nforce2_smbus *smbus = adap->algo_data; 18362306a36Sopenharmony_ci unsigned char protocol, pec; 18462306a36Sopenharmony_ci u8 len; 18562306a36Sopenharmony_ci int i, status; 18662306a36Sopenharmony_ci 18762306a36Sopenharmony_ci protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ : 18862306a36Sopenharmony_ci NVIDIA_SMB_PRTCL_WRITE; 18962306a36Sopenharmony_ci pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0; 19062306a36Sopenharmony_ci 19162306a36Sopenharmony_ci switch (size) { 19262306a36Sopenharmony_ci case I2C_SMBUS_QUICK: 19362306a36Sopenharmony_ci protocol |= NVIDIA_SMB_PRTCL_QUICK; 19462306a36Sopenharmony_ci read_write = I2C_SMBUS_WRITE; 19562306a36Sopenharmony_ci break; 19662306a36Sopenharmony_ci 19762306a36Sopenharmony_ci case I2C_SMBUS_BYTE: 19862306a36Sopenharmony_ci if (read_write == I2C_SMBUS_WRITE) 19962306a36Sopenharmony_ci outb_p(command, NVIDIA_SMB_CMD); 20062306a36Sopenharmony_ci protocol |= NVIDIA_SMB_PRTCL_BYTE; 20162306a36Sopenharmony_ci break; 20262306a36Sopenharmony_ci 20362306a36Sopenharmony_ci case I2C_SMBUS_BYTE_DATA: 20462306a36Sopenharmony_ci outb_p(command, NVIDIA_SMB_CMD); 20562306a36Sopenharmony_ci if (read_write == I2C_SMBUS_WRITE) 20662306a36Sopenharmony_ci outb_p(data->byte, NVIDIA_SMB_DATA); 20762306a36Sopenharmony_ci protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA; 20862306a36Sopenharmony_ci break; 20962306a36Sopenharmony_ci 21062306a36Sopenharmony_ci case I2C_SMBUS_WORD_DATA: 21162306a36Sopenharmony_ci outb_p(command, NVIDIA_SMB_CMD); 21262306a36Sopenharmony_ci if (read_write == I2C_SMBUS_WRITE) { 21362306a36Sopenharmony_ci outb_p(data->word, NVIDIA_SMB_DATA); 21462306a36Sopenharmony_ci outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1); 21562306a36Sopenharmony_ci } 21662306a36Sopenharmony_ci protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec; 21762306a36Sopenharmony_ci break; 21862306a36Sopenharmony_ci 21962306a36Sopenharmony_ci case I2C_SMBUS_BLOCK_DATA: 22062306a36Sopenharmony_ci outb_p(command, NVIDIA_SMB_CMD); 22162306a36Sopenharmony_ci if (read_write == I2C_SMBUS_WRITE) { 22262306a36Sopenharmony_ci len = data->block[0]; 22362306a36Sopenharmony_ci if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) { 22462306a36Sopenharmony_ci dev_err(&adap->dev, 22562306a36Sopenharmony_ci "Transaction failed (requested block size: %d)\n", 22662306a36Sopenharmony_ci len); 22762306a36Sopenharmony_ci return -EINVAL; 22862306a36Sopenharmony_ci } 22962306a36Sopenharmony_ci outb_p(len, NVIDIA_SMB_BCNT); 23062306a36Sopenharmony_ci for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++) 23162306a36Sopenharmony_ci outb_p(data->block[i + 1], 23262306a36Sopenharmony_ci NVIDIA_SMB_DATA + i); 23362306a36Sopenharmony_ci } 23462306a36Sopenharmony_ci protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec; 23562306a36Sopenharmony_ci break; 23662306a36Sopenharmony_ci 23762306a36Sopenharmony_ci default: 23862306a36Sopenharmony_ci dev_err(&adap->dev, "Unsupported transaction %d\n", size); 23962306a36Sopenharmony_ci return -EOPNOTSUPP; 24062306a36Sopenharmony_ci } 24162306a36Sopenharmony_ci 24262306a36Sopenharmony_ci outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR); 24362306a36Sopenharmony_ci outb_p(protocol, NVIDIA_SMB_PRTCL); 24462306a36Sopenharmony_ci 24562306a36Sopenharmony_ci status = nforce2_check_status(adap); 24662306a36Sopenharmony_ci if (status) 24762306a36Sopenharmony_ci return status; 24862306a36Sopenharmony_ci 24962306a36Sopenharmony_ci if (read_write == I2C_SMBUS_WRITE) 25062306a36Sopenharmony_ci return 0; 25162306a36Sopenharmony_ci 25262306a36Sopenharmony_ci switch (size) { 25362306a36Sopenharmony_ci case I2C_SMBUS_BYTE: 25462306a36Sopenharmony_ci case I2C_SMBUS_BYTE_DATA: 25562306a36Sopenharmony_ci data->byte = inb_p(NVIDIA_SMB_DATA); 25662306a36Sopenharmony_ci break; 25762306a36Sopenharmony_ci 25862306a36Sopenharmony_ci case I2C_SMBUS_WORD_DATA: 25962306a36Sopenharmony_ci data->word = inb_p(NVIDIA_SMB_DATA) | 26062306a36Sopenharmony_ci (inb_p(NVIDIA_SMB_DATA + 1) << 8); 26162306a36Sopenharmony_ci break; 26262306a36Sopenharmony_ci 26362306a36Sopenharmony_ci case I2C_SMBUS_BLOCK_DATA: 26462306a36Sopenharmony_ci len = inb_p(NVIDIA_SMB_BCNT); 26562306a36Sopenharmony_ci if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) { 26662306a36Sopenharmony_ci dev_err(&adap->dev, 26762306a36Sopenharmony_ci "Transaction failed (received block size: 0x%02x)\n", 26862306a36Sopenharmony_ci len); 26962306a36Sopenharmony_ci return -EPROTO; 27062306a36Sopenharmony_ci } 27162306a36Sopenharmony_ci for (i = 0; i < len; i++) 27262306a36Sopenharmony_ci data->block[i + 1] = inb_p(NVIDIA_SMB_DATA + i); 27362306a36Sopenharmony_ci data->block[0] = len; 27462306a36Sopenharmony_ci break; 27562306a36Sopenharmony_ci } 27662306a36Sopenharmony_ci 27762306a36Sopenharmony_ci return 0; 27862306a36Sopenharmony_ci} 27962306a36Sopenharmony_ci 28062306a36Sopenharmony_ci 28162306a36Sopenharmony_cistatic u32 nforce2_func(struct i2c_adapter *adapter) 28262306a36Sopenharmony_ci{ 28362306a36Sopenharmony_ci /* other functionality might be possible, but is not tested */ 28462306a36Sopenharmony_ci return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 28562306a36Sopenharmony_ci I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 28662306a36Sopenharmony_ci I2C_FUNC_SMBUS_PEC | 28762306a36Sopenharmony_ci (((struct nforce2_smbus *)adapter->algo_data)->blockops ? 28862306a36Sopenharmony_ci I2C_FUNC_SMBUS_BLOCK_DATA : 0); 28962306a36Sopenharmony_ci} 29062306a36Sopenharmony_ci 29162306a36Sopenharmony_cistatic const struct i2c_algorithm smbus_algorithm = { 29262306a36Sopenharmony_ci .smbus_xfer = nforce2_access, 29362306a36Sopenharmony_ci .functionality = nforce2_func, 29462306a36Sopenharmony_ci}; 29562306a36Sopenharmony_ci 29662306a36Sopenharmony_ci 29762306a36Sopenharmony_cistatic const struct pci_device_id nforce2_ids[] = { 29862306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) }, 29962306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) }, 30062306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) }, 30162306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) }, 30262306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) }, 30362306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) }, 30462306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) }, 30562306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) }, 30662306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) }, 30762306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) }, 30862306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS) }, 30962306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS) }, 31062306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS) }, 31162306a36Sopenharmony_ci { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS) }, 31262306a36Sopenharmony_ci { 0 } 31362306a36Sopenharmony_ci}; 31462306a36Sopenharmony_ci 31562306a36Sopenharmony_ciMODULE_DEVICE_TABLE(pci, nforce2_ids); 31662306a36Sopenharmony_ci 31762306a36Sopenharmony_ci 31862306a36Sopenharmony_cistatic int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg, 31962306a36Sopenharmony_ci struct nforce2_smbus *smbus, const char *name) 32062306a36Sopenharmony_ci{ 32162306a36Sopenharmony_ci int error; 32262306a36Sopenharmony_ci 32362306a36Sopenharmony_ci smbus->base = pci_resource_start(dev, bar); 32462306a36Sopenharmony_ci if (smbus->base) { 32562306a36Sopenharmony_ci smbus->size = pci_resource_len(dev, bar); 32662306a36Sopenharmony_ci } else { 32762306a36Sopenharmony_ci /* Older incarnations of the device used non-standard BARs */ 32862306a36Sopenharmony_ci u16 iobase; 32962306a36Sopenharmony_ci 33062306a36Sopenharmony_ci error = pci_read_config_word(dev, alt_reg, &iobase); 33162306a36Sopenharmony_ci if (error != PCIBIOS_SUCCESSFUL) { 33262306a36Sopenharmony_ci dev_err(&dev->dev, "Error reading PCI config for %s\n", 33362306a36Sopenharmony_ci name); 33462306a36Sopenharmony_ci return -EIO; 33562306a36Sopenharmony_ci } 33662306a36Sopenharmony_ci 33762306a36Sopenharmony_ci smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK; 33862306a36Sopenharmony_ci smbus->size = 64; 33962306a36Sopenharmony_ci } 34062306a36Sopenharmony_ci 34162306a36Sopenharmony_ci error = acpi_check_region(smbus->base, smbus->size, 34262306a36Sopenharmony_ci nforce2_driver.name); 34362306a36Sopenharmony_ci if (error) 34462306a36Sopenharmony_ci return error; 34562306a36Sopenharmony_ci 34662306a36Sopenharmony_ci if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) { 34762306a36Sopenharmony_ci dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", 34862306a36Sopenharmony_ci smbus->base, smbus->base+smbus->size-1, name); 34962306a36Sopenharmony_ci return -EBUSY; 35062306a36Sopenharmony_ci } 35162306a36Sopenharmony_ci smbus->adapter.owner = THIS_MODULE; 35262306a36Sopenharmony_ci smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD; 35362306a36Sopenharmony_ci smbus->adapter.algo = &smbus_algorithm; 35462306a36Sopenharmony_ci smbus->adapter.algo_data = smbus; 35562306a36Sopenharmony_ci smbus->adapter.dev.parent = &dev->dev; 35662306a36Sopenharmony_ci snprintf(smbus->adapter.name, sizeof(smbus->adapter.name), 35762306a36Sopenharmony_ci "SMBus nForce2 adapter at %04x", smbus->base); 35862306a36Sopenharmony_ci 35962306a36Sopenharmony_ci error = i2c_add_adapter(&smbus->adapter); 36062306a36Sopenharmony_ci if (error) { 36162306a36Sopenharmony_ci release_region(smbus->base, smbus->size); 36262306a36Sopenharmony_ci return error; 36362306a36Sopenharmony_ci } 36462306a36Sopenharmony_ci dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", 36562306a36Sopenharmony_ci smbus->base); 36662306a36Sopenharmony_ci return 0; 36762306a36Sopenharmony_ci} 36862306a36Sopenharmony_ci 36962306a36Sopenharmony_ci 37062306a36Sopenharmony_cistatic int nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id) 37162306a36Sopenharmony_ci{ 37262306a36Sopenharmony_ci struct nforce2_smbus *smbuses; 37362306a36Sopenharmony_ci int res1, res2; 37462306a36Sopenharmony_ci 37562306a36Sopenharmony_ci /* we support 2 SMBus adapters */ 37662306a36Sopenharmony_ci smbuses = kcalloc(2, sizeof(struct nforce2_smbus), GFP_KERNEL); 37762306a36Sopenharmony_ci if (!smbuses) 37862306a36Sopenharmony_ci return -ENOMEM; 37962306a36Sopenharmony_ci pci_set_drvdata(dev, smbuses); 38062306a36Sopenharmony_ci 38162306a36Sopenharmony_ci switch (dev->device) { 38262306a36Sopenharmony_ci case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS: 38362306a36Sopenharmony_ci case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS: 38462306a36Sopenharmony_ci case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS: 38562306a36Sopenharmony_ci smbuses[0].blockops = 1; 38662306a36Sopenharmony_ci smbuses[1].blockops = 1; 38762306a36Sopenharmony_ci smbuses[0].can_abort = 1; 38862306a36Sopenharmony_ci smbuses[1].can_abort = 1; 38962306a36Sopenharmony_ci } 39062306a36Sopenharmony_ci 39162306a36Sopenharmony_ci /* SMBus adapter 1 */ 39262306a36Sopenharmony_ci res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1"); 39362306a36Sopenharmony_ci if (res1 < 0) 39462306a36Sopenharmony_ci smbuses[0].base = 0; /* to have a check value */ 39562306a36Sopenharmony_ci 39662306a36Sopenharmony_ci /* SMBus adapter 2 */ 39762306a36Sopenharmony_ci if (dmi_check_system(nforce2_dmi_blacklist2)) { 39862306a36Sopenharmony_ci dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n"); 39962306a36Sopenharmony_ci res2 = -EPERM; 40062306a36Sopenharmony_ci smbuses[1].base = 0; 40162306a36Sopenharmony_ci } else { 40262306a36Sopenharmony_ci res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], 40362306a36Sopenharmony_ci "SMB2"); 40462306a36Sopenharmony_ci if (res2 < 0) 40562306a36Sopenharmony_ci smbuses[1].base = 0; /* to have a check value */ 40662306a36Sopenharmony_ci } 40762306a36Sopenharmony_ci 40862306a36Sopenharmony_ci if ((res1 < 0) && (res2 < 0)) { 40962306a36Sopenharmony_ci /* we did not find even one of the SMBuses, so we give up */ 41062306a36Sopenharmony_ci kfree(smbuses); 41162306a36Sopenharmony_ci return -ENODEV; 41262306a36Sopenharmony_ci } 41362306a36Sopenharmony_ci 41462306a36Sopenharmony_ci nforce2_set_reference(&smbuses[0].adapter); 41562306a36Sopenharmony_ci return 0; 41662306a36Sopenharmony_ci} 41762306a36Sopenharmony_ci 41862306a36Sopenharmony_ci 41962306a36Sopenharmony_cistatic void nforce2_remove(struct pci_dev *dev) 42062306a36Sopenharmony_ci{ 42162306a36Sopenharmony_ci struct nforce2_smbus *smbuses = pci_get_drvdata(dev); 42262306a36Sopenharmony_ci 42362306a36Sopenharmony_ci nforce2_set_reference(NULL); 42462306a36Sopenharmony_ci if (smbuses[0].base) { 42562306a36Sopenharmony_ci i2c_del_adapter(&smbuses[0].adapter); 42662306a36Sopenharmony_ci release_region(smbuses[0].base, smbuses[0].size); 42762306a36Sopenharmony_ci } 42862306a36Sopenharmony_ci if (smbuses[1].base) { 42962306a36Sopenharmony_ci i2c_del_adapter(&smbuses[1].adapter); 43062306a36Sopenharmony_ci release_region(smbuses[1].base, smbuses[1].size); 43162306a36Sopenharmony_ci } 43262306a36Sopenharmony_ci kfree(smbuses); 43362306a36Sopenharmony_ci} 43462306a36Sopenharmony_ci 43562306a36Sopenharmony_cistatic struct pci_driver nforce2_driver = { 43662306a36Sopenharmony_ci .name = "nForce2_smbus", 43762306a36Sopenharmony_ci .id_table = nforce2_ids, 43862306a36Sopenharmony_ci .probe = nforce2_probe, 43962306a36Sopenharmony_ci .remove = nforce2_remove, 44062306a36Sopenharmony_ci}; 44162306a36Sopenharmony_ci 44262306a36Sopenharmony_cimodule_pci_driver(nforce2_driver); 443