162306a36Sopenharmony_ci/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Siemens System Memory Buffer driver.
462306a36Sopenharmony_ci * Copyright(c) 2022, HiSilicon Limited.
562306a36Sopenharmony_ci */
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci#ifndef _ULTRASOC_SMB_H
862306a36Sopenharmony_ci#define _ULTRASOC_SMB_H
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci#include <linux/miscdevice.h>
1162306a36Sopenharmony_ci#include <linux/spinlock.h>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci/* Offset of SMB global registers */
1462306a36Sopenharmony_ci#define SMB_GLB_CFG_REG		0x00
1562306a36Sopenharmony_ci#define SMB_GLB_EN_REG		0x04
1662306a36Sopenharmony_ci#define SMB_GLB_INT_REG		0x08
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci/* Offset of SMB logical buffer registers */
1962306a36Sopenharmony_ci#define SMB_LB_CFG_LO_REG	0x40
2062306a36Sopenharmony_ci#define SMB_LB_CFG_HI_REG	0x44
2162306a36Sopenharmony_ci#define SMB_LB_INT_CTRL_REG	0x48
2262306a36Sopenharmony_ci#define SMB_LB_INT_STS_REG	0x4c
2362306a36Sopenharmony_ci#define SMB_LB_RD_ADDR_REG	0x5c
2462306a36Sopenharmony_ci#define SMB_LB_WR_ADDR_REG	0x60
2562306a36Sopenharmony_ci#define SMB_LB_PURGE_REG	0x64
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci/* Set global config register */
2862306a36Sopenharmony_ci#define SMB_GLB_CFG_BURST_LEN_MSK	GENMASK(11, 4)
2962306a36Sopenharmony_ci#define SMB_GLB_CFG_IDLE_PRD_MSK	GENMASK(15, 12)
3062306a36Sopenharmony_ci#define SMB_GLB_CFG_MEM_WR_MSK		GENMASK(21, 16)
3162306a36Sopenharmony_ci#define SMB_GLB_CFG_MEM_RD_MSK		GENMASK(27, 22)
3262306a36Sopenharmony_ci#define SMB_GLB_CFG_DEFAULT	(FIELD_PREP(SMB_GLB_CFG_BURST_LEN_MSK, 0xf) | \
3362306a36Sopenharmony_ci				 FIELD_PREP(SMB_GLB_CFG_IDLE_PRD_MSK, 0xf) | \
3462306a36Sopenharmony_ci				 FIELD_PREP(SMB_GLB_CFG_MEM_WR_MSK, 0x3) | \
3562306a36Sopenharmony_ci				 FIELD_PREP(SMB_GLB_CFG_MEM_RD_MSK, 0x1b))
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci#define SMB_GLB_EN_HW_ENABLE	BIT(0)
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci/* Set global interrupt control register */
4062306a36Sopenharmony_ci#define SMB_GLB_INT_EN		BIT(0)
4162306a36Sopenharmony_ci#define SMB_GLB_INT_PULSE	BIT(1) /* Interrupt type: 1 - Pulse */
4262306a36Sopenharmony_ci#define SMB_GLB_INT_ACT_H	BIT(2) /* Interrupt polarity: 1 - Active high */
4362306a36Sopenharmony_ci#define SMB_GLB_INT_CFG		(SMB_GLB_INT_EN | SMB_GLB_INT_PULSE | \
4462306a36Sopenharmony_ci				 SMB_GLB_INT_ACT_H)
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ci/* Set logical buffer config register lower 32 bits */
4762306a36Sopenharmony_ci#define SMB_LB_CFG_LO_EN		BIT(0)
4862306a36Sopenharmony_ci#define SMB_LB_CFG_LO_SINGLE_END	BIT(1)
4962306a36Sopenharmony_ci#define SMB_LB_CFG_LO_INIT		BIT(8)
5062306a36Sopenharmony_ci#define SMB_LB_CFG_LO_CONT		BIT(11)
5162306a36Sopenharmony_ci#define SMB_LB_CFG_LO_FLOW_MSK		GENMASK(19, 16)
5262306a36Sopenharmony_ci#define SMB_LB_CFG_LO_DEFAULT	(SMB_LB_CFG_LO_EN | SMB_LB_CFG_LO_SINGLE_END | \
5362306a36Sopenharmony_ci				 SMB_LB_CFG_LO_INIT | SMB_LB_CFG_LO_CONT | \
5462306a36Sopenharmony_ci				 FIELD_PREP(SMB_LB_CFG_LO_FLOW_MSK, 0xf))
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ci/* Set logical buffer config register upper 32 bits */
5762306a36Sopenharmony_ci#define SMB_LB_CFG_HI_RANGE_UP_MSK	GENMASK(15, 8)
5862306a36Sopenharmony_ci#define SMB_LB_CFG_HI_DEFAULT	FIELD_PREP(SMB_LB_CFG_HI_RANGE_UP_MSK, 0xff)
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci/*
6162306a36Sopenharmony_ci * Set logical buffer interrupt control register.
6262306a36Sopenharmony_ci * The register control the validity of both real-time events and
6362306a36Sopenharmony_ci * interrupts. When logical buffer status changes causes to issue
6462306a36Sopenharmony_ci * an interrupt at the same time as it issues a real-time event.
6562306a36Sopenharmony_ci * Real-time events are used in SMB driver, which needs to get the buffer
6662306a36Sopenharmony_ci * status. Interrupts are used in debugger mode.
6762306a36Sopenharmony_ci * SMB_LB_INT_CTRL_BUF_NOTE_MASK control which events flags or interrupts
6862306a36Sopenharmony_ci * are valid.
6962306a36Sopenharmony_ci */
7062306a36Sopenharmony_ci#define SMB_LB_INT_CTRL_EN		BIT(0)
7162306a36Sopenharmony_ci#define SMB_LB_INT_CTRL_BUF_NOTE_MSK	GENMASK(11, 8)
7262306a36Sopenharmony_ci#define SMB_LB_INT_CTRL_CFG	(SMB_LB_INT_CTRL_EN | \
7362306a36Sopenharmony_ci				 FIELD_PREP(SMB_LB_INT_CTRL_BUF_NOTE_MSK, 0xf))
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci/* Set logical buffer interrupt status register */
7662306a36Sopenharmony_ci#define SMB_LB_INT_STS_NOT_EMPTY_MSK	BIT(0)
7762306a36Sopenharmony_ci#define SMB_LB_INT_STS_BUF_RESET_MSK	GENMASK(3, 0)
7862306a36Sopenharmony_ci#define SMB_LB_INT_STS_RESET	FIELD_PREP(SMB_LB_INT_STS_BUF_RESET_MSK, 0xf)
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ci#define SMB_LB_PURGE_PURGED	BIT(0)
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_ci#define SMB_REG_ADDR_RES	0
8362306a36Sopenharmony_ci#define SMB_BUF_ADDR_RES	1
8462306a36Sopenharmony_ci#define SMB_BUF_ADDR_LO_MSK	GENMASK(31, 0)
8562306a36Sopenharmony_ci
8662306a36Sopenharmony_ci/**
8762306a36Sopenharmony_ci * struct smb_data_buffer - Details of the buffer used by SMB
8862306a36Sopenharmony_ci * @buf_base:	Memory mapped base address of SMB.
8962306a36Sopenharmony_ci * @buf_hw_base:	SMB buffer start Physical base address, only used 32bits.
9062306a36Sopenharmony_ci * @buf_size:	Size of the buffer.
9162306a36Sopenharmony_ci * @data_size:	Size of the available trace data for SMB.
9262306a36Sopenharmony_ci * @buf_rdptr:	Current read position (index) within the buffer.
9362306a36Sopenharmony_ci */
9462306a36Sopenharmony_cistruct smb_data_buffer {
9562306a36Sopenharmony_ci	void *buf_base;
9662306a36Sopenharmony_ci	u32 buf_hw_base;
9762306a36Sopenharmony_ci	unsigned long buf_size;
9862306a36Sopenharmony_ci	unsigned long data_size;
9962306a36Sopenharmony_ci	unsigned long buf_rdptr;
10062306a36Sopenharmony_ci};
10162306a36Sopenharmony_ci
10262306a36Sopenharmony_ci/**
10362306a36Sopenharmony_ci * struct smb_drv_data - specifics associated to an SMB component
10462306a36Sopenharmony_ci * @base:	Memory mapped base address for SMB component.
10562306a36Sopenharmony_ci * @csdev:	Component vitals needed by the framework.
10662306a36Sopenharmony_ci * @sdb:	Data buffer for SMB.
10762306a36Sopenharmony_ci * @miscdev:	Specifics to handle "/dev/xyz.smb" entry.
10862306a36Sopenharmony_ci * @spinlock:	Control data access to one at a time.
10962306a36Sopenharmony_ci * @reading:	Synchronise user space access to SMB buffer.
11062306a36Sopenharmony_ci * @pid:	Process ID of the process being monitored by the
11162306a36Sopenharmony_ci *		session that is using this component.
11262306a36Sopenharmony_ci * @mode:	How this SMB is being used, perf mode or sysfs mode.
11362306a36Sopenharmony_ci */
11462306a36Sopenharmony_cistruct smb_drv_data {
11562306a36Sopenharmony_ci	void __iomem *base;
11662306a36Sopenharmony_ci	struct coresight_device	*csdev;
11762306a36Sopenharmony_ci	struct smb_data_buffer sdb;
11862306a36Sopenharmony_ci	struct miscdevice miscdev;
11962306a36Sopenharmony_ci	spinlock_t spinlock;
12062306a36Sopenharmony_ci	bool reading;
12162306a36Sopenharmony_ci	pid_t pid;
12262306a36Sopenharmony_ci	enum cs_mode mode;
12362306a36Sopenharmony_ci};
12462306a36Sopenharmony_ci
12562306a36Sopenharmony_ci#endif
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