162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (c) 2022, NVIDIA Corporation. 462306a36Sopenharmony_ci */ 562306a36Sopenharmony_ci 662306a36Sopenharmony_ci#ifndef DRM_TEGRA_RISCV_H 762306a36Sopenharmony_ci#define DRM_TEGRA_RISCV_H 862306a36Sopenharmony_ci 962306a36Sopenharmony_cistruct tegra_drm_riscv_descriptor { 1062306a36Sopenharmony_ci u32 manifest_offset; 1162306a36Sopenharmony_ci u32 code_offset; 1262306a36Sopenharmony_ci u32 code_size; 1362306a36Sopenharmony_ci u32 data_offset; 1462306a36Sopenharmony_ci u32 data_size; 1562306a36Sopenharmony_ci}; 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_cistruct tegra_drm_riscv { 1862306a36Sopenharmony_ci /* User initializes */ 1962306a36Sopenharmony_ci struct device *dev; 2062306a36Sopenharmony_ci void __iomem *regs; 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci struct tegra_drm_riscv_descriptor bl_desc; 2362306a36Sopenharmony_ci struct tegra_drm_riscv_descriptor os_desc; 2462306a36Sopenharmony_ci}; 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ciint tegra_drm_riscv_read_descriptors(struct tegra_drm_riscv *riscv); 2762306a36Sopenharmony_ciint tegra_drm_riscv_boot_bootrom(struct tegra_drm_riscv *riscv, phys_addr_t image_address, 2862306a36Sopenharmony_ci u32 gscid, const struct tegra_drm_riscv_descriptor *desc); 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci#endif 31