162306a36Sopenharmony_ci/*
262306a36Sopenharmony_ci * Copyright 2014 Advanced Micro Devices, Inc.
362306a36Sopenharmony_ci * All Rights Reserved.
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Permission is hereby granted, free of charge, to any person obtaining a
662306a36Sopenharmony_ci * copy of this software and associated documentation files (the
762306a36Sopenharmony_ci * "Software"), to deal in the Software without restriction, including
862306a36Sopenharmony_ci * without limitation the rights to use, copy, modify, merge, publish,
962306a36Sopenharmony_ci * distribute, sub license, and/or sell copies of the Software, and to
1062306a36Sopenharmony_ci * permit persons to whom the Software is furnished to do so, subject to
1162306a36Sopenharmony_ci * the following conditions:
1262306a36Sopenharmony_ci *
1362306a36Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1462306a36Sopenharmony_ci * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1562306a36Sopenharmony_ci * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
1662306a36Sopenharmony_ci * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
1762306a36Sopenharmony_ci * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
1862306a36Sopenharmony_ci * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
1962306a36Sopenharmony_ci * USE OR OTHER DEALINGS IN THE SOFTWARE.
2062306a36Sopenharmony_ci *
2162306a36Sopenharmony_ci * The above copyright notice and this permission notice (including the
2262306a36Sopenharmony_ci * next paragraph) shall be included in all copies or substantial portions
2362306a36Sopenharmony_ci * of the Software.
2462306a36Sopenharmony_ci *
2562306a36Sopenharmony_ci */
2662306a36Sopenharmony_ci/*
2762306a36Sopenharmony_ci * Authors:
2862306a36Sopenharmony_ci *    Christian König <christian.koenig@amd.com>
2962306a36Sopenharmony_ci */
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci#include <linux/firmware.h>
3262306a36Sopenharmony_ci#include <linux/module.h>
3362306a36Sopenharmony_ci#include <linux/mmu_notifier.h>
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci#include <drm/drm.h>
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci#include "radeon.h"
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci/**
4062306a36Sopenharmony_ci * radeon_mn_invalidate - callback to notify about mm change
4162306a36Sopenharmony_ci *
4262306a36Sopenharmony_ci * @mn: our notifier
4362306a36Sopenharmony_ci * @range: the VMA under invalidation
4462306a36Sopenharmony_ci * @cur_seq: Value to pass to mmu_interval_set_seq()
4562306a36Sopenharmony_ci *
4662306a36Sopenharmony_ci * We block for all BOs between start and end to be idle and
4762306a36Sopenharmony_ci * unmap them by move them into system domain again.
4862306a36Sopenharmony_ci */
4962306a36Sopenharmony_cistatic bool radeon_mn_invalidate(struct mmu_interval_notifier *mn,
5062306a36Sopenharmony_ci				 const struct mmu_notifier_range *range,
5162306a36Sopenharmony_ci				 unsigned long cur_seq)
5262306a36Sopenharmony_ci{
5362306a36Sopenharmony_ci	struct radeon_bo *bo = container_of(mn, struct radeon_bo, notifier);
5462306a36Sopenharmony_ci	struct ttm_operation_ctx ctx = { false, false };
5562306a36Sopenharmony_ci	long r;
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci	if (!bo->tbo.ttm || !radeon_ttm_tt_is_bound(bo->tbo.bdev, bo->tbo.ttm))
5862306a36Sopenharmony_ci		return true;
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci	if (!mmu_notifier_range_blockable(range))
6162306a36Sopenharmony_ci		return false;
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci	r = radeon_bo_reserve(bo, true);
6462306a36Sopenharmony_ci	if (r) {
6562306a36Sopenharmony_ci		DRM_ERROR("(%ld) failed to reserve user bo\n", r);
6662306a36Sopenharmony_ci		return true;
6762306a36Sopenharmony_ci	}
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ci	r = dma_resv_wait_timeout(bo->tbo.base.resv, DMA_RESV_USAGE_BOOKKEEP,
7062306a36Sopenharmony_ci				  false, MAX_SCHEDULE_TIMEOUT);
7162306a36Sopenharmony_ci	if (r <= 0)
7262306a36Sopenharmony_ci		DRM_ERROR("(%ld) failed to wait for user bo\n", r);
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ci	radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_CPU);
7562306a36Sopenharmony_ci	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
7662306a36Sopenharmony_ci	if (r)
7762306a36Sopenharmony_ci		DRM_ERROR("(%ld) failed to validate user bo\n", r);
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_ci	radeon_bo_unreserve(bo);
8062306a36Sopenharmony_ci	return true;
8162306a36Sopenharmony_ci}
8262306a36Sopenharmony_ci
8362306a36Sopenharmony_cistatic const struct mmu_interval_notifier_ops radeon_mn_ops = {
8462306a36Sopenharmony_ci	.invalidate = radeon_mn_invalidate,
8562306a36Sopenharmony_ci};
8662306a36Sopenharmony_ci
8762306a36Sopenharmony_ci/**
8862306a36Sopenharmony_ci * radeon_mn_register - register a BO for notifier updates
8962306a36Sopenharmony_ci *
9062306a36Sopenharmony_ci * @bo: radeon buffer object
9162306a36Sopenharmony_ci * @addr: userptr addr we should monitor
9262306a36Sopenharmony_ci *
9362306a36Sopenharmony_ci * Registers an MMU notifier for the given BO at the specified address.
9462306a36Sopenharmony_ci * Returns 0 on success, -ERRNO if anything goes wrong.
9562306a36Sopenharmony_ci */
9662306a36Sopenharmony_ciint radeon_mn_register(struct radeon_bo *bo, unsigned long addr)
9762306a36Sopenharmony_ci{
9862306a36Sopenharmony_ci	int ret;
9962306a36Sopenharmony_ci
10062306a36Sopenharmony_ci	ret = mmu_interval_notifier_insert(&bo->notifier, current->mm, addr,
10162306a36Sopenharmony_ci					   radeon_bo_size(bo), &radeon_mn_ops);
10262306a36Sopenharmony_ci	if (ret)
10362306a36Sopenharmony_ci		return ret;
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_ci	/*
10662306a36Sopenharmony_ci	 * FIXME: radeon appears to allow get_user_pages to run during
10762306a36Sopenharmony_ci	 * invalidate_range_start/end, which is not a safe way to read the
10862306a36Sopenharmony_ci	 * PTEs. It should use the mmu_interval_read_begin() scheme around the
10962306a36Sopenharmony_ci	 * get_user_pages to ensure that the PTEs are read properly
11062306a36Sopenharmony_ci	 */
11162306a36Sopenharmony_ci	mmu_interval_read_begin(&bo->notifier);
11262306a36Sopenharmony_ci	return 0;
11362306a36Sopenharmony_ci}
11462306a36Sopenharmony_ci
11562306a36Sopenharmony_ci/**
11662306a36Sopenharmony_ci * radeon_mn_unregister - unregister a BO for notifier updates
11762306a36Sopenharmony_ci *
11862306a36Sopenharmony_ci * @bo: radeon buffer object
11962306a36Sopenharmony_ci *
12062306a36Sopenharmony_ci * Remove any registration of MMU notifier updates from the buffer object.
12162306a36Sopenharmony_ci */
12262306a36Sopenharmony_civoid radeon_mn_unregister(struct radeon_bo *bo)
12362306a36Sopenharmony_ci{
12462306a36Sopenharmony_ci	if (!bo->notifier.mm)
12562306a36Sopenharmony_ci		return;
12662306a36Sopenharmony_ci	mmu_interval_notifier_remove(&bo->notifier);
12762306a36Sopenharmony_ci	bo->notifier.mm = NULL;
12862306a36Sopenharmony_ci}
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