1//SPDX-License-Identifier: GPL-2.0-only
2//Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3
4#include <linux/backlight.h>
5#include <linux/delay.h>
6#include <linux/gpio/consumer.h>
7#include <linux/module.h>
8#include <linux/of.h>
9#include <linux/regulator/consumer.h>
10
11#include <drm/drm_mipi_dsi.h>
12#include <drm/drm_probe_helper.h>
13#include <drm/drm_modes.h>
14#include <drm/drm_panel.h>
15#include <drm/display/drm_dsc.h>
16#include <drm/display/drm_dsc_helper.h>
17
18#include <video/mipi_display.h>
19
20struct visionox_r66451 {
21	struct drm_panel panel;
22	struct mipi_dsi_device *dsi;
23	struct gpio_desc *reset_gpio;
24	struct regulator_bulk_data supplies[2];
25	bool prepared, enabled;
26};
27
28static inline struct visionox_r66451 *to_visionox_r66451(struct drm_panel *panel)
29{
30	return container_of(panel, struct visionox_r66451, panel);
31}
32
33static void visionox_r66451_reset(struct visionox_r66451 *ctx)
34{
35	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
36	usleep_range(10000, 10100);
37	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
38	usleep_range(10000, 10100);
39	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
40	usleep_range(10000, 10100);
41}
42
43static int visionox_r66451_on(struct visionox_r66451 *ctx)
44{
45	struct mipi_dsi_device *dsi = ctx->dsi;
46
47	dsi->mode_flags |= MIPI_DSI_MODE_LPM;
48
49	mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00);
50	mipi_dsi_dcs_write_seq(dsi, 0xc2,
51			       0x09, 0x24, 0x0c, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00,
52			       0x09, 0x3c);
53	mipi_dsi_dcs_write_seq(dsi, 0xd7,
54			       0x00, 0xb9, 0x3c, 0x00, 0x40, 0x04, 0x00, 0xa0, 0x0a,
55			       0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19,
56			       0x3c, 0x00, 0x40, 0x04, 0x00, 0xa0, 0x0a);
57	mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x80);
58	mipi_dsi_dcs_write_seq(dsi, 0xde,
59			       0x40, 0x00, 0x18, 0x00, 0x18, 0x00, 0x18, 0x00, 0x18,
60			       0x10, 0x00, 0x18, 0x00, 0x18, 0x00, 0x18, 0x02, 0x00, 0x00);
61	mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x04);
62	mipi_dsi_dcs_write_seq(dsi, 0xe8, 0x00, 0x02);
63	mipi_dsi_dcs_write_seq(dsi, 0xe4, 0x00, 0x08);
64	mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00);
65	mipi_dsi_dcs_write_seq(dsi, 0xc4,
66			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
67			       0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x32);
68	mipi_dsi_dcs_write_seq(dsi, 0xcf,
69			       0x64, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
70			       0x00, 0x0b, 0x77, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
71			       0x02, 0x02, 0x02, 0x02, 0x02, 0x03);
72	mipi_dsi_dcs_write_seq(dsi, 0xd3,
73			       0x45, 0x00, 0x00, 0x01, 0x13, 0x15, 0x00, 0x15, 0x07,
74			       0x0f, 0x77, 0x77, 0x77, 0x37, 0xb2, 0x11, 0x00, 0xa0,
75			       0x3c, 0x9c);
76	mipi_dsi_dcs_write_seq(dsi, 0xd7,
77			       0x00, 0xb9, 0x34, 0x00, 0x40, 0x04, 0x00, 0xa0, 0x0a,
78			       0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19,
79			       0x34, 0x00, 0x40, 0x04, 0x00, 0xa0, 0x0a);
80	mipi_dsi_dcs_write_seq(dsi, 0xd8,
81			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
82			       0x3a, 0x00, 0x3a, 0x00, 0x3a, 0x00, 0x3a, 0x00, 0x3a,
83			       0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
84			       0x00, 0x0a, 0x00, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
85			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,
86			       0x00, 0x32, 0x00, 0x0a, 0x00, 0x22);
87	mipi_dsi_dcs_write_seq(dsi, 0xdf,
88			       0x50, 0x42, 0x58, 0x81, 0x2d, 0x00, 0x00, 0x00, 0x00,
89			       0x00, 0x00, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
90			       0x00, 0x00, 0x01, 0x0f, 0xff, 0xd4, 0x0e, 0x00, 0x00,
91			       0x00, 0x00, 0x00, 0x00, 0x0f, 0x53, 0xf1, 0x00, 0x00,
92			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
93	mipi_dsi_dcs_write_seq(dsi, 0xf7, 0x01);
94	mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x80);
95	mipi_dsi_dcs_write_seq(dsi, 0xe4, 0x34, 0xb4, 0x00, 0x00, 0x00, 0x39, 0x04, 0x09, 0x34);
96	mipi_dsi_dcs_write_seq(dsi, 0xe6, 0x00);
97	mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x04);
98	mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x50, 0x40);
99	mipi_dsi_dcs_write_seq(dsi, 0xf3, 0x50, 0x00, 0x00, 0x00, 0x00);
100	mipi_dsi_dcs_write_seq(dsi, 0xf2, 0x11);
101	mipi_dsi_dcs_write_seq(dsi, 0xf3, 0x01, 0x00, 0x00, 0x00, 0x01);
102	mipi_dsi_dcs_write_seq(dsi, 0xf4, 0x00, 0x02);
103	mipi_dsi_dcs_write_seq(dsi, 0xf2, 0x19);
104	mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x50, 0x42);
105	mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
106	mipi_dsi_dcs_set_column_address(dsi, 0, 1080 - 1);
107	mipi_dsi_dcs_set_page_address(dsi, 0, 2340 - 1);
108
109	dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
110
111	return 0;
112}
113
114static int visionox_r66451_off(struct visionox_r66451 *ctx)
115{
116	ctx->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
117	return 0;
118}
119
120static int visionox_r66451_prepare(struct drm_panel *panel)
121{
122	struct visionox_r66451 *ctx = to_visionox_r66451(panel);
123	struct mipi_dsi_device *dsi = ctx->dsi;
124	struct device *dev = &dsi->dev;
125	int ret;
126
127	if (ctx->prepared)
128		return 0;
129
130	ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies),
131				    ctx->supplies);
132	if (ret < 0)
133		return ret;
134
135	visionox_r66451_reset(ctx);
136
137	ret = visionox_r66451_on(ctx);
138	if (ret < 0) {
139		dev_err(dev, "Failed to initialize panel: %d\n", ret);
140		gpiod_set_value_cansleep(ctx->reset_gpio, 1);
141		regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
142		return ret;
143	}
144
145	mipi_dsi_compression_mode(ctx->dsi, true);
146
147	ctx->prepared = true;
148	return 0;
149}
150
151static int visionox_r66451_unprepare(struct drm_panel *panel)
152{
153	struct visionox_r66451 *ctx = to_visionox_r66451(panel);
154	struct device *dev = &ctx->dsi->dev;
155	int ret;
156
157	if (!ctx->prepared)
158		return 0;
159
160	ret = visionox_r66451_off(ctx);
161	if (ret < 0)
162		dev_err(dev, "Failed to un-initialize panel: %d\n", ret);
163
164	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
165	regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
166
167	ctx->prepared = false;
168	return 0;
169}
170
171static const struct drm_display_mode visionox_r66451_mode = {
172	.clock = 345830,
173	.hdisplay = 1080,
174	.hsync_start = 1175,
175	.hsync_end = 1176,
176	.htotal = 1216,
177	.vdisplay = 2340,
178	.vsync_start = 2365,
179	.vsync_end = 2366,
180	.vtotal = 2370,
181	.width_mm = 0,
182	.height_mm = 0,
183	.type = DRM_MODE_TYPE_DRIVER,
184};
185
186static int visionox_r66451_enable(struct drm_panel *panel)
187{
188	struct visionox_r66451 *ctx = to_visionox_r66451(panel);
189	struct mipi_dsi_device *dsi = ctx->dsi;
190	struct drm_dsc_picture_parameter_set pps;
191	int ret;
192
193	if (ctx->enabled)
194		return 0;
195
196	if (!dsi->dsc) {
197		dev_err(&dsi->dev, "DSC not attached to DSI\n");
198		return -ENODEV;
199	}
200
201	drm_dsc_pps_payload_pack(&pps, dsi->dsc);
202	ret = mipi_dsi_picture_parameter_set(dsi, &pps);
203	if (ret) {
204		dev_err(&dsi->dev, "Failed to set PPS\n");
205		return ret;
206	}
207
208	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
209	if (ret < 0) {
210		dev_err(&dsi->dev, "Failed to exit sleep mode: %d\n", ret);
211		return ret;
212	}
213	msleep(120);
214
215	ret = mipi_dsi_dcs_set_display_on(dsi);
216	if (ret < 0) {
217		dev_err(&dsi->dev, "Failed on set display on: %d\n", ret);
218		return ret;
219	}
220	msleep(20);
221
222	ctx->enabled = true;
223
224	return 0;
225}
226
227static int visionox_r66451_disable(struct drm_panel *panel)
228{
229	struct visionox_r66451 *ctx = to_visionox_r66451(panel);
230	struct mipi_dsi_device *dsi = ctx->dsi;
231	struct device *dev = &dsi->dev;
232	int ret;
233
234	ctx->enabled = false;
235
236	ret = mipi_dsi_dcs_set_display_off(dsi);
237	if (ret < 0) {
238		dev_err(dev, "Failed to set display off: %d\n", ret);
239		return ret;
240	}
241	msleep(20);
242
243	ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
244	if (ret < 0) {
245		dev_err(dev, "Failed to enter sleep mode: %d\n", ret);
246		return ret;
247	}
248	msleep(120);
249
250	return 0;
251}
252
253static int visionox_r66451_get_modes(struct drm_panel *panel,
254				    struct drm_connector *connector)
255{
256	drm_connector_helper_get_modes_fixed(connector, &visionox_r66451_mode);
257	return 1;
258}
259
260static const struct drm_panel_funcs visionox_r66451_funcs = {
261	.prepare = visionox_r66451_prepare,
262	.unprepare = visionox_r66451_unprepare,
263	.get_modes = visionox_r66451_get_modes,
264	.enable = visionox_r66451_enable,
265	.disable = visionox_r66451_disable,
266};
267
268static int visionox_r66451_bl_update_status(struct backlight_device *bl)
269{
270	struct mipi_dsi_device *dsi = bl_get_data(bl);
271	u16 brightness = backlight_get_brightness(bl);
272
273	return mipi_dsi_dcs_set_display_brightness(dsi, brightness);
274}
275
276static const struct backlight_ops visionox_r66451_bl_ops = {
277	.update_status = visionox_r66451_bl_update_status,
278};
279
280static struct backlight_device *
281visionox_r66451_create_backlight(struct mipi_dsi_device *dsi)
282{
283	struct device *dev = &dsi->dev;
284	const struct backlight_properties props = {
285		.type = BACKLIGHT_RAW,
286		.brightness = 255,
287		.max_brightness = 4095,
288	};
289
290	return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
291					      &visionox_r66451_bl_ops, &props);
292}
293
294static int visionox_r66451_probe(struct mipi_dsi_device *dsi)
295{
296	struct device *dev = &dsi->dev;
297	struct visionox_r66451 *ctx;
298	struct drm_dsc_config *dsc;
299	int ret = 0;
300
301	ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
302	if (!ctx)
303		return -ENOMEM;
304
305	dsc = devm_kzalloc(dev, sizeof(*dsc), GFP_KERNEL);
306	if (!dsc)
307		return -ENOMEM;
308
309	/* Set DSC params */
310	dsc->dsc_version_major = 0x1;
311	dsc->dsc_version_minor = 0x2;
312
313	dsc->slice_height = 20;
314	dsc->slice_width = 540;
315	dsc->slice_count = 2;
316	dsc->bits_per_component = 8;
317	dsc->bits_per_pixel = 8 << 4;
318	dsc->block_pred_enable = true;
319
320	dsi->dsc = dsc;
321
322	ctx->supplies[0].supply = "vddio";
323	ctx->supplies[1].supply = "vdd";
324
325	ret = devm_regulator_bulk_get(&dsi->dev, ARRAY_SIZE(ctx->supplies),
326			ctx->supplies);
327
328	if (ret < 0)
329		return ret;
330
331	ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
332	if (IS_ERR(ctx->reset_gpio))
333		return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), "Failed to get reset-gpios\n");
334
335	ctx->dsi = dsi;
336	mipi_dsi_set_drvdata(dsi, ctx);
337
338	dsi->lanes = 4;
339	dsi->format = MIPI_DSI_FMT_RGB888;
340	dsi->mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS;
341
342	drm_panel_init(&ctx->panel, dev, &visionox_r66451_funcs, DRM_MODE_CONNECTOR_DSI);
343	ctx->panel.backlight = visionox_r66451_create_backlight(dsi);
344	if (IS_ERR(ctx->panel.backlight))
345		return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight),
346				"Failed to create backlight\n");
347
348	drm_panel_add(&ctx->panel);
349
350	ret = mipi_dsi_attach(dsi);
351	if (ret < 0) {
352		dev_err(dev, "Failed to attach to DSI host: %d\n", ret);
353		drm_panel_remove(&ctx->panel);
354	}
355
356	return ret;
357}
358
359static void visionox_r66451_remove(struct mipi_dsi_device *dsi)
360{
361	struct visionox_r66451 *ctx = mipi_dsi_get_drvdata(dsi);
362	int ret;
363
364	ret = mipi_dsi_detach(dsi);
365	if (ret < 0)
366		dev_err(&dsi->dev, "Failed to detach DSI host: %d\n", ret);
367
368	drm_panel_remove(&ctx->panel);
369}
370
371static const struct of_device_id visionox_r66451_of_match[] = {
372	{.compatible = "visionox,r66451"},
373	{ /*sentinel*/ }
374};
375MODULE_DEVICE_TABLE(of, visionox_r66451_of_match);
376
377static struct mipi_dsi_driver visionox_r66451_driver = {
378	.probe = visionox_r66451_probe,
379	.remove = visionox_r66451_remove,
380	.driver = {
381		.name = "panel-visionox-r66451",
382		.of_match_table = visionox_r66451_of_match,
383	},
384};
385
386module_mipi_dsi_driver(visionox_r66451_driver);
387
388MODULE_AUTHOR("Jessica Zhang <quic_jesszhan@quicinc.com>");
389MODULE_DESCRIPTION("Panel driver for the Visionox R66451 AMOLED DSI panel");
390MODULE_LICENSE("GPL");
391