1/* 2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sub license, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the 12 * next paragraph) shall be included in all copies or substantial portions 13 * of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24#include <linux/debugfs.h> 25#include <linux/delay.h> 26#include <linux/gpio/consumer.h> 27#include <linux/iopoll.h> 28#include <linux/module.h> 29#include <linux/of_platform.h> 30#include <linux/platform_device.h> 31#include <linux/pm_runtime.h> 32#include <linux/regulator/consumer.h> 33 34#include <video/display_timing.h> 35#include <video/of_display_timing.h> 36#include <video/videomode.h> 37 38#include <drm/display/drm_dp_aux_bus.h> 39#include <drm/display/drm_dp_helper.h> 40#include <drm/drm_crtc.h> 41#include <drm/drm_device.h> 42#include <drm/drm_edid.h> 43#include <drm/drm_panel.h> 44 45/** 46 * struct panel_delay - Describes delays for a simple panel. 47 */ 48struct panel_delay { 49 /** 50 * @hpd_reliable: Time for HPD to be reliable 51 * 52 * The time (in milliseconds) that it takes after powering the panel 53 * before the HPD signal is reliable. Ideally this is 0 but some panels, 54 * board designs, or bad pulldown configs can cause a glitch here. 55 * 56 * NOTE: on some old panel data this number appears to be much too big. 57 * Presumably some old panels simply didn't have HPD hooked up and put 58 * the hpd_absent here because this field predates the 59 * hpd_absent. While that works, it's non-ideal. 60 */ 61 unsigned int hpd_reliable; 62 63 /** 64 * @hpd_absent: Time to wait if HPD isn't hooked up. 65 * 66 * Add this to the prepare delay if we know Hot Plug Detect isn't used. 67 * 68 * This is T3-max on eDP timing diagrams or the delay from power on 69 * until HPD is guaranteed to be asserted. 70 */ 71 unsigned int hpd_absent; 72 73 /** 74 * @prepare_to_enable: Time between prepare and enable. 75 * 76 * The minimum time, in milliseconds, that needs to have passed 77 * between when prepare finished and enable may begin. If at 78 * enable time less time has passed since prepare finished, 79 * the driver waits for the remaining time. 80 * 81 * If a fixed enable delay is also specified, we'll start 82 * counting before delaying for the fixed delay. 83 * 84 * If a fixed prepare delay is also specified, we won't start 85 * counting until after the fixed delay. We can't overlap this 86 * fixed delay with the min time because the fixed delay 87 * doesn't happen at the end of the function if a HPD GPIO was 88 * specified. 89 * 90 * In other words: 91 * prepare() 92 * ... 93 * // do fixed prepare delay 94 * // wait for HPD GPIO if applicable 95 * // start counting for prepare_to_enable 96 * 97 * enable() 98 * // do fixed enable delay 99 * // enforce prepare_to_enable min time 100 * 101 * This is not specified in a standard way on eDP timing diagrams. 102 * It is effectively the time from HPD going high till you can 103 * turn on the backlight. 104 */ 105 unsigned int prepare_to_enable; 106 107 /** 108 * @enable: Time for the panel to display a valid frame. 109 * 110 * The time (in milliseconds) that it takes for the panel to 111 * display the first valid frame after starting to receive 112 * video data. 113 * 114 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or 115 * the delay after link training finishes until we can turn the 116 * backlight on and see valid data. 117 */ 118 unsigned int enable; 119 120 /** 121 * @disable: Time for the panel to turn the display off. 122 * 123 * The time (in milliseconds) that it takes for the panel to 124 * turn the display off (no content is visible). 125 * 126 * This is T9-min (delay from backlight off to end of valid video 127 * data) on eDP timing diagrams. It is not common to set. 128 */ 129 unsigned int disable; 130 131 /** 132 * @unprepare: Time to power down completely. 133 * 134 * The time (in milliseconds) that it takes for the panel 135 * to power itself down completely. 136 * 137 * This time is used to prevent a future "prepare" from 138 * starting until at least this many milliseconds has passed. 139 * If at prepare time less time has passed since unprepare 140 * finished, the driver waits for the remaining time. 141 * 142 * This is T12-min on eDP timing diagrams. 143 */ 144 unsigned int unprepare; 145}; 146 147/** 148 * struct panel_desc - Describes a simple panel. 149 */ 150struct panel_desc { 151 /** 152 * @modes: Pointer to array of fixed modes appropriate for this panel. 153 * 154 * If only one mode then this can just be the address of the mode. 155 * NOTE: cannot be used with "timings" and also if this is specified 156 * then you cannot override the mode in the device tree. 157 */ 158 const struct drm_display_mode *modes; 159 160 /** @num_modes: Number of elements in modes array. */ 161 unsigned int num_modes; 162 163 /** 164 * @timings: Pointer to array of display timings 165 * 166 * NOTE: cannot be used with "modes" and also these will be used to 167 * validate a device tree override if one is present. 168 */ 169 const struct display_timing *timings; 170 171 /** @num_timings: Number of elements in timings array. */ 172 unsigned int num_timings; 173 174 /** @bpc: Bits per color. */ 175 unsigned int bpc; 176 177 /** @size: Structure containing the physical size of this panel. */ 178 struct { 179 /** 180 * @size.width: Width (in mm) of the active display area. 181 */ 182 unsigned int width; 183 184 /** 185 * @size.height: Height (in mm) of the active display area. 186 */ 187 unsigned int height; 188 } size; 189 190 /** @delay: Structure containing various delay values for this panel. */ 191 struct panel_delay delay; 192}; 193 194/** 195 * struct edp_panel_entry - Maps panel ID to delay / panel name. 196 */ 197struct edp_panel_entry { 198 /** @panel_id: 32-bit ID for panel, encoded with drm_edid_encode_panel_id(). */ 199 u32 panel_id; 200 201 /** @delay: The power sequencing delays needed for this panel. */ 202 const struct panel_delay *delay; 203 204 /** @name: Name of this panel (for printing to logs). */ 205 const char *name; 206 207 /** @override_edid_mode: Override the mode obtained by edid. */ 208 const struct drm_display_mode *override_edid_mode; 209}; 210 211struct panel_edp { 212 struct drm_panel base; 213 bool enabled; 214 bool no_hpd; 215 216 bool prepared; 217 218 ktime_t prepared_time; 219 ktime_t unprepared_time; 220 221 const struct panel_desc *desc; 222 223 struct regulator *supply; 224 struct i2c_adapter *ddc; 225 struct drm_dp_aux *aux; 226 227 struct gpio_desc *enable_gpio; 228 struct gpio_desc *hpd_gpio; 229 230 const struct edp_panel_entry *detected_panel; 231 232 struct edid *edid; 233 234 struct drm_display_mode override_mode; 235 236 enum drm_panel_orientation orientation; 237}; 238 239static inline struct panel_edp *to_panel_edp(struct drm_panel *panel) 240{ 241 return container_of(panel, struct panel_edp, base); 242} 243 244static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel, 245 struct drm_connector *connector) 246{ 247 struct drm_display_mode *mode; 248 unsigned int i, num = 0; 249 250 for (i = 0; i < panel->desc->num_timings; i++) { 251 const struct display_timing *dt = &panel->desc->timings[i]; 252 struct videomode vm; 253 254 videomode_from_timing(dt, &vm); 255 mode = drm_mode_create(connector->dev); 256 if (!mode) { 257 dev_err(panel->base.dev, "failed to add mode %ux%u\n", 258 dt->hactive.typ, dt->vactive.typ); 259 continue; 260 } 261 262 drm_display_mode_from_videomode(&vm, mode); 263 264 mode->type |= DRM_MODE_TYPE_DRIVER; 265 266 if (panel->desc->num_timings == 1) 267 mode->type |= DRM_MODE_TYPE_PREFERRED; 268 269 drm_mode_probed_add(connector, mode); 270 num++; 271 } 272 273 return num; 274} 275 276static unsigned int panel_edp_get_display_modes(struct panel_edp *panel, 277 struct drm_connector *connector) 278{ 279 struct drm_display_mode *mode; 280 unsigned int i, num = 0; 281 282 for (i = 0; i < panel->desc->num_modes; i++) { 283 const struct drm_display_mode *m = &panel->desc->modes[i]; 284 285 mode = drm_mode_duplicate(connector->dev, m); 286 if (!mode) { 287 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", 288 m->hdisplay, m->vdisplay, 289 drm_mode_vrefresh(m)); 290 continue; 291 } 292 293 mode->type |= DRM_MODE_TYPE_DRIVER; 294 295 if (panel->desc->num_modes == 1) 296 mode->type |= DRM_MODE_TYPE_PREFERRED; 297 298 drm_mode_set_name(mode); 299 300 drm_mode_probed_add(connector, mode); 301 num++; 302 } 303 304 return num; 305} 306 307static int panel_edp_override_edid_mode(struct panel_edp *panel, 308 struct drm_connector *connector, 309 const struct drm_display_mode *override_mode) 310{ 311 struct drm_display_mode *mode; 312 313 mode = drm_mode_duplicate(connector->dev, override_mode); 314 if (!mode) { 315 dev_err(panel->base.dev, "failed to add additional mode\n"); 316 return 0; 317 } 318 319 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 320 drm_mode_set_name(mode); 321 drm_mode_probed_add(connector, mode); 322 return 1; 323} 324 325static int panel_edp_get_non_edid_modes(struct panel_edp *panel, 326 struct drm_connector *connector) 327{ 328 struct drm_display_mode *mode; 329 bool has_override = panel->override_mode.type; 330 unsigned int num = 0; 331 332 if (!panel->desc) 333 return 0; 334 335 if (has_override) { 336 mode = drm_mode_duplicate(connector->dev, 337 &panel->override_mode); 338 if (mode) { 339 drm_mode_probed_add(connector, mode); 340 num = 1; 341 } else { 342 dev_err(panel->base.dev, "failed to add override mode\n"); 343 } 344 } 345 346 /* Only add timings if override was not there or failed to validate */ 347 if (num == 0 && panel->desc->num_timings) 348 num = panel_edp_get_timings_modes(panel, connector); 349 350 /* 351 * Only add fixed modes if timings/override added no mode. 352 * 353 * We should only ever have either the display timings specified 354 * or a fixed mode. Anything else is rather bogus. 355 */ 356 WARN_ON(panel->desc->num_timings && panel->desc->num_modes); 357 if (num == 0) 358 num = panel_edp_get_display_modes(panel, connector); 359 360 connector->display_info.bpc = panel->desc->bpc; 361 connector->display_info.width_mm = panel->desc->size.width; 362 connector->display_info.height_mm = panel->desc->size.height; 363 364 return num; 365} 366 367static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms) 368{ 369 ktime_t now_ktime, min_ktime; 370 371 if (!min_ms) 372 return; 373 374 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms)); 375 now_ktime = ktime_get_boottime(); 376 377 if (ktime_before(now_ktime, min_ktime)) 378 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1); 379} 380 381static int panel_edp_disable(struct drm_panel *panel) 382{ 383 struct panel_edp *p = to_panel_edp(panel); 384 385 if (!p->enabled) 386 return 0; 387 388 if (p->desc->delay.disable) 389 msleep(p->desc->delay.disable); 390 391 p->enabled = false; 392 393 return 0; 394} 395 396static int panel_edp_suspend(struct device *dev) 397{ 398 struct panel_edp *p = dev_get_drvdata(dev); 399 400 gpiod_set_value_cansleep(p->enable_gpio, 0); 401 regulator_disable(p->supply); 402 p->unprepared_time = ktime_get_boottime(); 403 404 return 0; 405} 406 407static int panel_edp_unprepare(struct drm_panel *panel) 408{ 409 struct panel_edp *p = to_panel_edp(panel); 410 int ret; 411 412 /* Unpreparing when already unprepared is a no-op */ 413 if (!p->prepared) 414 return 0; 415 416 ret = pm_runtime_put_sync_suspend(panel->dev); 417 if (ret < 0) 418 return ret; 419 p->prepared = false; 420 421 return 0; 422} 423 424static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p) 425{ 426 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN); 427 if (IS_ERR(p->hpd_gpio)) 428 return dev_err_probe(dev, PTR_ERR(p->hpd_gpio), 429 "failed to get 'hpd' GPIO\n"); 430 431 return 0; 432} 433 434static bool panel_edp_can_read_hpd(struct panel_edp *p) 435{ 436 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted)); 437} 438 439static int panel_edp_prepare_once(struct panel_edp *p) 440{ 441 struct device *dev = p->base.dev; 442 unsigned int delay; 443 int err; 444 int hpd_asserted; 445 unsigned long hpd_wait_us; 446 447 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare); 448 449 err = regulator_enable(p->supply); 450 if (err < 0) { 451 dev_err(dev, "failed to enable supply: %d\n", err); 452 return err; 453 } 454 455 gpiod_set_value_cansleep(p->enable_gpio, 1); 456 457 delay = p->desc->delay.hpd_reliable; 458 if (p->no_hpd) 459 delay = max(delay, p->desc->delay.hpd_absent); 460 if (delay) 461 msleep(delay); 462 463 if (panel_edp_can_read_hpd(p)) { 464 if (p->desc->delay.hpd_absent) 465 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL; 466 else 467 hpd_wait_us = 2000000; 468 469 if (p->hpd_gpio) { 470 err = readx_poll_timeout(gpiod_get_value_cansleep, 471 p->hpd_gpio, hpd_asserted, 472 hpd_asserted, 1000, hpd_wait_us); 473 if (hpd_asserted < 0) 474 err = hpd_asserted; 475 } else { 476 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us); 477 } 478 479 if (err) { 480 if (err != -ETIMEDOUT) 481 dev_err(dev, 482 "error waiting for hpd GPIO: %d\n", err); 483 goto error; 484 } 485 } 486 487 p->prepared_time = ktime_get_boottime(); 488 489 return 0; 490 491error: 492 gpiod_set_value_cansleep(p->enable_gpio, 0); 493 regulator_disable(p->supply); 494 p->unprepared_time = ktime_get_boottime(); 495 496 return err; 497} 498 499/* 500 * Some panels simply don't always come up and need to be power cycled to 501 * work properly. We'll allow for a handful of retries. 502 */ 503#define MAX_PANEL_PREPARE_TRIES 5 504 505static int panel_edp_resume(struct device *dev) 506{ 507 struct panel_edp *p = dev_get_drvdata(dev); 508 int ret; 509 int try; 510 511 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) { 512 ret = panel_edp_prepare_once(p); 513 if (ret != -ETIMEDOUT) 514 break; 515 } 516 517 if (ret == -ETIMEDOUT) 518 dev_err(dev, "Prepare timeout after %d tries\n", try); 519 else if (try) 520 dev_warn(dev, "Prepare needed %d retries\n", try); 521 522 return ret; 523} 524 525static int panel_edp_prepare(struct drm_panel *panel) 526{ 527 struct panel_edp *p = to_panel_edp(panel); 528 int ret; 529 530 /* Preparing when already prepared is a no-op */ 531 if (p->prepared) 532 return 0; 533 534 ret = pm_runtime_get_sync(panel->dev); 535 if (ret < 0) { 536 pm_runtime_put_autosuspend(panel->dev); 537 return ret; 538 } 539 540 p->prepared = true; 541 542 return 0; 543} 544 545static int panel_edp_enable(struct drm_panel *panel) 546{ 547 struct panel_edp *p = to_panel_edp(panel); 548 unsigned int delay; 549 550 if (p->enabled) 551 return 0; 552 553 delay = p->desc->delay.enable; 554 555 /* 556 * If there is a "prepare_to_enable" delay then that's supposed to be 557 * the delay from HPD going high until we can turn the backlight on. 558 * However, we can only count this if HPD is readable by the panel 559 * driver. 560 * 561 * If we aren't handling the HPD pin ourselves then the best we 562 * can do is assume that HPD went high immediately before we were 563 * called (and link training took zero time). Note that "no-hpd" 564 * actually counts as handling HPD ourselves since we're doing the 565 * worst case delay (in prepare) ourselves. 566 * 567 * NOTE: if we ever end up in this "if" statement then we're 568 * guaranteed that the panel_edp_wait() call below will do no delay. 569 * It already handles that case, though, so we don't need any special 570 * code for it. 571 */ 572 if (p->desc->delay.prepare_to_enable && 573 !panel_edp_can_read_hpd(p) && !p->no_hpd) 574 delay = max(delay, p->desc->delay.prepare_to_enable); 575 576 if (delay) 577 msleep(delay); 578 579 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable); 580 581 p->enabled = true; 582 583 return 0; 584} 585 586static int panel_edp_get_modes(struct drm_panel *panel, 587 struct drm_connector *connector) 588{ 589 struct panel_edp *p = to_panel_edp(panel); 590 int num = 0; 591 bool has_override_edid_mode = p->detected_panel && 592 p->detected_panel != ERR_PTR(-EINVAL) && 593 p->detected_panel->override_edid_mode; 594 595 /* probe EDID if a DDC bus is available */ 596 if (p->ddc) { 597 pm_runtime_get_sync(panel->dev); 598 599 if (!p->edid) 600 p->edid = drm_get_edid(connector, p->ddc); 601 if (p->edid) { 602 if (has_override_edid_mode) { 603 /* 604 * override_edid_mode is specified. Use 605 * override_edid_mode instead of from edid. 606 */ 607 num += panel_edp_override_edid_mode(p, connector, 608 p->detected_panel->override_edid_mode); 609 } else { 610 num += drm_add_edid_modes(connector, p->edid); 611 } 612 } 613 614 pm_runtime_mark_last_busy(panel->dev); 615 pm_runtime_put_autosuspend(panel->dev); 616 } 617 618 /* 619 * Add hard-coded panel modes. Don't call this if there are no timings 620 * and no modes (the generic edp-panel case) because it will clobber 621 * the display_info that was already set by drm_add_edid_modes(). 622 */ 623 if (p->desc->num_timings || p->desc->num_modes) 624 num += panel_edp_get_non_edid_modes(p, connector); 625 else if (!num) 626 dev_warn(p->base.dev, "No display modes\n"); 627 628 /* 629 * TODO: Remove once all drm drivers call 630 * drm_connector_set_orientation_from_panel() 631 */ 632 drm_connector_set_panel_orientation(connector, p->orientation); 633 634 return num; 635} 636 637static int panel_edp_get_timings(struct drm_panel *panel, 638 unsigned int num_timings, 639 struct display_timing *timings) 640{ 641 struct panel_edp *p = to_panel_edp(panel); 642 unsigned int i; 643 644 if (p->desc->num_timings < num_timings) 645 num_timings = p->desc->num_timings; 646 647 if (timings) 648 for (i = 0; i < num_timings; i++) 649 timings[i] = p->desc->timings[i]; 650 651 return p->desc->num_timings; 652} 653 654static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel) 655{ 656 struct panel_edp *p = to_panel_edp(panel); 657 658 return p->orientation; 659} 660 661static int detected_panel_show(struct seq_file *s, void *data) 662{ 663 struct drm_panel *panel = s->private; 664 struct panel_edp *p = to_panel_edp(panel); 665 666 if (IS_ERR(p->detected_panel)) 667 seq_puts(s, "UNKNOWN\n"); 668 else if (!p->detected_panel) 669 seq_puts(s, "HARDCODED\n"); 670 else 671 seq_printf(s, "%s\n", p->detected_panel->name); 672 673 return 0; 674} 675 676DEFINE_SHOW_ATTRIBUTE(detected_panel); 677 678static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root) 679{ 680 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops); 681} 682 683static const struct drm_panel_funcs panel_edp_funcs = { 684 .disable = panel_edp_disable, 685 .unprepare = panel_edp_unprepare, 686 .prepare = panel_edp_prepare, 687 .enable = panel_edp_enable, 688 .get_modes = panel_edp_get_modes, 689 .get_orientation = panel_edp_get_orientation, 690 .get_timings = panel_edp_get_timings, 691 .debugfs_init = panel_edp_debugfs_init, 692}; 693 694#define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \ 695 (to_check->field.typ >= bounds->field.min && \ 696 to_check->field.typ <= bounds->field.max) 697static void panel_edp_parse_panel_timing_node(struct device *dev, 698 struct panel_edp *panel, 699 const struct display_timing *ot) 700{ 701 const struct panel_desc *desc = panel->desc; 702 struct videomode vm; 703 unsigned int i; 704 705 if (WARN_ON(desc->num_modes)) { 706 dev_err(dev, "Reject override mode: panel has a fixed mode\n"); 707 return; 708 } 709 if (WARN_ON(!desc->num_timings)) { 710 dev_err(dev, "Reject override mode: no timings specified\n"); 711 return; 712 } 713 714 for (i = 0; i < panel->desc->num_timings; i++) { 715 const struct display_timing *dt = &panel->desc->timings[i]; 716 717 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) || 718 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) || 719 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) || 720 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) || 721 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) || 722 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) || 723 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) || 724 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len)) 725 continue; 726 727 if (ot->flags != dt->flags) 728 continue; 729 730 videomode_from_timing(ot, &vm); 731 drm_display_mode_from_videomode(&vm, &panel->override_mode); 732 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER | 733 DRM_MODE_TYPE_PREFERRED; 734 break; 735 } 736 737 if (WARN_ON(!panel->override_mode.type)) 738 dev_err(dev, "Reject override mode: No display_timing found\n"); 739} 740 741static const struct edp_panel_entry *find_edp_panel(u32 panel_id); 742 743static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel) 744{ 745 struct panel_desc *desc; 746 u32 panel_id; 747 char vend[4]; 748 u16 product_id; 749 u32 reliable_ms = 0; 750 u32 absent_ms = 0; 751 int ret; 752 753 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); 754 if (!desc) 755 return -ENOMEM; 756 panel->desc = desc; 757 758 /* 759 * Read the dts properties for the initial probe. These are used by 760 * the runtime resume code which will get called by the 761 * pm_runtime_get_sync() call below. 762 */ 763 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms); 764 desc->delay.hpd_reliable = reliable_ms; 765 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms); 766 desc->delay.hpd_absent = absent_ms; 767 768 /* Power the panel on so we can read the EDID */ 769 ret = pm_runtime_get_sync(dev); 770 if (ret < 0) { 771 dev_err(dev, "Couldn't power on panel to read EDID: %d\n", ret); 772 goto exit; 773 } 774 775 panel_id = drm_edid_get_panel_id(panel->ddc); 776 if (!panel_id) { 777 dev_err(dev, "Couldn't identify panel via EDID\n"); 778 ret = -EIO; 779 goto exit; 780 } 781 drm_edid_decode_panel_id(panel_id, vend, &product_id); 782 783 panel->detected_panel = find_edp_panel(panel_id); 784 785 /* 786 * We're using non-optimized timings and want it really obvious that 787 * someone needs to add an entry to the table, so we'll do a WARN_ON 788 * splat. 789 */ 790 if (WARN_ON(!panel->detected_panel)) { 791 dev_warn(dev, 792 "Unknown panel %s %#06x, using conservative timings\n", 793 vend, product_id); 794 795 /* 796 * It's highly likely that the panel will work if we use very 797 * conservative timings, so let's do that. We already know that 798 * the HPD-related delays must have worked since we got this 799 * far, so we really just need the "unprepare" / "enable" 800 * delays. We don't need "prepare_to_enable" since that 801 * overlaps the "enable" delay anyway. 802 * 803 * Nearly all panels have a "unprepare" delay of 500 ms though 804 * there are a few with 1000. Let's stick 2000 in just to be 805 * super conservative. 806 * 807 * An "enable" delay of 80 ms seems the most common, but we'll 808 * throw in 200 ms to be safe. 809 */ 810 desc->delay.unprepare = 2000; 811 desc->delay.enable = 200; 812 813 panel->detected_panel = ERR_PTR(-EINVAL); 814 } else { 815 dev_info(dev, "Detected %s %s (%#06x)\n", 816 vend, panel->detected_panel->name, product_id); 817 818 /* Update the delay; everything else comes from EDID */ 819 desc->delay = *panel->detected_panel->delay; 820 } 821 822 ret = 0; 823exit: 824 pm_runtime_mark_last_busy(dev); 825 pm_runtime_put_autosuspend(dev); 826 827 return ret; 828} 829 830static int panel_edp_probe(struct device *dev, const struct panel_desc *desc, 831 struct drm_dp_aux *aux) 832{ 833 struct panel_edp *panel; 834 struct display_timing dt; 835 struct device_node *ddc; 836 int err; 837 838 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL); 839 if (!panel) 840 return -ENOMEM; 841 842 panel->enabled = false; 843 panel->prepared_time = 0; 844 panel->desc = desc; 845 panel->aux = aux; 846 847 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd"); 848 if (!panel->no_hpd) { 849 err = panel_edp_get_hpd_gpio(dev, panel); 850 if (err) 851 return err; 852 } 853 854 panel->supply = devm_regulator_get(dev, "power"); 855 if (IS_ERR(panel->supply)) 856 return PTR_ERR(panel->supply); 857 858 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable", 859 GPIOD_OUT_LOW); 860 if (IS_ERR(panel->enable_gpio)) 861 return dev_err_probe(dev, PTR_ERR(panel->enable_gpio), 862 "failed to request GPIO\n"); 863 864 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation); 865 if (err) { 866 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err); 867 return err; 868 } 869 870 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0); 871 if (ddc) { 872 panel->ddc = of_find_i2c_adapter_by_node(ddc); 873 of_node_put(ddc); 874 875 if (!panel->ddc) 876 return -EPROBE_DEFER; 877 } else if (aux) { 878 panel->ddc = &aux->ddc; 879 } 880 881 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt)) 882 panel_edp_parse_panel_timing_node(dev, panel, &dt); 883 884 dev_set_drvdata(dev, panel); 885 886 drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP); 887 888 err = drm_panel_of_backlight(&panel->base); 889 if (err) 890 goto err_finished_ddc_init; 891 892 /* 893 * We use runtime PM for prepare / unprepare since those power the panel 894 * on and off and those can be very slow operations. This is important 895 * to optimize powering the panel on briefly to read the EDID before 896 * fully enabling the panel. 897 */ 898 pm_runtime_enable(dev); 899 pm_runtime_set_autosuspend_delay(dev, 1000); 900 pm_runtime_use_autosuspend(dev); 901 902 if (of_device_is_compatible(dev->of_node, "edp-panel")) { 903 err = generic_edp_panel_probe(dev, panel); 904 if (err) { 905 dev_err_probe(dev, err, 906 "Couldn't detect panel nor find a fallback\n"); 907 goto err_finished_pm_runtime; 908 } 909 /* generic_edp_panel_probe() replaces desc in the panel */ 910 desc = panel->desc; 911 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) { 912 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc); 913 } 914 915 if (!panel->base.backlight && panel->aux) { 916 pm_runtime_get_sync(dev); 917 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux); 918 pm_runtime_mark_last_busy(dev); 919 pm_runtime_put_autosuspend(dev); 920 if (err) 921 goto err_finished_pm_runtime; 922 } 923 924 drm_panel_add(&panel->base); 925 926 return 0; 927 928err_finished_pm_runtime: 929 pm_runtime_dont_use_autosuspend(dev); 930 pm_runtime_disable(dev); 931err_finished_ddc_init: 932 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 933 put_device(&panel->ddc->dev); 934 935 return err; 936} 937 938static void panel_edp_remove(struct device *dev) 939{ 940 struct panel_edp *panel = dev_get_drvdata(dev); 941 942 drm_panel_remove(&panel->base); 943 drm_panel_disable(&panel->base); 944 drm_panel_unprepare(&panel->base); 945 946 pm_runtime_dont_use_autosuspend(dev); 947 pm_runtime_disable(dev); 948 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 949 put_device(&panel->ddc->dev); 950 951 kfree(panel->edid); 952 panel->edid = NULL; 953} 954 955static void panel_edp_shutdown(struct device *dev) 956{ 957 struct panel_edp *panel = dev_get_drvdata(dev); 958 959 drm_panel_disable(&panel->base); 960 drm_panel_unprepare(&panel->base); 961} 962 963static const struct display_timing auo_b101ean01_timing = { 964 .pixelclock = { 65300000, 72500000, 75000000 }, 965 .hactive = { 1280, 1280, 1280 }, 966 .hfront_porch = { 18, 119, 119 }, 967 .hback_porch = { 21, 21, 21 }, 968 .hsync_len = { 32, 32, 32 }, 969 .vactive = { 800, 800, 800 }, 970 .vfront_porch = { 4, 4, 4 }, 971 .vback_porch = { 8, 8, 8 }, 972 .vsync_len = { 18, 20, 20 }, 973}; 974 975static const struct panel_desc auo_b101ean01 = { 976 .timings = &auo_b101ean01_timing, 977 .num_timings = 1, 978 .bpc = 6, 979 .size = { 980 .width = 217, 981 .height = 136, 982 }, 983}; 984 985static const struct drm_display_mode auo_b116xak01_mode = { 986 .clock = 69300, 987 .hdisplay = 1366, 988 .hsync_start = 1366 + 48, 989 .hsync_end = 1366 + 48 + 32, 990 .htotal = 1366 + 48 + 32 + 10, 991 .vdisplay = 768, 992 .vsync_start = 768 + 4, 993 .vsync_end = 768 + 4 + 6, 994 .vtotal = 768 + 4 + 6 + 15, 995 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 996}; 997 998static const struct panel_desc auo_b116xak01 = { 999 .modes = &auo_b116xak01_mode, 1000 .num_modes = 1, 1001 .bpc = 6, 1002 .size = { 1003 .width = 256, 1004 .height = 144, 1005 }, 1006 .delay = { 1007 .hpd_absent = 200, 1008 .unprepare = 500, 1009 .enable = 50, 1010 }, 1011}; 1012 1013static const struct drm_display_mode auo_b133han05_mode = { 1014 .clock = 142600, 1015 .hdisplay = 1920, 1016 .hsync_start = 1920 + 58, 1017 .hsync_end = 1920 + 58 + 42, 1018 .htotal = 1920 + 58 + 42 + 60, 1019 .vdisplay = 1080, 1020 .vsync_start = 1080 + 3, 1021 .vsync_end = 1080 + 3 + 5, 1022 .vtotal = 1080 + 3 + 5 + 54, 1023}; 1024 1025static const struct panel_desc auo_b133han05 = { 1026 .modes = &auo_b133han05_mode, 1027 .num_modes = 1, 1028 .bpc = 8, 1029 .size = { 1030 .width = 293, 1031 .height = 165, 1032 }, 1033 .delay = { 1034 .hpd_reliable = 100, 1035 .enable = 20, 1036 .unprepare = 50, 1037 }, 1038}; 1039 1040static const struct drm_display_mode auo_b133htn01_mode = { 1041 .clock = 150660, 1042 .hdisplay = 1920, 1043 .hsync_start = 1920 + 172, 1044 .hsync_end = 1920 + 172 + 80, 1045 .htotal = 1920 + 172 + 80 + 60, 1046 .vdisplay = 1080, 1047 .vsync_start = 1080 + 25, 1048 .vsync_end = 1080 + 25 + 10, 1049 .vtotal = 1080 + 25 + 10 + 10, 1050}; 1051 1052static const struct panel_desc auo_b133htn01 = { 1053 .modes = &auo_b133htn01_mode, 1054 .num_modes = 1, 1055 .bpc = 6, 1056 .size = { 1057 .width = 293, 1058 .height = 165, 1059 }, 1060 .delay = { 1061 .hpd_reliable = 105, 1062 .enable = 20, 1063 .unprepare = 50, 1064 }, 1065}; 1066 1067static const struct drm_display_mode auo_b133xtn01_mode = { 1068 .clock = 69500, 1069 .hdisplay = 1366, 1070 .hsync_start = 1366 + 48, 1071 .hsync_end = 1366 + 48 + 32, 1072 .htotal = 1366 + 48 + 32 + 20, 1073 .vdisplay = 768, 1074 .vsync_start = 768 + 3, 1075 .vsync_end = 768 + 3 + 6, 1076 .vtotal = 768 + 3 + 6 + 13, 1077}; 1078 1079static const struct panel_desc auo_b133xtn01 = { 1080 .modes = &auo_b133xtn01_mode, 1081 .num_modes = 1, 1082 .bpc = 6, 1083 .size = { 1084 .width = 293, 1085 .height = 165, 1086 }, 1087}; 1088 1089static const struct drm_display_mode auo_b140han06_mode = { 1090 .clock = 141000, 1091 .hdisplay = 1920, 1092 .hsync_start = 1920 + 16, 1093 .hsync_end = 1920 + 16 + 16, 1094 .htotal = 1920 + 16 + 16 + 152, 1095 .vdisplay = 1080, 1096 .vsync_start = 1080 + 3, 1097 .vsync_end = 1080 + 3 + 14, 1098 .vtotal = 1080 + 3 + 14 + 19, 1099}; 1100 1101static const struct panel_desc auo_b140han06 = { 1102 .modes = &auo_b140han06_mode, 1103 .num_modes = 1, 1104 .bpc = 8, 1105 .size = { 1106 .width = 309, 1107 .height = 174, 1108 }, 1109 .delay = { 1110 .hpd_reliable = 100, 1111 .enable = 20, 1112 .unprepare = 50, 1113 }, 1114}; 1115 1116static const struct drm_display_mode boe_nv101wxmn51_modes[] = { 1117 { 1118 .clock = 71900, 1119 .hdisplay = 1280, 1120 .hsync_start = 1280 + 48, 1121 .hsync_end = 1280 + 48 + 32, 1122 .htotal = 1280 + 48 + 32 + 80, 1123 .vdisplay = 800, 1124 .vsync_start = 800 + 3, 1125 .vsync_end = 800 + 3 + 5, 1126 .vtotal = 800 + 3 + 5 + 24, 1127 }, 1128 { 1129 .clock = 57500, 1130 .hdisplay = 1280, 1131 .hsync_start = 1280 + 48, 1132 .hsync_end = 1280 + 48 + 32, 1133 .htotal = 1280 + 48 + 32 + 80, 1134 .vdisplay = 800, 1135 .vsync_start = 800 + 3, 1136 .vsync_end = 800 + 3 + 5, 1137 .vtotal = 800 + 3 + 5 + 24, 1138 }, 1139}; 1140 1141static const struct panel_desc boe_nv101wxmn51 = { 1142 .modes = boe_nv101wxmn51_modes, 1143 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes), 1144 .bpc = 8, 1145 .size = { 1146 .width = 217, 1147 .height = 136, 1148 }, 1149 .delay = { 1150 /* TODO: should be hpd-absent and no-hpd should be set? */ 1151 .hpd_reliable = 210, 1152 .enable = 50, 1153 .unprepare = 160, 1154 }, 1155}; 1156 1157static const struct drm_display_mode boe_nv110wtm_n61_modes[] = { 1158 { 1159 .clock = 207800, 1160 .hdisplay = 2160, 1161 .hsync_start = 2160 + 48, 1162 .hsync_end = 2160 + 48 + 32, 1163 .htotal = 2160 + 48 + 32 + 100, 1164 .vdisplay = 1440, 1165 .vsync_start = 1440 + 3, 1166 .vsync_end = 1440 + 3 + 6, 1167 .vtotal = 1440 + 3 + 6 + 31, 1168 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1169 }, 1170 { 1171 .clock = 138500, 1172 .hdisplay = 2160, 1173 .hsync_start = 2160 + 48, 1174 .hsync_end = 2160 + 48 + 32, 1175 .htotal = 2160 + 48 + 32 + 100, 1176 .vdisplay = 1440, 1177 .vsync_start = 1440 + 3, 1178 .vsync_end = 1440 + 3 + 6, 1179 .vtotal = 1440 + 3 + 6 + 31, 1180 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1181 }, 1182}; 1183 1184static const struct panel_desc boe_nv110wtm_n61 = { 1185 .modes = boe_nv110wtm_n61_modes, 1186 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes), 1187 .bpc = 8, 1188 .size = { 1189 .width = 233, 1190 .height = 155, 1191 }, 1192 .delay = { 1193 .hpd_absent = 200, 1194 .prepare_to_enable = 80, 1195 .enable = 50, 1196 .unprepare = 500, 1197 }, 1198}; 1199 1200/* Also used for boe_nv133fhm_n62 */ 1201static const struct drm_display_mode boe_nv133fhm_n61_modes = { 1202 .clock = 147840, 1203 .hdisplay = 1920, 1204 .hsync_start = 1920 + 48, 1205 .hsync_end = 1920 + 48 + 32, 1206 .htotal = 1920 + 48 + 32 + 200, 1207 .vdisplay = 1080, 1208 .vsync_start = 1080 + 3, 1209 .vsync_end = 1080 + 3 + 6, 1210 .vtotal = 1080 + 3 + 6 + 31, 1211 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1212}; 1213 1214/* Also used for boe_nv133fhm_n62 */ 1215static const struct panel_desc boe_nv133fhm_n61 = { 1216 .modes = &boe_nv133fhm_n61_modes, 1217 .num_modes = 1, 1218 .bpc = 6, 1219 .size = { 1220 .width = 294, 1221 .height = 165, 1222 }, 1223 .delay = { 1224 /* 1225 * When power is first given to the panel there's a short 1226 * spike on the HPD line. It was explained that this spike 1227 * was until the TCON data download was complete. On 1228 * one system this was measured at 8 ms. We'll put 15 ms 1229 * in the prepare delay just to be safe. That means: 1230 * - If HPD isn't hooked up you still have 200 ms delay. 1231 * - If HPD is hooked up we won't try to look at it for the 1232 * first 15 ms. 1233 */ 1234 .hpd_reliable = 15, 1235 .hpd_absent = 200, 1236 1237 .unprepare = 500, 1238 }, 1239}; 1240 1241static const struct drm_display_mode boe_nv140fhmn49_modes[] = { 1242 { 1243 .clock = 148500, 1244 .hdisplay = 1920, 1245 .hsync_start = 1920 + 48, 1246 .hsync_end = 1920 + 48 + 32, 1247 .htotal = 2200, 1248 .vdisplay = 1080, 1249 .vsync_start = 1080 + 3, 1250 .vsync_end = 1080 + 3 + 5, 1251 .vtotal = 1125, 1252 }, 1253}; 1254 1255static const struct panel_desc boe_nv140fhmn49 = { 1256 .modes = boe_nv140fhmn49_modes, 1257 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes), 1258 .bpc = 6, 1259 .size = { 1260 .width = 309, 1261 .height = 174, 1262 }, 1263 .delay = { 1264 /* TODO: should be hpd-absent and no-hpd should be set? */ 1265 .hpd_reliable = 210, 1266 .enable = 50, 1267 .unprepare = 160, 1268 }, 1269}; 1270 1271static const struct drm_display_mode innolux_n116bca_ea1_mode = { 1272 .clock = 76420, 1273 .hdisplay = 1366, 1274 .hsync_start = 1366 + 136, 1275 .hsync_end = 1366 + 136 + 30, 1276 .htotal = 1366 + 136 + 30 + 60, 1277 .vdisplay = 768, 1278 .vsync_start = 768 + 8, 1279 .vsync_end = 768 + 8 + 12, 1280 .vtotal = 768 + 8 + 12 + 12, 1281 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, 1282}; 1283 1284static const struct panel_desc innolux_n116bca_ea1 = { 1285 .modes = &innolux_n116bca_ea1_mode, 1286 .num_modes = 1, 1287 .bpc = 6, 1288 .size = { 1289 .width = 256, 1290 .height = 144, 1291 }, 1292 .delay = { 1293 .hpd_absent = 200, 1294 .enable = 80, 1295 .disable = 50, 1296 .unprepare = 500, 1297 }, 1298}; 1299 1300/* 1301 * Datasheet specifies that at 60 Hz refresh rate: 1302 * - total horizontal time: { 1506, 1592, 1716 } 1303 * - total vertical time: { 788, 800, 868 } 1304 * 1305 * ...but doesn't go into exactly how that should be split into a front 1306 * porch, back porch, or sync length. For now we'll leave a single setting 1307 * here which allows a bit of tweaking of the pixel clock at the expense of 1308 * refresh rate. 1309 */ 1310static const struct display_timing innolux_n116bge_timing = { 1311 .pixelclock = { 72600000, 76420000, 80240000 }, 1312 .hactive = { 1366, 1366, 1366 }, 1313 .hfront_porch = { 136, 136, 136 }, 1314 .hback_porch = { 60, 60, 60 }, 1315 .hsync_len = { 30, 30, 30 }, 1316 .vactive = { 768, 768, 768 }, 1317 .vfront_porch = { 8, 8, 8 }, 1318 .vback_porch = { 12, 12, 12 }, 1319 .vsync_len = { 12, 12, 12 }, 1320 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1321}; 1322 1323static const struct panel_desc innolux_n116bge = { 1324 .timings = &innolux_n116bge_timing, 1325 .num_timings = 1, 1326 .bpc = 6, 1327 .size = { 1328 .width = 256, 1329 .height = 144, 1330 }, 1331}; 1332 1333static const struct drm_display_mode innolux_n125hce_gn1_mode = { 1334 .clock = 162000, 1335 .hdisplay = 1920, 1336 .hsync_start = 1920 + 40, 1337 .hsync_end = 1920 + 40 + 40, 1338 .htotal = 1920 + 40 + 40 + 80, 1339 .vdisplay = 1080, 1340 .vsync_start = 1080 + 4, 1341 .vsync_end = 1080 + 4 + 4, 1342 .vtotal = 1080 + 4 + 4 + 24, 1343}; 1344 1345static const struct panel_desc innolux_n125hce_gn1 = { 1346 .modes = &innolux_n125hce_gn1_mode, 1347 .num_modes = 1, 1348 .bpc = 8, 1349 .size = { 1350 .width = 276, 1351 .height = 155, 1352 }, 1353}; 1354 1355static const struct drm_display_mode innolux_p120zdg_bf1_mode = { 1356 .clock = 206016, 1357 .hdisplay = 2160, 1358 .hsync_start = 2160 + 48, 1359 .hsync_end = 2160 + 48 + 32, 1360 .htotal = 2160 + 48 + 32 + 80, 1361 .vdisplay = 1440, 1362 .vsync_start = 1440 + 3, 1363 .vsync_end = 1440 + 3 + 10, 1364 .vtotal = 1440 + 3 + 10 + 27, 1365 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1366}; 1367 1368static const struct panel_desc innolux_p120zdg_bf1 = { 1369 .modes = &innolux_p120zdg_bf1_mode, 1370 .num_modes = 1, 1371 .bpc = 8, 1372 .size = { 1373 .width = 254, 1374 .height = 169, 1375 }, 1376 .delay = { 1377 .hpd_absent = 200, 1378 .unprepare = 500, 1379 }, 1380}; 1381 1382static const struct drm_display_mode ivo_m133nwf4_r0_mode = { 1383 .clock = 138778, 1384 .hdisplay = 1920, 1385 .hsync_start = 1920 + 24, 1386 .hsync_end = 1920 + 24 + 48, 1387 .htotal = 1920 + 24 + 48 + 88, 1388 .vdisplay = 1080, 1389 .vsync_start = 1080 + 3, 1390 .vsync_end = 1080 + 3 + 12, 1391 .vtotal = 1080 + 3 + 12 + 17, 1392 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1393}; 1394 1395static const struct panel_desc ivo_m133nwf4_r0 = { 1396 .modes = &ivo_m133nwf4_r0_mode, 1397 .num_modes = 1, 1398 .bpc = 8, 1399 .size = { 1400 .width = 294, 1401 .height = 165, 1402 }, 1403 .delay = { 1404 .hpd_absent = 200, 1405 .unprepare = 500, 1406 }, 1407}; 1408 1409static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = { 1410 .clock = 81000, 1411 .hdisplay = 1366, 1412 .hsync_start = 1366 + 40, 1413 .hsync_end = 1366 + 40 + 32, 1414 .htotal = 1366 + 40 + 32 + 62, 1415 .vdisplay = 768, 1416 .vsync_start = 768 + 5, 1417 .vsync_end = 768 + 5 + 5, 1418 .vtotal = 768 + 5 + 5 + 122, 1419 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1420}; 1421 1422static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = { 1423 .modes = &kingdisplay_kd116n21_30nv_a010_mode, 1424 .num_modes = 1, 1425 .bpc = 6, 1426 .size = { 1427 .width = 256, 1428 .height = 144, 1429 }, 1430 .delay = { 1431 .hpd_absent = 200, 1432 }, 1433}; 1434 1435static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { 1436 .clock = 200000, 1437 .hdisplay = 1536, 1438 .hsync_start = 1536 + 12, 1439 .hsync_end = 1536 + 12 + 16, 1440 .htotal = 1536 + 12 + 16 + 48, 1441 .vdisplay = 2048, 1442 .vsync_start = 2048 + 8, 1443 .vsync_end = 2048 + 8 + 4, 1444 .vtotal = 2048 + 8 + 4 + 8, 1445 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1446}; 1447 1448static const struct panel_desc lg_lp079qx1_sp0v = { 1449 .modes = &lg_lp079qx1_sp0v_mode, 1450 .num_modes = 1, 1451 .size = { 1452 .width = 129, 1453 .height = 171, 1454 }, 1455}; 1456 1457static const struct drm_display_mode lg_lp097qx1_spa1_mode = { 1458 .clock = 205210, 1459 .hdisplay = 2048, 1460 .hsync_start = 2048 + 150, 1461 .hsync_end = 2048 + 150 + 5, 1462 .htotal = 2048 + 150 + 5 + 5, 1463 .vdisplay = 1536, 1464 .vsync_start = 1536 + 3, 1465 .vsync_end = 1536 + 3 + 1, 1466 .vtotal = 1536 + 3 + 1 + 9, 1467}; 1468 1469static const struct panel_desc lg_lp097qx1_spa1 = { 1470 .modes = &lg_lp097qx1_spa1_mode, 1471 .num_modes = 1, 1472 .size = { 1473 .width = 208, 1474 .height = 147, 1475 }, 1476}; 1477 1478static const struct drm_display_mode lg_lp120up1_mode = { 1479 .clock = 162300, 1480 .hdisplay = 1920, 1481 .hsync_start = 1920 + 40, 1482 .hsync_end = 1920 + 40 + 40, 1483 .htotal = 1920 + 40 + 40 + 80, 1484 .vdisplay = 1280, 1485 .vsync_start = 1280 + 4, 1486 .vsync_end = 1280 + 4 + 4, 1487 .vtotal = 1280 + 4 + 4 + 12, 1488}; 1489 1490static const struct panel_desc lg_lp120up1 = { 1491 .modes = &lg_lp120up1_mode, 1492 .num_modes = 1, 1493 .bpc = 8, 1494 .size = { 1495 .width = 267, 1496 .height = 183, 1497 }, 1498}; 1499 1500static const struct drm_display_mode lg_lp129qe_mode = { 1501 .clock = 285250, 1502 .hdisplay = 2560, 1503 .hsync_start = 2560 + 48, 1504 .hsync_end = 2560 + 48 + 32, 1505 .htotal = 2560 + 48 + 32 + 80, 1506 .vdisplay = 1700, 1507 .vsync_start = 1700 + 3, 1508 .vsync_end = 1700 + 3 + 10, 1509 .vtotal = 1700 + 3 + 10 + 36, 1510}; 1511 1512static const struct panel_desc lg_lp129qe = { 1513 .modes = &lg_lp129qe_mode, 1514 .num_modes = 1, 1515 .bpc = 8, 1516 .size = { 1517 .width = 272, 1518 .height = 181, 1519 }, 1520}; 1521 1522static const struct drm_display_mode neweast_wjfh116008a_modes[] = { 1523 { 1524 .clock = 138500, 1525 .hdisplay = 1920, 1526 .hsync_start = 1920 + 48, 1527 .hsync_end = 1920 + 48 + 32, 1528 .htotal = 1920 + 48 + 32 + 80, 1529 .vdisplay = 1080, 1530 .vsync_start = 1080 + 3, 1531 .vsync_end = 1080 + 3 + 5, 1532 .vtotal = 1080 + 3 + 5 + 23, 1533 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1534 }, { 1535 .clock = 110920, 1536 .hdisplay = 1920, 1537 .hsync_start = 1920 + 48, 1538 .hsync_end = 1920 + 48 + 32, 1539 .htotal = 1920 + 48 + 32 + 80, 1540 .vdisplay = 1080, 1541 .vsync_start = 1080 + 3, 1542 .vsync_end = 1080 + 3 + 5, 1543 .vtotal = 1080 + 3 + 5 + 23, 1544 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1545 } 1546}; 1547 1548static const struct panel_desc neweast_wjfh116008a = { 1549 .modes = neweast_wjfh116008a_modes, 1550 .num_modes = 2, 1551 .bpc = 6, 1552 .size = { 1553 .width = 260, 1554 .height = 150, 1555 }, 1556 .delay = { 1557 .hpd_reliable = 110, 1558 .enable = 20, 1559 .unprepare = 500, 1560 }, 1561}; 1562 1563static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { 1564 .clock = 271560, 1565 .hdisplay = 2560, 1566 .hsync_start = 2560 + 48, 1567 .hsync_end = 2560 + 48 + 32, 1568 .htotal = 2560 + 48 + 32 + 80, 1569 .vdisplay = 1600, 1570 .vsync_start = 1600 + 2, 1571 .vsync_end = 1600 + 2 + 5, 1572 .vtotal = 1600 + 2 + 5 + 57, 1573}; 1574 1575static const struct panel_desc samsung_lsn122dl01_c01 = { 1576 .modes = &samsung_lsn122dl01_c01_mode, 1577 .num_modes = 1, 1578 .size = { 1579 .width = 263, 1580 .height = 164, 1581 }, 1582}; 1583 1584static const struct drm_display_mode samsung_ltn140at29_301_mode = { 1585 .clock = 76300, 1586 .hdisplay = 1366, 1587 .hsync_start = 1366 + 64, 1588 .hsync_end = 1366 + 64 + 48, 1589 .htotal = 1366 + 64 + 48 + 128, 1590 .vdisplay = 768, 1591 .vsync_start = 768 + 2, 1592 .vsync_end = 768 + 2 + 5, 1593 .vtotal = 768 + 2 + 5 + 17, 1594}; 1595 1596static const struct panel_desc samsung_ltn140at29_301 = { 1597 .modes = &samsung_ltn140at29_301_mode, 1598 .num_modes = 1, 1599 .bpc = 6, 1600 .size = { 1601 .width = 320, 1602 .height = 187, 1603 }, 1604}; 1605 1606static const struct drm_display_mode sharp_ld_d5116z01b_mode = { 1607 .clock = 168480, 1608 .hdisplay = 1920, 1609 .hsync_start = 1920 + 48, 1610 .hsync_end = 1920 + 48 + 32, 1611 .htotal = 1920 + 48 + 32 + 80, 1612 .vdisplay = 1280, 1613 .vsync_start = 1280 + 3, 1614 .vsync_end = 1280 + 3 + 10, 1615 .vtotal = 1280 + 3 + 10 + 57, 1616 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1617}; 1618 1619static const struct panel_desc sharp_ld_d5116z01b = { 1620 .modes = &sharp_ld_d5116z01b_mode, 1621 .num_modes = 1, 1622 .bpc = 8, 1623 .size = { 1624 .width = 260, 1625 .height = 120, 1626 }, 1627}; 1628 1629static const struct display_timing sharp_lq123p1jx31_timing = { 1630 .pixelclock = { 252750000, 252750000, 266604720 }, 1631 .hactive = { 2400, 2400, 2400 }, 1632 .hfront_porch = { 48, 48, 48 }, 1633 .hback_porch = { 80, 80, 84 }, 1634 .hsync_len = { 32, 32, 32 }, 1635 .vactive = { 1600, 1600, 1600 }, 1636 .vfront_porch = { 3, 3, 3 }, 1637 .vback_porch = { 33, 33, 120 }, 1638 .vsync_len = { 10, 10, 10 }, 1639 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1640}; 1641 1642static const struct panel_desc sharp_lq123p1jx31 = { 1643 .timings = &sharp_lq123p1jx31_timing, 1644 .num_timings = 1, 1645 .bpc = 8, 1646 .size = { 1647 .width = 259, 1648 .height = 173, 1649 }, 1650 .delay = { 1651 .hpd_reliable = 110, 1652 .enable = 50, 1653 .unprepare = 550, 1654 }, 1655}; 1656 1657static const struct drm_display_mode sharp_lq140m1jw46_mode[] = { 1658 { 1659 .clock = 346500, 1660 .hdisplay = 1920, 1661 .hsync_start = 1920 + 48, 1662 .hsync_end = 1920 + 48 + 32, 1663 .htotal = 1920 + 48 + 32 + 80, 1664 .vdisplay = 1080, 1665 .vsync_start = 1080 + 3, 1666 .vsync_end = 1080 + 3 + 5, 1667 .vtotal = 1080 + 3 + 5 + 69, 1668 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1669 }, { 1670 .clock = 144370, 1671 .hdisplay = 1920, 1672 .hsync_start = 1920 + 48, 1673 .hsync_end = 1920 + 48 + 32, 1674 .htotal = 1920 + 48 + 32 + 80, 1675 .vdisplay = 1080, 1676 .vsync_start = 1080 + 3, 1677 .vsync_end = 1080 + 3 + 5, 1678 .vtotal = 1080 + 3 + 5 + 69, 1679 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1680 }, 1681}; 1682 1683static const struct panel_desc sharp_lq140m1jw46 = { 1684 .modes = sharp_lq140m1jw46_mode, 1685 .num_modes = ARRAY_SIZE(sharp_lq140m1jw46_mode), 1686 .bpc = 8, 1687 .size = { 1688 .width = 309, 1689 .height = 174, 1690 }, 1691 .delay = { 1692 .hpd_absent = 80, 1693 .enable = 50, 1694 .unprepare = 500, 1695 }, 1696}; 1697 1698static const struct drm_display_mode starry_kr122ea0sra_mode = { 1699 .clock = 147000, 1700 .hdisplay = 1920, 1701 .hsync_start = 1920 + 16, 1702 .hsync_end = 1920 + 16 + 16, 1703 .htotal = 1920 + 16 + 16 + 32, 1704 .vdisplay = 1200, 1705 .vsync_start = 1200 + 15, 1706 .vsync_end = 1200 + 15 + 2, 1707 .vtotal = 1200 + 15 + 2 + 18, 1708 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1709}; 1710 1711static const struct panel_desc starry_kr122ea0sra = { 1712 .modes = &starry_kr122ea0sra_mode, 1713 .num_modes = 1, 1714 .size = { 1715 .width = 263, 1716 .height = 164, 1717 }, 1718 .delay = { 1719 /* TODO: should be hpd-absent and no-hpd should be set? */ 1720 .hpd_reliable = 10 + 200, 1721 .enable = 50, 1722 .unprepare = 10 + 500, 1723 }, 1724}; 1725 1726static const struct of_device_id platform_of_match[] = { 1727 { 1728 /* Must be first */ 1729 .compatible = "edp-panel", 1730 }, { 1731 .compatible = "auo,b101ean01", 1732 .data = &auo_b101ean01, 1733 }, { 1734 .compatible = "auo,b116xa01", 1735 .data = &auo_b116xak01, 1736 }, { 1737 .compatible = "auo,b133han05", 1738 .data = &auo_b133han05, 1739 }, { 1740 .compatible = "auo,b133htn01", 1741 .data = &auo_b133htn01, 1742 }, { 1743 .compatible = "auo,b133xtn01", 1744 .data = &auo_b133xtn01, 1745 }, { 1746 .compatible = "auo,b140han06", 1747 .data = &auo_b140han06, 1748 }, { 1749 .compatible = "boe,nv101wxmn51", 1750 .data = &boe_nv101wxmn51, 1751 }, { 1752 .compatible = "boe,nv110wtm-n61", 1753 .data = &boe_nv110wtm_n61, 1754 }, { 1755 .compatible = "boe,nv133fhm-n61", 1756 .data = &boe_nv133fhm_n61, 1757 }, { 1758 .compatible = "boe,nv133fhm-n62", 1759 .data = &boe_nv133fhm_n61, 1760 }, { 1761 .compatible = "boe,nv140fhmn49", 1762 .data = &boe_nv140fhmn49, 1763 }, { 1764 .compatible = "innolux,n116bca-ea1", 1765 .data = &innolux_n116bca_ea1, 1766 }, { 1767 .compatible = "innolux,n116bge", 1768 .data = &innolux_n116bge, 1769 }, { 1770 .compatible = "innolux,n125hce-gn1", 1771 .data = &innolux_n125hce_gn1, 1772 }, { 1773 .compatible = "innolux,p120zdg-bf1", 1774 .data = &innolux_p120zdg_bf1, 1775 }, { 1776 .compatible = "ivo,m133nwf4-r0", 1777 .data = &ivo_m133nwf4_r0, 1778 }, { 1779 .compatible = "kingdisplay,kd116n21-30nv-a010", 1780 .data = &kingdisplay_kd116n21_30nv_a010, 1781 }, { 1782 .compatible = "lg,lp079qx1-sp0v", 1783 .data = &lg_lp079qx1_sp0v, 1784 }, { 1785 .compatible = "lg,lp097qx1-spa1", 1786 .data = &lg_lp097qx1_spa1, 1787 }, { 1788 .compatible = "lg,lp120up1", 1789 .data = &lg_lp120up1, 1790 }, { 1791 .compatible = "lg,lp129qe", 1792 .data = &lg_lp129qe, 1793 }, { 1794 .compatible = "neweast,wjfh116008a", 1795 .data = &neweast_wjfh116008a, 1796 }, { 1797 .compatible = "samsung,lsn122dl01-c01", 1798 .data = &samsung_lsn122dl01_c01, 1799 }, { 1800 .compatible = "samsung,ltn140at29-301", 1801 .data = &samsung_ltn140at29_301, 1802 }, { 1803 .compatible = "sharp,ld-d5116z01b", 1804 .data = &sharp_ld_d5116z01b, 1805 }, { 1806 .compatible = "sharp,lq123p1jx31", 1807 .data = &sharp_lq123p1jx31, 1808 }, { 1809 .compatible = "sharp,lq140m1jw46", 1810 .data = &sharp_lq140m1jw46, 1811 }, { 1812 .compatible = "starry,kr122ea0sra", 1813 .data = &starry_kr122ea0sra, 1814 }, { 1815 /* sentinel */ 1816 } 1817}; 1818MODULE_DEVICE_TABLE(of, platform_of_match); 1819 1820static const struct panel_delay delay_200_500_p2e80 = { 1821 .hpd_absent = 200, 1822 .unprepare = 500, 1823 .prepare_to_enable = 80, 1824}; 1825 1826static const struct panel_delay delay_200_500_p2e100 = { 1827 .hpd_absent = 200, 1828 .unprepare = 500, 1829 .prepare_to_enable = 100, 1830}; 1831 1832static const struct panel_delay delay_200_500_e50 = { 1833 .hpd_absent = 200, 1834 .unprepare = 500, 1835 .enable = 50, 1836}; 1837 1838static const struct panel_delay delay_200_500_e80_d50 = { 1839 .hpd_absent = 200, 1840 .unprepare = 500, 1841 .enable = 80, 1842 .disable = 50, 1843}; 1844 1845static const struct panel_delay delay_100_500_e200 = { 1846 .hpd_absent = 100, 1847 .unprepare = 500, 1848 .enable = 200, 1849}; 1850 1851static const struct panel_delay delay_200_500_e200 = { 1852 .hpd_absent = 200, 1853 .unprepare = 500, 1854 .enable = 200, 1855}; 1856 1857#define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \ 1858{ \ 1859 .name = _name, \ 1860 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1861 product_id), \ 1862 .delay = _delay \ 1863} 1864 1865#define EDP_PANEL_ENTRY2(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name, _mode) \ 1866{ \ 1867 .name = _name, \ 1868 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1869 product_id), \ 1870 .delay = _delay, \ 1871 .override_edid_mode = _mode \ 1872} 1873 1874/* 1875 * This table is used to figure out power sequencing delays for panels that 1876 * are detected by EDID. Entries here may point to entries in the 1877 * platform_of_match table (if a panel is listed in both places). 1878 * 1879 * Sort first by vendor, then by product ID. 1880 */ 1881static const struct edp_panel_entry edp_panels[] = { 1882 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"), 1883 EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"), 1884 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"), 1885 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"), 1886 EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"), 1887 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.0"), 1888 EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"), 1889 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"), 1890 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"), 1891 1892 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"), 1893 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"), 1894 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"), 1895 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,836X2"), 1896 EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"), 1897 EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1"), 1898 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 V8.0"), 1899 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"), 1900 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"), 1901 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"), 1902 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"), 1903 1904 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"), 1905 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"), 1906 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"), 1907 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"), 1908 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"), 1909 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"), 1910 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"), 1911 1912 EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"), 1913 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J"), 1914 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"), 1915 1916 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"), 1917 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"), 1918 1919 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"), 1920 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1JW46"), 1921 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"), 1922 1923 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"), 1924 1925 { /* sentinal */ } 1926}; 1927 1928static const struct edp_panel_entry *find_edp_panel(u32 panel_id) 1929{ 1930 const struct edp_panel_entry *panel; 1931 1932 if (!panel_id) 1933 return NULL; 1934 1935 for (panel = edp_panels; panel->panel_id; panel++) 1936 if (panel->panel_id == panel_id) 1937 return panel; 1938 1939 return NULL; 1940} 1941 1942static int panel_edp_platform_probe(struct platform_device *pdev) 1943{ 1944 const struct of_device_id *id; 1945 1946 /* Skip one since "edp-panel" is only supported on DP AUX bus */ 1947 id = of_match_node(platform_of_match + 1, pdev->dev.of_node); 1948 if (!id) 1949 return -ENODEV; 1950 1951 return panel_edp_probe(&pdev->dev, id->data, NULL); 1952} 1953 1954static void panel_edp_platform_remove(struct platform_device *pdev) 1955{ 1956 panel_edp_remove(&pdev->dev); 1957} 1958 1959static void panel_edp_platform_shutdown(struct platform_device *pdev) 1960{ 1961 panel_edp_shutdown(&pdev->dev); 1962} 1963 1964static const struct dev_pm_ops panel_edp_pm_ops = { 1965 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL) 1966 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1967 pm_runtime_force_resume) 1968}; 1969 1970static struct platform_driver panel_edp_platform_driver = { 1971 .driver = { 1972 .name = "panel-edp", 1973 .of_match_table = platform_of_match, 1974 .pm = &panel_edp_pm_ops, 1975 }, 1976 .probe = panel_edp_platform_probe, 1977 .remove_new = panel_edp_platform_remove, 1978 .shutdown = panel_edp_platform_shutdown, 1979}; 1980 1981static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep) 1982{ 1983 const struct of_device_id *id; 1984 1985 id = of_match_node(platform_of_match, aux_ep->dev.of_node); 1986 if (!id) 1987 return -ENODEV; 1988 1989 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux); 1990} 1991 1992static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep) 1993{ 1994 panel_edp_remove(&aux_ep->dev); 1995} 1996 1997static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep) 1998{ 1999 panel_edp_shutdown(&aux_ep->dev); 2000} 2001 2002static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = { 2003 .driver = { 2004 .name = "panel-simple-dp-aux", 2005 .of_match_table = platform_of_match, /* Same as platform one! */ 2006 .pm = &panel_edp_pm_ops, 2007 }, 2008 .probe = panel_edp_dp_aux_ep_probe, 2009 .remove = panel_edp_dp_aux_ep_remove, 2010 .shutdown = panel_edp_dp_aux_ep_shutdown, 2011}; 2012 2013static int __init panel_edp_init(void) 2014{ 2015 int err; 2016 2017 err = platform_driver_register(&panel_edp_platform_driver); 2018 if (err < 0) 2019 return err; 2020 2021 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver); 2022 if (err < 0) 2023 goto err_did_platform_register; 2024 2025 return 0; 2026 2027err_did_platform_register: 2028 platform_driver_unregister(&panel_edp_platform_driver); 2029 2030 return err; 2031} 2032module_init(panel_edp_init); 2033 2034static void __exit panel_edp_exit(void) 2035{ 2036 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver); 2037 platform_driver_unregister(&panel_edp_platform_driver); 2038} 2039module_exit(panel_edp_exit); 2040 2041MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>"); 2042MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels"); 2043MODULE_LICENSE("GPL and additional rights"); 2044