162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0+ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2023 Loongson Technology Corporation Limited 462306a36Sopenharmony_ci */ 562306a36Sopenharmony_ci 662306a36Sopenharmony_ci#include "lsdc_drv.h" 762306a36Sopenharmony_ci#include "lsdc_probe.h" 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci/* 1062306a36Sopenharmony_ci * Processor ID (implementation) values for bits 15:8 of the PRID register. 1162306a36Sopenharmony_ci */ 1262306a36Sopenharmony_ci#define LOONGSON_CPU_IMP_MASK 0xff00 1362306a36Sopenharmony_ci#define LOONGSON_CPU_IMP_SHIFT 8 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci#define LOONGARCH_CPU_IMP_LS2K1000 0xa0 1662306a36Sopenharmony_ci#define LOONGARCH_CPU_IMP_LS2K2000 0xb0 1762306a36Sopenharmony_ci#define LOONGARCH_CPU_IMP_LS3A5000 0xc0 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci#define LOONGSON_CPU_MIPS_IMP_LS2K 0x61 /* Loongson 2K Mips series SoC */ 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci/* 2262306a36Sopenharmony_ci * Particular Revision values for bits 7:0 of the PRID register. 2362306a36Sopenharmony_ci */ 2462306a36Sopenharmony_ci#define LOONGSON_CPU_REV_MASK 0x00ff 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci#define LOONGARCH_CPUCFG_PRID_REG 0x0 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci/* 2962306a36Sopenharmony_ci * We can achieve fine-grained control with the information about the host. 3062306a36Sopenharmony_ci */ 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ciunsigned int loongson_cpu_get_prid(u8 *imp, u8 *rev) 3362306a36Sopenharmony_ci{ 3462306a36Sopenharmony_ci unsigned int prid = 0; 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci#if defined(__loongarch__) 3762306a36Sopenharmony_ci __asm__ volatile("cpucfg %0, %1\n\t" 3862306a36Sopenharmony_ci : "=&r"(prid) 3962306a36Sopenharmony_ci : "r"(LOONGARCH_CPUCFG_PRID_REG) 4062306a36Sopenharmony_ci ); 4162306a36Sopenharmony_ci#endif 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci#if defined(__mips__) 4462306a36Sopenharmony_ci __asm__ volatile("mfc0\t%0, $15\n\t" 4562306a36Sopenharmony_ci : "=r" (prid) 4662306a36Sopenharmony_ci ); 4762306a36Sopenharmony_ci#endif 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci if (imp) 5062306a36Sopenharmony_ci *imp = (prid & LOONGSON_CPU_IMP_MASK) >> LOONGSON_CPU_IMP_SHIFT; 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci if (rev) 5362306a36Sopenharmony_ci *rev = prid & LOONGSON_CPU_REV_MASK; 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci return prid; 5662306a36Sopenharmony_ci} 57