1/* SPDX-License-Identifier: MIT */ 2/* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6#ifndef __INTEL_GT__ 7#define __INTEL_GT__ 8 9#include "i915_drv.h" 10#include "intel_engine_types.h" 11#include "intel_gt_types.h" 12#include "intel_reset.h" 13 14struct drm_i915_private; 15struct drm_printer; 16 17#define GT_TRACE(gt, fmt, ...) do { \ 18 const struct intel_gt *gt__ __maybe_unused = (gt); \ 19 GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev), \ 20 ##__VA_ARGS__); \ 21} while (0) 22 23static inline bool gt_is_root(struct intel_gt *gt) 24{ 25 return !gt->info.id; 26} 27 28static inline bool intel_gt_needs_wa_22016122933(struct intel_gt *gt) 29{ 30 return MEDIA_VER_FULL(gt->i915) == IP_VER(13, 0) && gt->type == GT_MEDIA; 31} 32 33static inline struct intel_gt *uc_to_gt(struct intel_uc *uc) 34{ 35 return container_of(uc, struct intel_gt, uc); 36} 37 38static inline struct intel_gt *guc_to_gt(struct intel_guc *guc) 39{ 40 return container_of(guc, struct intel_gt, uc.guc); 41} 42 43static inline struct intel_gt *huc_to_gt(struct intel_huc *huc) 44{ 45 return container_of(huc, struct intel_gt, uc.huc); 46} 47 48static inline struct intel_gt *gsc_uc_to_gt(struct intel_gsc_uc *gsc_uc) 49{ 50 return container_of(gsc_uc, struct intel_gt, uc.gsc); 51} 52 53static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc) 54{ 55 return container_of(gsc, struct intel_gt, gsc); 56} 57 58void intel_gt_common_init_early(struct intel_gt *gt); 59int intel_root_gt_init_early(struct drm_i915_private *i915); 60int intel_gt_assign_ggtt(struct intel_gt *gt); 61int intel_gt_init_mmio(struct intel_gt *gt); 62int __must_check intel_gt_init_hw(struct intel_gt *gt); 63int intel_gt_init(struct intel_gt *gt); 64void intel_gt_driver_register(struct intel_gt *gt); 65 66void intel_gt_driver_unregister(struct intel_gt *gt); 67void intel_gt_driver_remove(struct intel_gt *gt); 68void intel_gt_driver_release(struct intel_gt *gt); 69void intel_gt_driver_late_release_all(struct drm_i915_private *i915); 70 71int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout); 72 73void intel_gt_check_and_clear_faults(struct intel_gt *gt); 74i915_reg_t intel_gt_perf_limit_reasons_reg(struct intel_gt *gt); 75void intel_gt_clear_error_registers(struct intel_gt *gt, 76 intel_engine_mask_t engine_mask); 77 78void intel_gt_flush_ggtt_writes(struct intel_gt *gt); 79void intel_gt_chipset_flush(struct intel_gt *gt); 80 81static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt, 82 enum intel_gt_scratch_field field) 83{ 84 return i915_ggtt_offset(gt->scratch) + field; 85} 86 87static inline bool intel_gt_has_unrecoverable_error(const struct intel_gt *gt) 88{ 89 return test_bit(I915_WEDGED_ON_INIT, >->reset.flags) || 90 test_bit(I915_WEDGED_ON_FINI, >->reset.flags); 91} 92 93static inline bool intel_gt_is_wedged(const struct intel_gt *gt) 94{ 95 GEM_BUG_ON(intel_gt_has_unrecoverable_error(gt) && 96 !test_bit(I915_WEDGED, >->reset.flags)); 97 98 return unlikely(test_bit(I915_WEDGED, >->reset.flags)); 99} 100 101int intel_gt_probe_all(struct drm_i915_private *i915); 102int intel_gt_tiles_init(struct drm_i915_private *i915); 103void intel_gt_release_all(struct drm_i915_private *i915); 104 105#define for_each_gt(gt__, i915__, id__) \ 106 for ((id__) = 0; \ 107 (id__) < I915_MAX_GT; \ 108 (id__)++) \ 109 for_each_if(((gt__) = (i915__)->gt[(id__)])) 110 111void intel_gt_info_print(const struct intel_gt_info *info, 112 struct drm_printer *p); 113 114void intel_gt_watchdog_work(struct work_struct *work); 115 116enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt, 117 struct drm_i915_gem_object *obj, 118 bool always_coherent); 119 120#endif /* __INTEL_GT_H__ */ 121