1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2019 Intel Corporation
4 */
5
6#ifndef __INTEL_DP_H__
7#define __INTEL_DP_H__
8
9#include <linux/types.h>
10
11enum intel_output_format;
12enum pipe;
13enum port;
14struct drm_connector_state;
15struct drm_encoder;
16struct drm_i915_private;
17struct drm_modeset_acquire_ctx;
18struct drm_dp_vsc_sdp;
19struct intel_atomic_state;
20struct intel_connector;
21struct intel_crtc_state;
22struct intel_digital_port;
23struct intel_dp;
24struct intel_encoder;
25
26struct link_config_limits {
27	int min_rate, max_rate;
28	int min_lane_count, max_lane_count;
29	int min_bpp, max_bpp;
30};
31
32void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp);
33void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
34				       struct intel_crtc_state *pipe_config,
35				       struct link_config_limits *limits);
36bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
37				  const struct drm_connector_state *conn_state);
38int intel_dp_min_bpp(enum intel_output_format output_format);
39bool intel_dp_init_connector(struct intel_digital_port *dig_port,
40			     struct intel_connector *intel_connector);
41void intel_dp_set_link_params(struct intel_dp *intel_dp,
42			      int link_rate, int lane_count);
43int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
44					    int link_rate, u8 lane_count);
45int intel_dp_get_active_pipes(struct intel_dp *intel_dp,
46			      struct drm_modeset_acquire_ctx *ctx,
47			      u8 *pipe_mask);
48int intel_dp_retrain_link(struct intel_encoder *encoder,
49			  struct drm_modeset_acquire_ctx *ctx);
50void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode);
51void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
52					   const struct intel_crtc_state *crtc_state);
53void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
54					   const struct intel_crtc_state *crtc_state,
55					   bool enable);
56void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
57void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
58void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
59int intel_dp_compute_config(struct intel_encoder *encoder,
60			    struct intel_crtc_state *pipe_config,
61			    struct drm_connector_state *conn_state);
62int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
63				struct intel_crtc_state *pipe_config,
64				struct drm_connector_state *conn_state,
65				struct link_config_limits *limits,
66				int timeslots,
67				bool recompute_pipe_bpp);
68bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
69bool intel_dp_is_edp(struct intel_dp *intel_dp);
70bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
71bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
72enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
73				  bool long_hpd);
74void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
75			    const struct drm_connector_state *conn_state);
76void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
77void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp);
78void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
79void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
80int intel_dp_max_link_rate(struct intel_dp *intel_dp);
81int intel_dp_max_lane_count(struct intel_dp *intel_dp);
82int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
83
84void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
85			   u8 *link_bw, u8 *rate_select);
86bool intel_dp_source_supports_tps3(struct drm_i915_private *i915);
87bool intel_dp_source_supports_tps4(struct drm_i915_private *i915);
88
89bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
90int intel_dp_link_required(int pixel_clock, int bpp);
91int intel_dp_max_data_rate(int max_link_rate, int max_lanes);
92bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
93bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
94			    const struct drm_connector_state *conn_state);
95void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
96				  const struct intel_crtc_state *crtc_state,
97				  const struct drm_connector_state *conn_state,
98				  struct drm_dp_vsc_sdp *vsc);
99void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
100			    const struct intel_crtc_state *crtc_state,
101			    const struct drm_dp_vsc_sdp *vsc);
102void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
103			     const struct intel_crtc_state *crtc_state,
104			     const struct drm_connector_state *conn_state);
105void intel_read_dp_sdp(struct intel_encoder *encoder,
106		       struct intel_crtc_state *crtc_state,
107		       unsigned int type);
108bool intel_digital_port_connected(struct intel_encoder *encoder);
109int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc);
110u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915,
111				u32 link_clock, u32 lane_count,
112				u32 mode_clock, u32 mode_hdisplay,
113				bool bigjoiner,
114				u32 pipe_bpp,
115				u32 timeslots);
116u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
117				int mode_clock, int mode_hdisplay,
118				bool bigjoiner);
119bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp,
120			     int hdisplay, int clock);
121
122static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
123{
124	return ~((1 << lane_count) - 1) & 0xf;
125}
126
127u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
128u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 pipe_bpp);
129
130void intel_ddi_update_pipe(struct intel_atomic_state *state,
131			   struct intel_encoder *encoder,
132			   const struct intel_crtc_state *crtc_state,
133			   const struct drm_connector_state *conn_state);
134
135bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
136				    struct intel_crtc_state *crtc_state);
137void intel_dp_sync_state(struct intel_encoder *encoder,
138			 const struct intel_crtc_state *crtc_state);
139
140void intel_dp_check_frl_training(struct intel_dp *intel_dp);
141void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp,
142				 const struct intel_crtc_state *crtc_state);
143void intel_dp_phy_test(struct intel_encoder *encoder);
144
145void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
146
147#endif /* __INTEL_DP_H__ */
148