162306a36Sopenharmony_ci# SPDX-License-Identifier: MIT
262306a36Sopenharmony_ci#
362306a36Sopenharmony_ci# Heterogeneous system architecture configuration
462306a36Sopenharmony_ci#
562306a36Sopenharmony_ci
662306a36Sopenharmony_ciconfig HSA_AMD
762306a36Sopenharmony_ci	bool "HSA kernel driver for AMD GPU devices"
862306a36Sopenharmony_ci	depends on DRM_AMDGPU && (X86_64 || ARM64 || PPC64)
962306a36Sopenharmony_ci	select HMM_MIRROR
1062306a36Sopenharmony_ci	select MMU_NOTIFIER
1162306a36Sopenharmony_ci	select DRM_AMDGPU_USERPTR
1262306a36Sopenharmony_ci	help
1362306a36Sopenharmony_ci	  Enable this if you want to use HSA features on AMD GPU devices.
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ciconfig HSA_AMD_SVM
1662306a36Sopenharmony_ci	bool "Enable HMM-based shared virtual memory manager"
1762306a36Sopenharmony_ci	depends on HSA_AMD && DEVICE_PRIVATE
1862306a36Sopenharmony_ci	default y
1962306a36Sopenharmony_ci	select HMM_MIRROR
2062306a36Sopenharmony_ci	select MMU_NOTIFIER
2162306a36Sopenharmony_ci	help
2262306a36Sopenharmony_ci	  Enable this to use unified memory and managed memory in HIP. This
2362306a36Sopenharmony_ci	  memory manager supports two modes of operation. One based on
2462306a36Sopenharmony_ci	  preemptions and one based on page faults. To enable page fault
2562306a36Sopenharmony_ci	  based memory management on most GFXv9 GPUs, set the module
2662306a36Sopenharmony_ci	  parameter amdgpu.noretry=0.
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ciconfig HSA_AMD_P2P
2962306a36Sopenharmony_ci	bool "HSA kernel driver support for peer-to-peer for AMD GPU devices"
3062306a36Sopenharmony_ci	depends on HSA_AMD && PCI_P2PDMA && DMABUF_MOVE_NOTIFY
3162306a36Sopenharmony_ci	help
3262306a36Sopenharmony_ci	  Enable peer-to-peer (P2P) communication between AMD GPUs over
3362306a36Sopenharmony_ci	  the PCIe bus. This can improve performance of multi-GPU compute
3462306a36Sopenharmony_ci	  applications and libraries by enabling GPUs to access data directly
3562306a36Sopenharmony_ci	  in peer GPUs' memory without intermediate copies in system memory.
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci	  This P2P feature is only enabled on compatible chipsets, and between
3862306a36Sopenharmony_ci	  GPUs with large memory BARs that expose the entire VRAM in PCIe bus
3962306a36Sopenharmony_ci	  address space within the physical address limits of the GPUs.
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