162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * Copyright (C) 2021 Advanced Micro Devices, Inc. 362306a36Sopenharmony_ci * 462306a36Sopenharmony_ci * Permission is hereby granted, free of charge, to any person obtaining a 562306a36Sopenharmony_ci * copy of this software and associated documentation files (the "Software"), 662306a36Sopenharmony_ci * to deal in the Software without restriction, including without limitation 762306a36Sopenharmony_ci * the rights to use, copy, modify, merge, publish, distribute, sublicense, 862306a36Sopenharmony_ci * and/or sell copies of the Software, and to permit persons to whom the 962306a36Sopenharmony_ci * Software is furnished to do so, subject to the following conditions: 1062306a36Sopenharmony_ci * 1162306a36Sopenharmony_ci * The above copyright notice and this permission notice shall be included 1262306a36Sopenharmony_ci * in all copies or substantial portions of the Software. 1362306a36Sopenharmony_ci * 1462306a36Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 1562306a36Sopenharmony_ci * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1662306a36Sopenharmony_ci * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1762306a36Sopenharmony_ci * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 1862306a36Sopenharmony_ci * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 1962306a36Sopenharmony_ci * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 2062306a36Sopenharmony_ci */ 2162306a36Sopenharmony_ci#ifndef __AMDGPU_MCA_H__ 2262306a36Sopenharmony_ci#define __AMDGPU_MCA_H__ 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_cistruct amdgpu_mca_ras_block { 2562306a36Sopenharmony_ci struct amdgpu_ras_block_object ras_block; 2662306a36Sopenharmony_ci}; 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_cistruct amdgpu_mca_ras { 2962306a36Sopenharmony_ci struct ras_common_if *ras_if; 3062306a36Sopenharmony_ci struct amdgpu_mca_ras_block *ras; 3162306a36Sopenharmony_ci}; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_cistruct amdgpu_mca { 3462306a36Sopenharmony_ci struct amdgpu_mca_ras mp0; 3562306a36Sopenharmony_ci struct amdgpu_mca_ras mp1; 3662306a36Sopenharmony_ci struct amdgpu_mca_ras mpio; 3762306a36Sopenharmony_ci}; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_civoid amdgpu_mca_query_correctable_error_count(struct amdgpu_device *adev, 4062306a36Sopenharmony_ci uint64_t mc_status_addr, 4162306a36Sopenharmony_ci unsigned long *error_count); 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_civoid amdgpu_mca_query_uncorrectable_error_count(struct amdgpu_device *adev, 4462306a36Sopenharmony_ci uint64_t mc_status_addr, 4562306a36Sopenharmony_ci unsigned long *error_count); 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_civoid amdgpu_mca_reset_error_count(struct amdgpu_device *adev, 4862306a36Sopenharmony_ci uint64_t mc_status_addr); 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_civoid amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev, 5162306a36Sopenharmony_ci uint64_t mc_status_addr, 5262306a36Sopenharmony_ci void *ras_error_status); 5362306a36Sopenharmony_ciint amdgpu_mca_mp0_ras_sw_init(struct amdgpu_device *adev); 5462306a36Sopenharmony_ciint amdgpu_mca_mp1_ras_sw_init(struct amdgpu_device *adev); 5562306a36Sopenharmony_ciint amdgpu_mca_mpio_ras_sw_init(struct amdgpu_device *adev); 5662306a36Sopenharmony_ci#endif 57