162306a36Sopenharmony_ci/*
262306a36Sopenharmony_ci * Copyright 2020 Advanced Micro Devices, Inc.
362306a36Sopenharmony_ci *
462306a36Sopenharmony_ci * Permission is hereby granted, free of charge, to any person obtaining a
562306a36Sopenharmony_ci * copy of this software and associated documentation files (the "Software"),
662306a36Sopenharmony_ci * to deal in the Software without restriction, including without limitation
762306a36Sopenharmony_ci * the rights to use, copy, modify, merge, publish, distribute, sublicense,
862306a36Sopenharmony_ci * and/or sell copies of the Software, and to permit persons to whom the
962306a36Sopenharmony_ci * Software is furnished to do so, subject to the following conditions:
1062306a36Sopenharmony_ci *
1162306a36Sopenharmony_ci * The above copyright notice and this permission notice shall be included in
1262306a36Sopenharmony_ci * all copies or substantial portions of the Software.
1362306a36Sopenharmony_ci *
1462306a36Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1562306a36Sopenharmony_ci * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1662306a36Sopenharmony_ci * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1762306a36Sopenharmony_ci * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
1862306a36Sopenharmony_ci * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
1962306a36Sopenharmony_ci * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2062306a36Sopenharmony_ci * OTHER DEALINGS IN THE SOFTWARE.
2162306a36Sopenharmony_ci *
2262306a36Sopenharmony_ci */
2362306a36Sopenharmony_ci#ifndef __AMDGPU_HDP_H__
2462306a36Sopenharmony_ci#define __AMDGPU_HDP_H__
2562306a36Sopenharmony_ci#include "amdgpu_ras.h"
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_cistruct amdgpu_hdp_ras {
2862306a36Sopenharmony_ci	struct amdgpu_ras_block_object ras_block;
2962306a36Sopenharmony_ci};
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_cistruct amdgpu_hdp_funcs {
3262306a36Sopenharmony_ci	void (*flush_hdp)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
3362306a36Sopenharmony_ci	void (*invalidate_hdp)(struct amdgpu_device *adev,
3462306a36Sopenharmony_ci			       struct amdgpu_ring *ring);
3562306a36Sopenharmony_ci	void (*update_clock_gating)(struct amdgpu_device *adev, bool enable);
3662306a36Sopenharmony_ci	void (*get_clock_gating_state)(struct amdgpu_device *adev, u64 *flags);
3762306a36Sopenharmony_ci	void (*init_registers)(struct amdgpu_device *adev);
3862306a36Sopenharmony_ci};
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_cistruct amdgpu_hdp {
4162306a36Sopenharmony_ci	struct ras_common_if			*ras_if;
4262306a36Sopenharmony_ci	const struct amdgpu_hdp_funcs		*funcs;
4362306a36Sopenharmony_ci	struct amdgpu_hdp_ras	*ras;
4462306a36Sopenharmony_ci};
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ciint amdgpu_hdp_ras_sw_init(struct amdgpu_device *adev);
4762306a36Sopenharmony_ci#endif /* __AMDGPU_HDP_H__ */
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