162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (C) 2013 TangoTec Ltd.
462306a36Sopenharmony_ci * Author: Baruch Siach <baruch@tkos.co.il>
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci * Driver for the Xtensa LX4 GPIO32 Option
762306a36Sopenharmony_ci *
862306a36Sopenharmony_ci * Documentation: Xtensa LX4 Microprocessor Data Book, Section 2.22
962306a36Sopenharmony_ci *
1062306a36Sopenharmony_ci * GPIO32 is a standard optional extension to the Xtensa architecture core that
1162306a36Sopenharmony_ci * provides preconfigured output and input ports for intra SoC signaling. The
1262306a36Sopenharmony_ci * GPIO32 option is implemented as 32bit Tensilica Instruction Extension (TIE)
1362306a36Sopenharmony_ci * output state called EXPSTATE, and 32bit input wire called IMPWIRE. This
1462306a36Sopenharmony_ci * driver treats input and output states as two distinct devices.
1562306a36Sopenharmony_ci *
1662306a36Sopenharmony_ci * Access to GPIO32 specific instructions is controlled by the CPENABLE
1762306a36Sopenharmony_ci * (Coprocessor Enable Bits) register. By default Xtensa Linux startup code
1862306a36Sopenharmony_ci * disables access to all coprocessors. This driver sets the CPENABLE bit
1962306a36Sopenharmony_ci * corresponding to GPIO32 before any GPIO32 specific instruction, and restores
2062306a36Sopenharmony_ci * CPENABLE state after that.
2162306a36Sopenharmony_ci *
2262306a36Sopenharmony_ci * This driver is currently incompatible with SMP. The GPIO32 extension is not
2362306a36Sopenharmony_ci * guaranteed to be available in all cores. Moreover, each core controls a
2462306a36Sopenharmony_ci * different set of IO wires. A theoretical SMP aware version of this driver
2562306a36Sopenharmony_ci * would need to have a per core workqueue to do the actual GPIO manipulation.
2662306a36Sopenharmony_ci */
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci#include <linux/err.h>
2962306a36Sopenharmony_ci#include <linux/module.h>
3062306a36Sopenharmony_ci#include <linux/gpio/driver.h>
3162306a36Sopenharmony_ci#include <linux/bitops.h>
3262306a36Sopenharmony_ci#include <linux/platform_device.h>
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci#include <asm/coprocessor.h> /* CPENABLE read/write macros */
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci#ifndef XCHAL_CP_ID_XTIOP
3762306a36Sopenharmony_ci#error GPIO32 option is not enabled for your xtensa core variant
3862306a36Sopenharmony_ci#endif
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci#if XCHAL_HAVE_CP
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_cistatic inline unsigned long enable_cp(unsigned long *cpenable)
4362306a36Sopenharmony_ci{
4462306a36Sopenharmony_ci	unsigned long flags;
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ci	local_irq_save(flags);
4762306a36Sopenharmony_ci	*cpenable = xtensa_get_sr(cpenable);
4862306a36Sopenharmony_ci	xtensa_set_sr(*cpenable | BIT(XCHAL_CP_ID_XTIOP), cpenable);
4962306a36Sopenharmony_ci	return flags;
5062306a36Sopenharmony_ci}
5162306a36Sopenharmony_ci
5262306a36Sopenharmony_cistatic inline void disable_cp(unsigned long flags, unsigned long cpenable)
5362306a36Sopenharmony_ci{
5462306a36Sopenharmony_ci	xtensa_set_sr(cpenable, cpenable);
5562306a36Sopenharmony_ci	local_irq_restore(flags);
5662306a36Sopenharmony_ci}
5762306a36Sopenharmony_ci
5862306a36Sopenharmony_ci#else
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_cistatic inline unsigned long enable_cp(unsigned long *cpenable)
6162306a36Sopenharmony_ci{
6262306a36Sopenharmony_ci	*cpenable = 0; /* avoid uninitialized value warning */
6362306a36Sopenharmony_ci	return 0;
6462306a36Sopenharmony_ci}
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_cistatic inline void disable_cp(unsigned long flags, unsigned long cpenable)
6762306a36Sopenharmony_ci{
6862306a36Sopenharmony_ci}
6962306a36Sopenharmony_ci
7062306a36Sopenharmony_ci#endif /* XCHAL_HAVE_CP */
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_cistatic int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset)
7362306a36Sopenharmony_ci{
7462306a36Sopenharmony_ci	return GPIO_LINE_DIRECTION_IN; /* input only */
7562306a36Sopenharmony_ci}
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_cistatic int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset)
7862306a36Sopenharmony_ci{
7962306a36Sopenharmony_ci	unsigned long flags, saved_cpenable;
8062306a36Sopenharmony_ci	u32 impwire;
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_ci	flags = enable_cp(&saved_cpenable);
8362306a36Sopenharmony_ci	__asm__ __volatile__("read_impwire %0" : "=a" (impwire));
8462306a36Sopenharmony_ci	disable_cp(flags, saved_cpenable);
8562306a36Sopenharmony_ci
8662306a36Sopenharmony_ci	return !!(impwire & BIT(offset));
8762306a36Sopenharmony_ci}
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_cistatic void xtensa_impwire_set_value(struct gpio_chip *gc, unsigned offset,
9062306a36Sopenharmony_ci				    int value)
9162306a36Sopenharmony_ci{
9262306a36Sopenharmony_ci	BUG(); /* output only; should never be called */
9362306a36Sopenharmony_ci}
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_cistatic int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset)
9662306a36Sopenharmony_ci{
9762306a36Sopenharmony_ci	return GPIO_LINE_DIRECTION_OUT; /* output only */
9862306a36Sopenharmony_ci}
9962306a36Sopenharmony_ci
10062306a36Sopenharmony_cistatic int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset)
10162306a36Sopenharmony_ci{
10262306a36Sopenharmony_ci	unsigned long flags, saved_cpenable;
10362306a36Sopenharmony_ci	u32 expstate;
10462306a36Sopenharmony_ci
10562306a36Sopenharmony_ci	flags = enable_cp(&saved_cpenable);
10662306a36Sopenharmony_ci	__asm__ __volatile__("rur.expstate %0" : "=a" (expstate));
10762306a36Sopenharmony_ci	disable_cp(flags, saved_cpenable);
10862306a36Sopenharmony_ci
10962306a36Sopenharmony_ci	return !!(expstate & BIT(offset));
11062306a36Sopenharmony_ci}
11162306a36Sopenharmony_ci
11262306a36Sopenharmony_cistatic void xtensa_expstate_set_value(struct gpio_chip *gc, unsigned offset,
11362306a36Sopenharmony_ci				     int value)
11462306a36Sopenharmony_ci{
11562306a36Sopenharmony_ci	unsigned long flags, saved_cpenable;
11662306a36Sopenharmony_ci	u32 mask = BIT(offset);
11762306a36Sopenharmony_ci	u32 val = value ? BIT(offset) : 0;
11862306a36Sopenharmony_ci
11962306a36Sopenharmony_ci	flags = enable_cp(&saved_cpenable);
12062306a36Sopenharmony_ci	__asm__ __volatile__("wrmsk_expstate %0, %1"
12162306a36Sopenharmony_ci			     :: "a" (val), "a" (mask));
12262306a36Sopenharmony_ci	disable_cp(flags, saved_cpenable);
12362306a36Sopenharmony_ci}
12462306a36Sopenharmony_ci
12562306a36Sopenharmony_cistatic struct gpio_chip impwire_chip = {
12662306a36Sopenharmony_ci	.label		= "impwire",
12762306a36Sopenharmony_ci	.base		= -1,
12862306a36Sopenharmony_ci	.ngpio		= 32,
12962306a36Sopenharmony_ci	.get_direction	= xtensa_impwire_get_direction,
13062306a36Sopenharmony_ci	.get		= xtensa_impwire_get_value,
13162306a36Sopenharmony_ci	.set		= xtensa_impwire_set_value,
13262306a36Sopenharmony_ci};
13362306a36Sopenharmony_ci
13462306a36Sopenharmony_cistatic struct gpio_chip expstate_chip = {
13562306a36Sopenharmony_ci	.label		= "expstate",
13662306a36Sopenharmony_ci	.base		= -1,
13762306a36Sopenharmony_ci	.ngpio		= 32,
13862306a36Sopenharmony_ci	.get_direction	= xtensa_expstate_get_direction,
13962306a36Sopenharmony_ci	.get		= xtensa_expstate_get_value,
14062306a36Sopenharmony_ci	.set		= xtensa_expstate_set_value,
14162306a36Sopenharmony_ci};
14262306a36Sopenharmony_ci
14362306a36Sopenharmony_cistatic int xtensa_gpio_probe(struct platform_device *pdev)
14462306a36Sopenharmony_ci{
14562306a36Sopenharmony_ci	int ret;
14662306a36Sopenharmony_ci
14762306a36Sopenharmony_ci	ret = gpiochip_add_data(&impwire_chip, NULL);
14862306a36Sopenharmony_ci	if (ret)
14962306a36Sopenharmony_ci		return ret;
15062306a36Sopenharmony_ci	return gpiochip_add_data(&expstate_chip, NULL);
15162306a36Sopenharmony_ci}
15262306a36Sopenharmony_ci
15362306a36Sopenharmony_cistatic struct platform_driver xtensa_gpio_driver = {
15462306a36Sopenharmony_ci	.driver		= {
15562306a36Sopenharmony_ci		.name		= "xtensa-gpio",
15662306a36Sopenharmony_ci	},
15762306a36Sopenharmony_ci	.probe		= xtensa_gpio_probe,
15862306a36Sopenharmony_ci};
15962306a36Sopenharmony_ci
16062306a36Sopenharmony_cistatic int __init xtensa_gpio_init(void)
16162306a36Sopenharmony_ci{
16262306a36Sopenharmony_ci	struct platform_device *pdev;
16362306a36Sopenharmony_ci
16462306a36Sopenharmony_ci	pdev = platform_device_register_simple("xtensa-gpio", 0, NULL, 0);
16562306a36Sopenharmony_ci	if (IS_ERR(pdev))
16662306a36Sopenharmony_ci		return PTR_ERR(pdev);
16762306a36Sopenharmony_ci
16862306a36Sopenharmony_ci	return platform_driver_register(&xtensa_gpio_driver);
16962306a36Sopenharmony_ci}
17062306a36Sopenharmony_cidevice_initcall(xtensa_gpio_init);
17162306a36Sopenharmony_ci
17262306a36Sopenharmony_ciMODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
17362306a36Sopenharmony_ciMODULE_DESCRIPTION("Xtensa LX4 GPIO32 driver");
17462306a36Sopenharmony_ciMODULE_LICENSE("GPL");
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