162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * GPIO driver for EXAR XRA1403 16-bit GPIO expander 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (c) 2017, General Electric Company 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include <linux/bitops.h> 962306a36Sopenharmony_ci#include <linux/gpio/driver.h> 1062306a36Sopenharmony_ci#include <linux/kernel.h> 1162306a36Sopenharmony_ci#include <linux/mod_devicetable.h> 1262306a36Sopenharmony_ci#include <linux/module.h> 1362306a36Sopenharmony_ci#include <linux/mutex.h> 1462306a36Sopenharmony_ci#include <linux/seq_file.h> 1562306a36Sopenharmony_ci#include <linux/spi/spi.h> 1662306a36Sopenharmony_ci#include <linux/regmap.h> 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci/* XRA1403 registers */ 1962306a36Sopenharmony_ci#define XRA_GSR 0x00 /* GPIO State */ 2062306a36Sopenharmony_ci#define XRA_OCR 0x02 /* Output Control */ 2162306a36Sopenharmony_ci#define XRA_PIR 0x04 /* Input Polarity Inversion */ 2262306a36Sopenharmony_ci#define XRA_GCR 0x06 /* GPIO Configuration */ 2362306a36Sopenharmony_ci#define XRA_PUR 0x08 /* Input Internal Pull-up Resistor Enable/Disable */ 2462306a36Sopenharmony_ci#define XRA_IER 0x0A /* Input Interrupt Enable */ 2562306a36Sopenharmony_ci#define XRA_TSCR 0x0C /* Output Three-State Control */ 2662306a36Sopenharmony_ci#define XRA_ISR 0x0E /* Input Interrupt Status */ 2762306a36Sopenharmony_ci#define XRA_REIR 0x10 /* Input Rising Edge Interrupt Enable */ 2862306a36Sopenharmony_ci#define XRA_FEIR 0x12 /* Input Falling Edge Interrupt Enable */ 2962306a36Sopenharmony_ci#define XRA_IFR 0x14 /* Input Filter Enable/Disable */ 3062306a36Sopenharmony_ci#define XRA_LAST 0x15 /* Bounds */ 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_cistruct xra1403 { 3362306a36Sopenharmony_ci struct gpio_chip chip; 3462306a36Sopenharmony_ci struct regmap *regmap; 3562306a36Sopenharmony_ci}; 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_cistatic const struct regmap_config xra1403_regmap_cfg = { 3862306a36Sopenharmony_ci .reg_bits = 7, 3962306a36Sopenharmony_ci .pad_bits = 1, 4062306a36Sopenharmony_ci .val_bits = 8, 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci .max_register = XRA_LAST, 4362306a36Sopenharmony_ci}; 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_cistatic unsigned int to_reg(unsigned int reg, unsigned int offset) 4662306a36Sopenharmony_ci{ 4762306a36Sopenharmony_ci return reg + (offset > 7); 4862306a36Sopenharmony_ci} 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_cistatic int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset) 5162306a36Sopenharmony_ci{ 5262306a36Sopenharmony_ci struct xra1403 *xra = gpiochip_get_data(chip); 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset), 5562306a36Sopenharmony_ci BIT(offset % 8), BIT(offset % 8)); 5662306a36Sopenharmony_ci} 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_cistatic int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset, 5962306a36Sopenharmony_ci int value) 6062306a36Sopenharmony_ci{ 6162306a36Sopenharmony_ci int ret; 6262306a36Sopenharmony_ci struct xra1403 *xra = gpiochip_get_data(chip); 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset), 6562306a36Sopenharmony_ci BIT(offset % 8), 0); 6662306a36Sopenharmony_ci if (ret) 6762306a36Sopenharmony_ci return ret; 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset), 7062306a36Sopenharmony_ci BIT(offset % 8), value ? BIT(offset % 8) : 0); 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci return ret; 7362306a36Sopenharmony_ci} 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_cistatic int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset) 7662306a36Sopenharmony_ci{ 7762306a36Sopenharmony_ci int ret; 7862306a36Sopenharmony_ci unsigned int val; 7962306a36Sopenharmony_ci struct xra1403 *xra = gpiochip_get_data(chip); 8062306a36Sopenharmony_ci 8162306a36Sopenharmony_ci ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val); 8262306a36Sopenharmony_ci if (ret) 8362306a36Sopenharmony_ci return ret; 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci if (val & BIT(offset % 8)) 8662306a36Sopenharmony_ci return GPIO_LINE_DIRECTION_IN; 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci return GPIO_LINE_DIRECTION_OUT; 8962306a36Sopenharmony_ci} 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_cistatic int xra1403_get(struct gpio_chip *chip, unsigned int offset) 9262306a36Sopenharmony_ci{ 9362306a36Sopenharmony_ci int ret; 9462306a36Sopenharmony_ci unsigned int val; 9562306a36Sopenharmony_ci struct xra1403 *xra = gpiochip_get_data(chip); 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ci ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val); 9862306a36Sopenharmony_ci if (ret) 9962306a36Sopenharmony_ci return ret; 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci return !!(val & BIT(offset % 8)); 10262306a36Sopenharmony_ci} 10362306a36Sopenharmony_ci 10462306a36Sopenharmony_cistatic void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value) 10562306a36Sopenharmony_ci{ 10662306a36Sopenharmony_ci int ret; 10762306a36Sopenharmony_ci struct xra1403 *xra = gpiochip_get_data(chip); 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_ci ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset), 11062306a36Sopenharmony_ci BIT(offset % 8), value ? BIT(offset % 8) : 0); 11162306a36Sopenharmony_ci if (ret) 11262306a36Sopenharmony_ci dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n", 11362306a36Sopenharmony_ci offset, ret); 11462306a36Sopenharmony_ci} 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_ci#ifdef CONFIG_DEBUG_FS 11762306a36Sopenharmony_cistatic void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip) 11862306a36Sopenharmony_ci{ 11962306a36Sopenharmony_ci int reg; 12062306a36Sopenharmony_ci struct xra1403 *xra = gpiochip_get_data(chip); 12162306a36Sopenharmony_ci int value[XRA_LAST]; 12262306a36Sopenharmony_ci int i; 12362306a36Sopenharmony_ci const char *label; 12462306a36Sopenharmony_ci unsigned int gcr; 12562306a36Sopenharmony_ci unsigned int gsr; 12662306a36Sopenharmony_ci 12762306a36Sopenharmony_ci seq_puts(s, "xra reg:"); 12862306a36Sopenharmony_ci for (reg = 0; reg <= XRA_LAST; reg++) 12962306a36Sopenharmony_ci seq_printf(s, " %2.2x", reg); 13062306a36Sopenharmony_ci seq_puts(s, "\n value:"); 13162306a36Sopenharmony_ci for (reg = 0; reg < XRA_LAST; reg++) { 13262306a36Sopenharmony_ci regmap_read(xra->regmap, reg, &value[reg]); 13362306a36Sopenharmony_ci seq_printf(s, " %2.2x", value[reg]); 13462306a36Sopenharmony_ci } 13562306a36Sopenharmony_ci seq_puts(s, "\n"); 13662306a36Sopenharmony_ci 13762306a36Sopenharmony_ci gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR]; 13862306a36Sopenharmony_ci gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR]; 13962306a36Sopenharmony_ci for_each_requested_gpio(chip, i, label) { 14062306a36Sopenharmony_ci seq_printf(s, " gpio-%-3d (%-12s) %s %s\n", 14162306a36Sopenharmony_ci chip->base + i, label, 14262306a36Sopenharmony_ci (gcr & BIT(i)) ? "in" : "out", 14362306a36Sopenharmony_ci (gsr & BIT(i)) ? "hi" : "lo"); 14462306a36Sopenharmony_ci } 14562306a36Sopenharmony_ci} 14662306a36Sopenharmony_ci#else 14762306a36Sopenharmony_ci#define xra1403_dbg_show NULL 14862306a36Sopenharmony_ci#endif 14962306a36Sopenharmony_ci 15062306a36Sopenharmony_cistatic int xra1403_probe(struct spi_device *spi) 15162306a36Sopenharmony_ci{ 15262306a36Sopenharmony_ci struct xra1403 *xra; 15362306a36Sopenharmony_ci struct gpio_desc *reset_gpio; 15462306a36Sopenharmony_ci int ret; 15562306a36Sopenharmony_ci 15662306a36Sopenharmony_ci xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL); 15762306a36Sopenharmony_ci if (!xra) 15862306a36Sopenharmony_ci return -ENOMEM; 15962306a36Sopenharmony_ci 16062306a36Sopenharmony_ci /* bring the chip out of reset if reset pin is provided*/ 16162306a36Sopenharmony_ci reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW); 16262306a36Sopenharmony_ci if (IS_ERR(reset_gpio)) 16362306a36Sopenharmony_ci dev_warn(&spi->dev, "Could not get reset-gpios\n"); 16462306a36Sopenharmony_ci 16562306a36Sopenharmony_ci xra->chip.direction_input = xra1403_direction_input; 16662306a36Sopenharmony_ci xra->chip.direction_output = xra1403_direction_output; 16762306a36Sopenharmony_ci xra->chip.get_direction = xra1403_get_direction; 16862306a36Sopenharmony_ci xra->chip.get = xra1403_get; 16962306a36Sopenharmony_ci xra->chip.set = xra1403_set; 17062306a36Sopenharmony_ci 17162306a36Sopenharmony_ci xra->chip.dbg_show = xra1403_dbg_show; 17262306a36Sopenharmony_ci 17362306a36Sopenharmony_ci xra->chip.ngpio = 16; 17462306a36Sopenharmony_ci xra->chip.label = "xra1403"; 17562306a36Sopenharmony_ci 17662306a36Sopenharmony_ci xra->chip.base = -1; 17762306a36Sopenharmony_ci xra->chip.can_sleep = true; 17862306a36Sopenharmony_ci xra->chip.parent = &spi->dev; 17962306a36Sopenharmony_ci xra->chip.owner = THIS_MODULE; 18062306a36Sopenharmony_ci 18162306a36Sopenharmony_ci xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg); 18262306a36Sopenharmony_ci if (IS_ERR(xra->regmap)) { 18362306a36Sopenharmony_ci ret = PTR_ERR(xra->regmap); 18462306a36Sopenharmony_ci dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret); 18562306a36Sopenharmony_ci return ret; 18662306a36Sopenharmony_ci } 18762306a36Sopenharmony_ci 18862306a36Sopenharmony_ci return devm_gpiochip_add_data(&spi->dev, &xra->chip, xra); 18962306a36Sopenharmony_ci} 19062306a36Sopenharmony_ci 19162306a36Sopenharmony_cistatic const struct spi_device_id xra1403_ids[] = { 19262306a36Sopenharmony_ci { "xra1403" }, 19362306a36Sopenharmony_ci {}, 19462306a36Sopenharmony_ci}; 19562306a36Sopenharmony_ciMODULE_DEVICE_TABLE(spi, xra1403_ids); 19662306a36Sopenharmony_ci 19762306a36Sopenharmony_cistatic const struct of_device_id xra1403_spi_of_match[] = { 19862306a36Sopenharmony_ci { .compatible = "exar,xra1403" }, 19962306a36Sopenharmony_ci {}, 20062306a36Sopenharmony_ci}; 20162306a36Sopenharmony_ciMODULE_DEVICE_TABLE(of, xra1403_spi_of_match); 20262306a36Sopenharmony_ci 20362306a36Sopenharmony_cistatic struct spi_driver xra1403_driver = { 20462306a36Sopenharmony_ci .probe = xra1403_probe, 20562306a36Sopenharmony_ci .id_table = xra1403_ids, 20662306a36Sopenharmony_ci .driver = { 20762306a36Sopenharmony_ci .name = "xra1403", 20862306a36Sopenharmony_ci .of_match_table = xra1403_spi_of_match, 20962306a36Sopenharmony_ci }, 21062306a36Sopenharmony_ci}; 21162306a36Sopenharmony_ci 21262306a36Sopenharmony_cimodule_spi_driver(xra1403_driver); 21362306a36Sopenharmony_ci 21462306a36Sopenharmony_ciMODULE_AUTHOR("Nandor Han <nandor.han@ge.com>"); 21562306a36Sopenharmony_ciMODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>"); 21662306a36Sopenharmony_ciMODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403"); 21762306a36Sopenharmony_ciMODULE_LICENSE("GPL v2"); 218